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| author | Jens Wiklander <jens.wiklander@linaro.org> | 2020-02-01 10:10:06 +0100 |
|---|---|---|
| committer | Jérôme Forissier <jerome@forissier.org> | 2020-02-04 16:58:36 +0100 |
| commit | d780a7fba67958ab42fa4db258b2bc41cc1b0fde (patch) | |
| tree | ee5ef528976eb816a2d854c1c1d737bec803161b | |
| parent | 5746bdef25d78bf2e6058811828758909894be1f (diff) | |
core: arm: set SCTLR_SPAN
Initializes SCTLR.SPAN to 1. SCTLR.SPAN was introduced with v8.1-PAN and
was prior to that defined as RES1.
Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
| -rw-r--r-- | core/arch/arm/kernel/generic_entry_a32.S | 1 | ||||
| -rw-r--r-- | core/arch/arm/kernel/generic_entry_a64.S | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/core/arch/arm/kernel/generic_entry_a32.S b/core/arch/arm/kernel/generic_entry_a32.S index 67a7133a..23ff9d4b 100644 --- a/core/arch/arm/kernel/generic_entry_a32.S +++ b/core/arch/arm/kernel/generic_entry_a32.S @@ -152,6 +152,7 @@ END_FUNC reset_vect_table bic r0, r0, #(SCTLR_M | SCTLR_C) bic r0, r0, #SCTLR_I bic r0, r0, #SCTLR_TE + orr r0, r0, #SCTLR_SPAN #if defined(CFG_SCTLR_ALIGNMENT_CHECK) orr r0, r0, #SCTLR_A #else diff --git a/core/arch/arm/kernel/generic_entry_a64.S b/core/arch/arm/kernel/generic_entry_a64.S index 17f80cb4..7f546b3f 100644 --- a/core/arch/arm/kernel/generic_entry_a64.S +++ b/core/arch/arm/kernel/generic_entry_a64.S @@ -43,6 +43,7 @@ mrs x0, sctlr_el1 orr x0, x0, #SCTLR_I orr x0, x0, #SCTLR_SA + orr x0, x0, #SCTLR_SPAN #if defined(CFG_CORE_RWDATA_NOEXEC) orr x0, x0, #SCTLR_WXN #endif |