diff options
| author | Ralph Siemsen <ralph.siemsen@linaro.org> | 2021-11-04 15:05:59 -0400 |
|---|---|---|
| committer | Jérôme Forissier <jerome@forissier.org> | 2021-11-24 17:43:37 +0100 |
| commit | 5ab6717dfa872443e948944f0e4fb5a9017c5427 (patch) | |
| tree | 089e1a71fae34a1629be6afee661fb89de2fac3a | |
| parent | 24421193a514b26a2f81103b20c75821f3591e58 (diff) | |
plat-rzn1: fix unmasked register writes
When writing all 32 bits of a register, there is no need for iomask_32
which performs a read-modify-write operation. Not only is it faster, but
certain hardware registers are write-only or have side effects on read.
Using iomask_32 was found to cause the following issues on RZ/N1:
- accessing the I2C EEPROM gives timeout errors on read
- serial console drops characters on input (eg. when pasting)
Switching to io_write32 for non-masked writes fixes the issues.
Fixes: f1cf4b79 ("Add support for Renesas RZ/N1 platform")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
| -rw-r--r-- | core/arch/arm/plat-rzn1/sm_platform_handler.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/core/arch/arm/plat-rzn1/sm_platform_handler.c b/core/arch/arm/plat-rzn1/sm_platform_handler.c index fecfef5f..dc990f49 100644 --- a/core/arch/arm/plat-rzn1/sm_platform_handler.c +++ b/core/arch/arm/plat-rzn1/sm_platform_handler.c @@ -50,6 +50,8 @@ static uint32_t oem_sysreg(uint32_t addr, uint32_t mask, uint32_t *pvalue) if (!reg || !mask) DMSG("Blocking write of 0x%"PRIx32" to register 0x%" PRIx32" (0x%"PRIxVA")", *pvalue, addr, reg); + else if (mask == ~0UL) + io_write32(reg, *pvalue); else io_mask32(reg, *pvalue, mask); } else { |