diff options
| author | Julien Masson <jmasson@baylibre.com> | 2021-11-19 15:42:38 +0100 |
|---|---|---|
| committer | Jérôme Forissier <jerome@forissier.org> | 2021-11-23 16:44:43 +0100 |
| commit | 292b31864448bcbe005bd0634348181689b00569 (patch) | |
| tree | e00ec567285725db411bc2be115e6aad78314606 | |
| parent | 9e42008d9512dda216db2235576b8956e95c408c (diff) | |
plat-mediatek: define memory range
This patch registers the non-secure memory to support dynamic shm
registering.
The default RAM size has been set to 1 GiB and default RAM base
address set to 0x40000000.
These values can be changed at compilation via CFG_DRAM_SIZE and
CFG_DRAM_BASE.
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Julien Masson <jmasson@baylibre.com>
| -rw-r--r-- | core/arch/arm/plat-mediatek/conf.mk | 6 | ||||
| -rw-r--r-- | core/arch/arm/plat-mediatek/main.c | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/core/arch/arm/plat-mediatek/conf.mk b/core/arch/arm/plat-mediatek/conf.mk index 6f55496f..27be0361 100644 --- a/core/arch/arm/plat-mediatek/conf.mk +++ b/core/arch/arm/plat-mediatek/conf.mk @@ -14,6 +14,12 @@ else $(call force,CFG_ARM32_core,y) endif +# default DRAM base address +CFG_DRAM_BASE ?= 0x40000000 + +# default DRAM size 1 GiB +CFG_DRAM_SIZE ?= 0x40000000 + ifeq ($(PLATFORM_FLAVOR),mt8173) # 2**1 = 2 cores per cluster $(call force,CFG_TEE_CORE_NB_CORE,4) diff --git a/core/arch/arm/plat-mediatek/main.c b/core/arch/arm/plat-mediatek/main.c index 3524838d..757dcafc 100644 --- a/core/arch/arm/plat-mediatek/main.c +++ b/core/arch/arm/plat-mediatek/main.c @@ -17,6 +17,8 @@ register_phys_mem_pgdir(MEM_AREA_IO_NSEC, static struct serial8250_uart_data console_data; +register_ddr(CFG_DRAM_BASE, CFG_DRAM_SIZE); + #ifdef CFG_GIC static struct gic_data gic_data; |