plat-bcm: Add Broadcom ARMv8-A SoC ns3

Add base platform support for Broadcom ns3 SoC.
Broadcom ns3 is ARMv8-A based SoS with Cortex-A72 cores
and GICv3. It is configured to run with TF-A.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Pramod Kumar <pramod.kumar@broadcom.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

7 files changed, 145 insertions, 0 deletions

diff --git a/.shippable.yml b/.shippable.yml
index ee255612..d2ad4747 100644
--- a/.shippable.yml
+++ b/.shippable.yml
@@ -102,3 +102,4 @@ build:
     - _make PLATFORM=synquacer
     - _make PLATFORM=sunxi-bpi_zero
     - _make PLATFORM=sunxi-sun50i_a64
+    - _make PLATFORM=bcm-ns3 CFG_ARM64_core=y
diff --git a/MAINTAINERS b/MAINTAINERS
index 7ac335e1..fec3b96c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -56,6 +56,11 @@ R:	Akshay Bhat <akshay.bhat@timesys.com> [@nodeax]
 S:	Maintained
 F:	core/arch/arm/plat-sam/
 
+Broadcom ns3
+R:	Broadcom <bcm-optee-feedback-list.pdl@broadcom.com> [@sandeepbrcm]
+S:	Maintained
+F:	core/arch/arm/plat-bcm/
+
 HiSilicon D02
 R:	Linaro <op-tee@linaro.org>
 S:	Maintained
diff --git a/README.md b/README.md
index 48e162cb..973b2dc4 100644
--- a/README.md
+++ b/README.md
@@ -57,6 +57,7 @@ The **Maintained?** column shows:
 |----------|-------------------------|---------------------|-------------|
 | [ARM Juno Board](http://www.arm.com/products/tools/development-boards/versatile-express/juno-arm-development-platform.php) |`PLATFORM=vexpress-juno`| Yes | ![Actively Maintained](documentation/images/green.svg) |
 | [Atmel ATSAMA5D2-XULT Board](http://www.atmel.com/tools/atsama5d2-xult.aspx)|`PLATFORM=sam`| Yes | ![Actively Maintained](documentation/images/green.svg) |
+| [Broadcom ns3](https://www.broadcom.com/)|`PLATFORM=bcm-ns3`| No | ![Actively Maintained](documentation/images/green.svg) |
 | [DeveloperBox (Socionext Synquacer SC2A11)](https://www.96boards.org/product/developerbox/)|`PLATFORM=synquacer`| Yes | ![Actively Maintained](documentation/images/green.svg) |
 | [FSL ls1021a](http://www.freescale.com/tools/embedded-software-and-tools/hardware-development-tools/tower-development-boards/mcu-and-processor-modules/powerquicc-and-qoriq-modules/qoriq-ls1021a-tower-system-module:TWR-LS1021A?lang_cd=en)|`PLATFORM=ls-ls1021atwr`| Yes | ![Actively maintained](documentation/images/green.svg) |
 | [NXP ls1043ardb](http://www.nxp.com/products/microcontrollers-and-processors/power-architecture-processors/qoriq-platforms/developer-resources/qoriq-ls1043a-reference-design-board:LS1043A-RDB)|`PLATFORM=ls-ls1043ardb`| Yes | ![Actively Maintained](documentation/images/green.svg) |
diff --git a/core/arch/arm/plat-bcm/conf.mk b/core/arch/arm/plat-bcm/conf.mk
new file mode 100644
index 00000000..53afba26
--- /dev/null
+++ b/core/arch/arm/plat-bcm/conf.mk
@@ -0,0 +1,32 @@
+PLATFORM_FLAVOR ?= ns3
+
+$(call force,CFG_8250_UART,y)
+$(call force,CFG_GENERIC_BOOT,y)
+$(call force,CFG_TEE_CORE_DEBUG,n)
+$(call force,CFG_GIC,y)
+
+ifeq ($(PLATFORM_FLAVOR),ns3)
+platform-flavor-armv8 := 1
+$(call force,CFG_WITH_LPAE,y)
+$(call force,CFG_ARM_GICV3,y)
+$(call force,CFG_CORE_CLUSTER_SHIFT,1)
+$(call force,CFG_TEE_CORE_NB_CORE,8)
+CFG_TZDRAM_START ?= 0x8e000000
+CFG_TZDRAM_SIZE ?= 0x01000000 # 16MB
+CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) - $(CFG_SHMEM_SIZE))
+CFG_SHMEM_SIZE ?=  0x01000000 # 16MB
+CFG_TEE_RAM_VA_SIZE := 0x400000 # 4MB
+endif
+
+ifeq ($(platform-flavor-armv8),1)
+$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
+$(call force,CFG_PM_STUBS,y)
+$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
+endif
+
+ifeq ($(platform-flavor-armv8),1)
+ifeq ($(DEBUG),1)
+platform-cflags += -gdwarf-2
+platform-aflags += -gdwarf-2
+endif
+endif
diff --git a/core/arch/arm/plat-bcm/main.c b/core/arch/arm/plat-bcm/main.c
new file mode 100644
index 00000000..efbadc3c
--- /dev/null
+++ b/core/arch/arm/plat-bcm/main.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright 2019 Broadcom.
+ */
+
+#include <console.h>
+#include <drivers/gic.h>
+#include <drivers/serial8250_uart.h>
+#include <kernel/generic_boot.h>
+#include <kernel/panic.h>
+#include <kernel/pm_stubs.h>
+#include <mm/core_memprot.h>
+#include <mm/tee_pager.h>
+#include <platform_config.h>
+#include <stdint.h>
+#include <tee/entry_fast.h>
+#include <tee/entry_std.h>
+
+static void secure_intr_handler(void);
+
+static const struct thread_handlers handlers = {
+	.std_smc = tee_entry_std,
+	.fast_smc = tee_entry_fast,
+	.nintr = secure_intr_handler,
+	.cpu_on = cpu_on_handler,
+	.cpu_off = pm_do_nothing,
+	.cpu_suspend = pm_do_nothing,
+	.cpu_resume = pm_do_nothing,
+	.system_off = pm_do_nothing,
+	.system_reset = pm_do_nothing,
+};
+
+static struct gic_data gic_data;
+struct serial8250_uart_data console_data;
+
+#ifdef BCM_DEVICE0_BASE
+register_phys_mem(MEM_AREA_IO_SEC, BCM_DEVICE0_BASE, BCM_DEVICE0_SIZE);
+#endif
+#ifdef BCM_DEVICE1_BASE
+register_phys_mem(MEM_AREA_IO_SEC, BCM_DEVICE1_BASE, BCM_DEVICE1_SIZE);
+#endif
+#ifdef BCM_DRAM0_NS_BASE
+register_dynamic_shm(MEM_AREA_RAM_NSEC, BCM_DRAM0_NS_BASE, BCM_DRAM0_NS_SIZE);
+#endif
+
+const struct thread_handlers *generic_boot_get_handlers(void)
+{
+	return &handlers;
+}
+
+void console_init(void)
+{
+	serial8250_uart_init(&console_data, CONSOLE_UART_BASE,
+			     CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE);
+	register_serial_console(&console_data.chip);
+}
+
+static void secure_intr_handler(void)
+{
+	gic_it_handle(&gic_data);
+}
+
+void main_init_gic(void)
+{
+	vaddr_t gicd_base;
+
+	gicd_base = core_mmu_get_va(GICD_BASE, MEM_AREA_IO_SEC);
+
+	if (!gicd_base)
+		panic();
+
+	gic_init_base_addr(&gic_data, 0, gicd_base);
+	itr_init(&gic_data.chip);
+
+}
diff --git a/core/arch/arm/plat-bcm/platform_config.h b/core/arch/arm/plat-bcm/platform_config.h
new file mode 100644
index 00000000..dc2ca80f
--- /dev/null
+++ b/core/arch/arm/plat-bcm/platform_config.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright 2019 Broadcom.
+ */
+
+#ifndef PLATFORM_CONFIG_H
+#define PLATFORM_CONFIG_H
+
+#include <mm/generic_ram_layout.h>
+
+#if defined(PLATFORM_FLAVOR_ns3)
+
+#define STACK_ALIGNMENT		64
+
+#define CONSOLE_UART_CLK_IN_HZ	25000000
+#define CONSOLE_BAUDRATE	115200
+
+#define CONSOLE_UART_BASE	0x68a10000
+#define BCM_DEVICE0_BASE	CONSOLE_UART_BASE
+#define BCM_DEVICE0_SIZE	CORE_MMU_DEVICE_SIZE
+
+#define GICD_BASE		0x63c00000
+#define BCM_DEVICE1_BASE	GICD_BASE
+#define BCM_DEVICE1_SIZE	CORE_MMU_DEVICE_SIZE
+
+#else
+#error "Unknown platform flavor"
+#endif
+#endif /*PLATFORM_CONFIG_H*/
diff --git a/core/arch/arm/plat-bcm/sub.mk b/core/arch/arm/plat-bcm/sub.mk
new file mode 100644
index 00000000..8ddc2fd4
--- /dev/null
+++ b/core/arch/arm/plat-bcm/sub.mk
@@ -0,0 +1,2 @@
+global-incdirs-y += .
+srcs-y += main.c