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| author | Jens Wiklander <jens.wiklander@linaro.org> | 2018-01-10 12:01:58 +0100 |
|---|---|---|
| committer | Jérôme Forissier <jerome.forissier@linaro.org> | 2018-01-10 14:34:51 +0100 |
| commit | 294a3c3530edabeca4b411f96fa454f6d55f56a2 (patch) | |
| tree | ba43f6f0c268dc8ec48b73e486756669f99f34bd /documentation | |
| parent | 1df3ba05fc163abeda818f15395ce7d0dbf7cdfd (diff) | |
documentation: mmu and switch to/from user space
This only describes the already documented legacy ARMv7 (short) table
format.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Diffstat (limited to 'documentation')
| -rw-r--r-- | documentation/optee_design.md | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/documentation/optee_design.md b/documentation/optee_design.md index 2535eb87..f93d468b 100644 --- a/documentation/optee_design.md +++ b/documentation/optee_design.md @@ -150,6 +150,15 @@ table when the TA context is activated.  +## Translation tables and switching to user mode +This section only applies with `CFG_WITH_LPAE=n` and +`CFG_CORE_UNMAP_CORE_AT_EL0=y`. + +When switching to user mode only a minimal kernel mode mapping is kept. +This is achieved by selecting a zeroed out big L1 translation in TTBR1 when +transitioning to user mode. When returning back to kernel mode the original +L1 translation table is restored in TTBR1. + ## Translation tables and switching to normal world When switching to normal world either via a foreign interrupt or RPC there is a chance that secure world will resume execution on a different CPU. |