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authorPeng Fan <peng.fan@nxp.com>2018-04-02 09:57:27 +0800
committerSilvano di Ninno <silvano.dininno@nxp.com>2018-08-02 15:37:23 +0200
commitb8fb9cdb76d5cb7c39f8fac51472758e4f7b5e76 (patch)
tree27e39c613a6acfd7a8d8b270355a4575e22344a1 /core
parentf7a21b9c6ee4b9187a1fcefe48b4cf7fc1268cdd (diff)
MLK-17962-1 core: arm: imx: a7: set L1 Data prefetch
The default value of L1PCTL field in ACTLR is 0x3, which is "3 outstanding pre-fetches permitted", the value should not be override with 0 to decrease the performance. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'core')
-rw-r--r--core/arch/arm/plat-imx/a7_plat_init.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/core/arch/arm/plat-imx/a7_plat_init.S b/core/arch/arm/plat-imx/a7_plat_init.S
index 030f02d5..9962c2d3 100644
--- a/core/arch/arm/plat-imx/a7_plat_init.S
+++ b/core/arch/arm/plat-imx/a7_plat_init.S
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/*
- * Copyright (c) 2017, NXP
+ * Copyright 2017-2018 NXP
*
* Peng Fan <peng.fan@nxp.com>
*/
@@ -34,7 +34,7 @@
FUNC plat_cpu_reset_early , :
UNWIND( .fnstart)
- mov_imm r0, 0x00000040
+ mov_imm r0, 0x00006040
write_actlr r0
mov_imm r0, 0x00040C00