TEE-302: add support for i.MX 8MM

reuse most of the i.mx 8mq supports.

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>

8 files changed, 79 insertions, 4 deletions

diff --git a/core/arch/arm/plat-imx/conf.mk b/core/arch/arm/plat-imx/conf.mk
index 47361320..540678ef 100644
--- a/core/arch/arm/plat-imx/conf.mk
+++ b/core/arch/arm/plat-imx/conf.mk
@@ -15,6 +15,7 @@ mx7d-flavorlist = mx7dsabresd
 mx7s-flavorlist = mx7swarp7
 mx7ulp-flavorlist = mx7ulpevk
 mx8m-flavorlist = mx8mqevk
+mx8mm-flavorlist = mx8mmevk
 
 ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
 $(call force,CFG_MX6,y)
@@ -76,6 +77,10 @@ else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8m-flavorlist)))
 $(call force,CFG_MX8M,y)
 $(call force,CFG_ARM64_core,y)
 $(call force,CFG_TEE_CORE_NB_CORE,4)
+else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
+$(call force,CFG_MX8MM,y)
+$(call force,CFG_ARM64_core,y)
+$(call force,CFG_TEE_CORE_NB_CORE,4)
 else
 $(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
 endif
@@ -99,6 +104,7 @@ $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
 ta-targets = ta_arm64
 CFG_CRYPTO_WITH_CE ?= y
 
+CFG_IMX_OCRAM = n
 CFG_IMX_WDOG = n
 CFG_TZC380 ?= y
 CFG_IMX_UART ?= y
@@ -358,6 +364,10 @@ ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
 CFG_DDR_SIZE ?= 0xC0000000
 endif
 
+ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
+CFG_DDR_SIZE ?= 0x80000000
+endif
+
 ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
 CFG_HWSUPP_MEM_PERM_WXN = n
 CFG_IMX_WDOG ?= y
diff --git a/core/arch/arm/plat-imx/config/imx8mm.h b/core/arch/arm/plat-imx/config/imx8mm.h
new file mode 100644
index 00000000..d21ca932
--- /dev/null
+++ b/core/arch/arm/plat-imx/config/imx8mm.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright 2018 NXP
+ *
+ */
+
+#ifndef CONFIG_IMX8MM_H
+#define CONFIG_IMX8MM_H
+
+#ifndef CFG_UART_BASE
+#define CFG_UART_BASE	(UART2_BASE)
+#endif
+
+#define DRAM0_BASE		0x40000000
+#define DRAM0_SIZE		CFG_DDR_SIZE
+
+#define CONSOLE_UART_BASE	(CFG_UART_BASE)
+#endif
diff --git a/core/arch/arm/plat-imx/main.c b/core/arch/arm/plat-imx/main.c
index e05a3baf..4413289d 100644
--- a/core/arch/arm/plat-imx/main.c
+++ b/core/arch/arm/plat-imx/main.c
@@ -160,8 +160,7 @@ void main_init_gic(void)
 #endif
 }
 
-#if defined(CFG_MX6QP) || defined(CFG_MX6Q) || defined(CFG_MX6D) || \
-	defined(CFG_MX6DL) || defined(CFG_MX7) || defined(CFG_MX8M)
+#if CFG_TEE_CORE_NB_CORE > 1
 void main_secondary_init_gic(void)
 {
 	gic_cpu_init(&gic_data);
diff --git a/core/arch/arm/plat-imx/platform_config.h b/core/arch/arm/plat-imx/platform_config.h
index b8890cf3..d2e17f1a 100644
--- a/core/arch/arm/plat-imx/platform_config.h
+++ b/core/arch/arm/plat-imx/platform_config.h
@@ -43,6 +43,9 @@
 /* For i.MX8M platforms */
 #if defined(CFG_MX8M)
 #include <config/imx8m.h>
+/* For i.MX8MM platforms */
+#elif defined(CFG_MX8MM)
+#include <config/imx8mm.h>
 /* For i.MX7D/S platforms */
 #elif defined(CFG_MX7)
 #include <config/imx7.h>
diff --git a/core/arch/arm/plat-imx/registers/imx-regs.h b/core/arch/arm/plat-imx/registers/imx-regs.h
index c66a7f74..71642e21 100644
--- a/core/arch/arm/plat-imx/registers/imx-regs.h
+++ b/core/arch/arm/plat-imx/registers/imx-regs.h
@@ -39,6 +39,8 @@
 #include <registers/imx7ulp-regs.h>
 #elif defined(CFG_MX8M)
 #include <registers/imx8m-regs.h>
+#elif defined(CFG_MX8MM)
+#include <registers/imx8mm-regs.h>
 #else
 #error "PLATFORM not defined"
 #endif
diff --git a/core/arch/arm/plat-imx/registers/imx8mm-regs.h b/core/arch/arm/plat-imx/registers/imx8mm-regs.h
new file mode 100644
index 00000000..a62efacf
--- /dev/null
+++ b/core/arch/arm/plat-imx/registers/imx8mm-regs.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright 2017 NXP
+ *
+ */
+
+#ifndef __IMX8_REGS_H__
+#define __IMX8_REGS_H__
+
+#define GICD_BASE	0x38800000
+#define GICR_BASE	0x38880000
+#define UART1_BASE	0x30860000
+#define UART2_BASE	0x30890000
+#define UART3_BASE	0x30880000
+#define UART4_BASE	0x30A60000
+#define TZASC_BASE	0x32F80000
+#define CAAM_BASE	0x30900000
+
+#endif /* __IMX8_REGS_H__ */
diff --git a/core/arch/arm/plat-imx/sub.mk b/core/arch/arm/plat-imx/sub.mk
index 33a6af42..2296254d 100644
--- a/core/arch/arm/plat-imx/sub.mk
+++ b/core/arch/arm/plat-imx/sub.mk
@@ -20,7 +20,6 @@ ifneq (,$(filter y, $(CFG_MX7) $(CFG_MX7ULP) $(CFG_MX6UL) $(CFG_MX6ULL)))
 srcs-y += a7_plat_init.S
 endif
 
-
 srcs-$(CFG_TZC380) += tzasc.c
 srcs-$(CFG_DT) += imx_dt.c
 srcs-$(CFG_CSU) += imx_csu.c
diff --git a/core/arch/arm/plat-imx/tzasc.c b/core/arch/arm/plat-imx/tzasc.c
index 8904ca94..28e052e7 100644
--- a/core/arch/arm/plat-imx/tzasc.c
+++ b/core/arch/arm/plat-imx/tzasc.c
@@ -296,6 +296,31 @@ static int board_imx_tzasc_configure(vaddr_t addr)
 
 	return 0;
 }
+#elif defined(PLATFORM_FLAVOR_mx8mmevk)
+static int board_imx_tzasc_configure(vaddr_t addr)
+{
+	tzc_init(addr);
+
+	tzc_configure_region(0, 0x00000000,
+		TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4G) |
+		TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+	tzc_configure_region(1, 0xbe000000,
+		TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) |
+		TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_S_RW);
+	tzc_configure_region(2, 0xbfc00000,
+		TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4M) |
+		TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
+
+	tzc_set_action(3);
+
+	tzc_region_enable(2);
+	tzc_region_enable(1);
+	tzc_region_enable(0);
+
+	tzc_dump_state();
+
+	return 0;
+}
 #else
 #error "No tzasc defined"
 #endif
@@ -364,7 +389,7 @@ TEE_Result tzasc_init(void)
 
 	return TEE_SUCCESS;
 }
-#elif defined(CFG_MX8M)
+#elif defined(CFG_MX8M) || defined(CFG_MX8MM)
 register_phys_mem(MEM_AREA_IO_SEC, TZASC_BASE, CORE_MMU_DEVICE_SIZE);
 TEE_Result tzasc_init(void)
 {