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Diffstat (limited to 'include/asm-ppc/pgtable.h')
-rw-r--r--include/asm-ppc/pgtable.h45
1 files changed, 28 insertions, 17 deletions
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index e135b4aba9f..a67bd512b2c 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -225,8 +225,7 @@ extern unsigned long ioremap_bot, ioremap_base;
/* ERPN in a PTE never gets cleared, ignore it */
#define _PTE_NONE_MASK 0xffffffff00000000ULL
-#elif defined(CONFIG_E500)
-
+#elif defined(CONFIG_FSL_BOOKE)
/*
MMU Assist Register 3:
@@ -240,21 +239,29 @@ extern unsigned long ioremap_bot, ioremap_base;
entries use the top 29 bits.
*/
-/* Definitions for e500 core */
-#define _PAGE_PRESENT 0x001 /* S: PTE contains a translation */
-#define _PAGE_USER 0x002 /* S: User page (maps to UR) */
-#define _PAGE_FILE 0x002 /* S: when !present: nonlinear file mapping */
-#define _PAGE_ACCESSED 0x004 /* S: Page referenced */
-#define _PAGE_HWWRITE 0x008 /* H: Dirty & RW, set in exception */
-#define _PAGE_RW 0x010 /* S: Write permission */
-#define _PAGE_HWEXEC 0x020 /* H: UX permission */
-
-#define _PAGE_ENDIAN 0x040 /* H: E bit */
-#define _PAGE_GUARDED 0x080 /* H: G bit */
-#define _PAGE_COHERENT 0x100 /* H: M bit */
-#define _PAGE_NO_CACHE 0x200 /* H: I bit */
-#define _PAGE_WRITETHRU 0x400 /* H: W bit */
-#define _PAGE_DIRTY 0x800 /* S: Page dirty */
+/* Definitions for FSL Book-E Cores */
+#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */
+#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */
+#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */
+#define _PAGE_ACCESSED 0x00004 /* S: Page referenced */
+#define _PAGE_HWWRITE 0x00008 /* H: Dirty & RW, set in exception */
+#define _PAGE_RW 0x00010 /* S: Write permission */
+#define _PAGE_HWEXEC 0x00020 /* H: UX permission */
+
+#define _PAGE_ENDIAN 0x00040 /* H: E bit */
+#define _PAGE_GUARDED 0x00080 /* H: G bit */
+#define _PAGE_COHERENT 0x00100 /* H: M bit */
+#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
+#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
+
+#ifdef CONFIG_PTE_64BIT
+#define _PAGE_DIRTY 0x08000 /* S: Page dirty */
+
+/* ERPN in a PTE never gets cleared, ignore it */
+#define _PTE_NONE_MASK 0xffffffffffff0000ULL
+#else
+#define _PAGE_DIRTY 0x00800 /* S: Page dirty */
+#endif
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
@@ -433,7 +440,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
/* in some case we want to additionaly adjust where the pfn is in the pte to
* allow room for more flags */
+#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
+#define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8)
+#else
#define PFN_SHIFT_OFFSET (PAGE_SHIFT)
+#endif
#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET)
#define pte_page(x) pfn_to_page(pte_pfn(x))