aboutsummaryrefslogtreecommitdiff
path: root/module/scmi_apcore/include
diff options
context:
space:
mode:
Diffstat (limited to 'module/scmi_apcore/include')
-rw-r--r--module/scmi_apcore/include/internal/scmi_apcore.h71
-rw-r--r--module/scmi_apcore/include/mod_scmi_apcore.h75
2 files changed, 146 insertions, 0 deletions
diff --git a/module/scmi_apcore/include/internal/scmi_apcore.h b/module/scmi_apcore/include/internal/scmi_apcore.h
new file mode 100644
index 00000000..d55e676b
--- /dev/null
+++ b/module/scmi_apcore/include/internal/scmi_apcore.h
@@ -0,0 +1,71 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ * SCMI Core Configuration Protocol Support
+ */
+
+#ifndef SCMI_APCORE_H
+#define SCMI_APCORE_H
+
+#include <stdint.h>
+
+#define SCMI_PROTOCOL_ID_APCORE UINT32_C(0x90)
+#define SCMI_PROTOCOL_VERSION_APCORE UINT32_C(0x10000)
+
+/*
+ * Identifiers of the SCMI Core Configuration Protocol commands
+ */
+enum scmi_apcore_command_id {
+ SCMI_APCORE_RESET_ADDRESS_SET = 0x3,
+ SCMI_APCORE_RESET_ADDRESS_GET = 0x4,
+};
+
+/*
+ * Protocol Attributes
+ */
+
+#define SCMI_APCORE_PROTOCOL_ATTRIBUTES_64BIT_POS 0
+
+#define SCMI_APCORE_PROTOCOL_ATTRIBUTES_64BIT_MASK \
+ (UINT32_C(0x1) << SCMI_APCORE_PROTOCOL_ATTRIBUTES_64BIT_POS)
+
+/*
+ * Reset Address Set
+ */
+
+#define SCMI_APCORE_RESET_ADDRESS_SET_LOCK_POS 0
+
+#define SCMI_APCORE_RESET_ADDRESS_SET_LOCK_MASK \
+ (UINT32_C(0x1) << SCMI_APCORE_RESET_ADDRESS_SET_LOCK_POS)
+
+struct __attribute((packed)) scmi_apcore_reset_address_set_a2p {
+ uint32_t reset_address_low;
+ uint32_t reset_address_high;
+ uint32_t attributes;
+};
+
+struct __attribute((packed)) scmi_apcore_reset_address_set_p2a {
+ int32_t status;
+};
+
+/*
+ * Reset Address Get
+ */
+
+#define SCMI_APCORE_RESET_ADDRESS_GET_LOCK_POS 0
+
+#define SCMI_APCORE_RESET_ADDRESS_GET_LOCK_MASK \
+ (UINT32_C(0x1) << SCMI_APCORE_RESET_ADDRESS_GET_LOCK_POS)
+
+struct __attribute((packed)) scmi_apcore_reset_address_get_p2a {
+ int32_t status;
+ uint32_t reset_address_low;
+ uint32_t reset_address_high;
+ uint32_t attributes;
+};
+
+#endif /* SCMI_APCORE_H */
diff --git a/module/scmi_apcore/include/mod_scmi_apcore.h b/module/scmi_apcore/include/mod_scmi_apcore.h
new file mode 100644
index 00000000..82fe61d6
--- /dev/null
+++ b/module/scmi_apcore/include/mod_scmi_apcore.h
@@ -0,0 +1,75 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Description:
+ * SCMI Core Configuration Protocol Support.
+ */
+
+#ifndef MOD_SCMI_APCORE_H
+#define MOD_SCMI_APCORE_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+/*!
+ * \ingroup GroupModules Modules
+ * \defgroup GroupSCMI_APCORE SCMI Core Configuration Protocol
+ * \{
+ */
+
+/*!
+ * \brief Platform reset register widths.
+ */
+enum mod_scmi_apcore_register_width {
+ /*! Single-word, 32-bit reset address registers supported */
+ MOD_SCMI_APCORE_REG_WIDTH_32,
+
+ /*! Double-word, 64-bit reset address registers supported */
+ MOD_SCMI_APCORE_REG_WIDTH_64,
+
+ /*! Number of valid register widths */
+ MOD_SCMI_APCORE_REG_WIDTH_COUNT,
+};
+
+/*!
+ * \brief Reset register group.
+ *
+ * \details Describes a set of reset registers that are contiguous in memory.
+ */
+struct mod_scmi_apcore_reset_register_group {
+ /*! Address of the first register in the group */
+ uintptr_t base_register;
+
+ /*! The number of registers in the group */
+ size_t register_count;
+};
+
+/*!
+ * \brief Module configuration.
+ */
+struct mod_scmi_apcore_config {
+ /*!
+ * \brief Pointer to the table of \ref mod_scmi_apcore_reset_register_group
+ * structures that define the reset registers within the platform.
+ */
+ const struct mod_scmi_apcore_reset_register_group
+ *reset_register_group_table;
+
+ /*!
+ * \brief Number of \ref mod_scmi_apcore_reset_register_group structures in
+ * \ref reset_register_group_table.
+ */
+ size_t reset_register_group_count;
+
+ /*! Width of the reset address supported by the platform */
+ enum mod_scmi_apcore_register_width reset_register_width;
+};
+
+/*!
+ * \}
+ */
+
+#endif /* MOD_SCMI_APCORE_H */