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author | Amit Daniel Kachhap <amit.kachhap@arm.com> | 2018-07-20 16:44:14 +0530 |
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committer | ronald-cron-arm <39518861+ronald-cron-arm@users.noreply.github.com> | 2018-10-18 17:22:34 +0000 |
commit | 6c803896b42233a5928342cd628319e1030f091a (patch) | |
tree | 33a0eed3c0fd36e33c4ea1c063dae0231cc60aca /product/sgi575 | |
parent | db3217661a0c6bc9fd9017dc38f9e9edcaf45ac8 (diff) |
sgi575/scp_ramfw: Add config for ddr_phy500
Change-Id: I9c94b28f15e05825d5fb742c037b80236816d27e
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Diffstat (limited to 'product/sgi575')
-rw-r--r-- | product/sgi575/scp_ramfw/config_ddr_phy500.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/product/sgi575/scp_ramfw/config_ddr_phy500.c b/product/sgi575/scp_ramfw/config_ddr_phy500.c new file mode 100644 index 00000000..3ea38caa --- /dev/null +++ b/product/sgi575/scp_ramfw/config_ddr_phy500.c @@ -0,0 +1,59 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <stdbool.h> +#include <fwk_element.h> +#include <fwk_module.h> +#include <mod_ddr_phy500.h> +#include <scp_system_mmap.h> + +/* Default configuration values for DDR PHY500 devices. */ +static const struct mod_ddr_phy500_reg ddr_reg_val = { + .INIT_COMPLETE = 0x00000001, + .READ_DELAY = 0x00000001, + .CAPTURE_MASK = 0x00000002, + .T_CTRL_DELAY = 0x0C000000, + .T_WRLAT = 0x00000001, + .T_RDDATA_EN = 0x00001600, + .T_RDLAT = 0x00000011, + .DFI_LP_ACK = 0x00030000, + .DFI_WR_PREMBL = 0x00000001, + .DELAY_SEL = 0x0000000D, + .REF_EN = 0x00000000, + .T_CTRL_UPD_MIN = 0x00000000, +}; + +/* Table of DDR PHY500 element descriptions. */ +static struct fwk_element ddr_phy500_element_table[] = { + [0] = { .name = "DDR_PHY500-0", + .data = &((struct mod_ddr_phy500_element_config) { + .ddr = SCP_DDR_PHY0, + }), + }, + [1] = { .name = "DDR_PHY500-1", + .data = &((struct mod_ddr_phy500_element_config) { + .ddr = SCP_DDR_PHY1, + }), + }, + [2] = { 0 }, /* Termination description. */ +}; + +static const struct fwk_element *ddr_phy500_get_element_table + (fwk_id_t module_id) +{ + return ddr_phy500_element_table; +} + +/* Configuration of the DDR PHY500 module. */ +struct fwk_module_config config_ddr_phy500 = { + .get_element_table = ddr_phy500_get_element_table, + .data = &((struct mod_ddr_phy500_module_config) { + .ddr_reg_val = &ddr_reg_val, + .initialize_init_complete = true, + .initialize_ref_en = true, + }), +}; |