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authorAmit Daniel Kachhap <amit.kachhap@arm.com>2018-07-20 18:09:13 +0530
committerronald-cron-arm <39518861+ronald-cron-arm@users.noreply.github.com>2018-10-18 17:22:34 +0000
commit1b938aa063a4ae3604e86bf6e354fb43a4c5df1e (patch)
treea465b340bdb801478dd6344c3cc81567ba2ebe36 /product/sgi575
parentd5b5932ab01ad3c2f564f686f345339db976d315 (diff)
sgi575/scp_ramfw: Add SDS support
Change-Id: I760441d33e67cc95ea9466616d32f1f66dc8645c Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Diffstat (limited to 'product/sgi575')
-rw-r--r--product/sgi575/include/sgi575_sds.h82
-rw-r--r--product/sgi575/include/sgi575_ssc.h41
-rw-r--r--product/sgi575/scp_ramfw/config_sds.c118
-rw-r--r--product/sgi575/scp_ramfw/firmware.mk2
4 files changed, 243 insertions, 0 deletions
diff --git a/product/sgi575/include/sgi575_sds.h b/product/sgi575/include/sgi575_sds.h
new file mode 100644
index 00000000..09881414
--- /dev/null
+++ b/product/sgi575/include/sgi575_sds.h
@@ -0,0 +1,82 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SGI575_SDS_H
+#define SGI575_SDS_H
+
+#include <mod_sds.h>
+
+/*
+ * Structure identifiers.
+ */
+enum sgi575_sds_struct_id {
+ SGI575_SDS_CPU_INFO = 1 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_FIRMWARE_VERSION = 2 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_PLATFORM_ID = 3 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_RESET_SYNDROME = 4 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_FEATURE_AVAILABILITY =
+ 5 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_CPU_BOOTCTR = 6 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+ SGI575_SDS_CPU_FLAGS = 7 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS),
+};
+
+/*
+ * Structure sizes.
+ */
+#define SGI575_SDS_CPU_INFO_SIZE 4
+#define SGI575_SDS_FIRMWARE_VERSION_SIZE 4
+#define SGI575_SDS_PLATFORM_ID_SIZE 8
+#define SGI575_SDS_RESET_SYNDROME_SIZE 4
+#define SGI575_SDS_FEATURE_AVAILABILITY_SIZE 4
+#define SGI575_SDS_CPU_BOOTCTR_SIZE 256
+#define SGI575_SDS_CPU_FLAGS_SIZE 256
+
+/*
+ * Field masks and offsets for the SGI575_SDS_AP_CPU_INFO structure.
+ */
+#define SGI575_SDS_CPU_INFO_PRIMARY_MASK 0xFFFFFFFF
+#define SGI575_SDS_CPU_INFO_PRIMARY_POS 0
+
+/*
+ * Platform information:
+ * Structure, field masks and offsets for the SGI575_SDS_PLATFORM_ID
+ * structure.
+ */
+struct sgi575_sds_platid {
+ /* Subsystem part number */
+ uint32_t platform_identifier;
+ /* Platform type information */
+ uint32_t platform_type_identifier;
+};
+
+#define SGI575_SDS_PLATID_PARTNO_MASK 0xFFF
+#define SGI575_SDS_PLATID_DESIGNER_MASK 0xFF000
+#define SGI575_SDS_PLATID_REV_MINOR_MASK 0xF00000
+#define SGI575_SDS_PLATID_REV_MAJOR_MASK 0xF000000
+#define SGI575_SDS_PLATID_CONFIG_MASK 0xF0000000
+#define SGI575_SDS_PLATID_TYPE_MASK 0xF
+
+#define SGI575_SDS_PLATID_PARTNO_POS 0
+#define SGI575_SDS_PLATID_DESIGNER_POS 12
+#define SGI575_SDS_PLATID_REV_MINOR_POS 20
+#define SGI575_SDS_PLATID_REV_MAJOR_POS 24
+#define SGI575_SDS_PLATID_CONFIG_POS 28
+
+#define SGI575_SDS_PLATID_TYPE_POS 0
+
+/*
+ * Field masks and offsets for the SGI575_SDS_FEATURE_AVAILABILITY structure.
+ */
+#define SGI575_SDS_FEATURE_FIRMWARE_MASK 0x1
+#define SGI575_SDS_FEATURE_DMC_MASK 0x2
+#define SGI575_SDS_FEATURE_MESSAGING_MASK 0x4
+
+#define SGI575_SDS_FEATURE_FIRMWARE_POS 0
+#define SGI575_SDS_FEATURE_DMC_POS 1
+#define SGI575_SDS_FEATURE_MESSAGING_POS 2
+
+#endif /* SGI575_SDS_H */
diff --git a/product/sgi575/include/sgi575_ssc.h b/product/sgi575/include/sgi575_ssc.h
new file mode 100644
index 00000000..683428ba
--- /dev/null
+++ b/product/sgi575/include/sgi575_ssc.h
@@ -0,0 +1,41 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SGI575_SSC_H
+#define SGI575_SSC_H
+
+#include <stdint.h>
+#include <fwk_macros.h>
+
+/*!
+ * \brief System Security Control (SSC) register definitions
+ */
+struct ssc_reg {
+ uint8_t RESERVED1[0x10 - 0x0];
+ FWK_R uint32_t SSC_DBGCFG_STAT;
+ FWK_W uint32_t SSC_DBGCFG_SET;
+ FWK_W uint32_t SSC_DBGCFG_CLR;
+ uint8_t RESERVED2[0x28 - 0x1C];
+ FWK_RW uint32_t SSC_AUXDBGCFG;
+ uint8_t RESERVED3[0x30 - 0x2C];
+ FWK_RW uint32_t SSC_GPRETN;
+ uint8_t RESERVED4[0x40 - 0x34];
+ FWK_R uint32_t SSC_VERSION;
+ uint8_t RESERVED5[0xFD0 - 0x44];
+ FWK_R uint32_t PID4;
+ uint8_t RESERVED6[0xFE0 - 0xFD4];
+ FWK_R uint32_t PID0;
+ FWK_R uint32_t PID1;
+ FWK_R uint32_t PID2;
+ FWK_R uint32_t PID3;
+ FWK_R uint32_t COMPID0;
+ FWK_R uint32_t COMPID1;
+ FWK_R uint32_t COMPID2;
+ FWK_R uint32_t COMPID3;
+};
+
+#endif /* SGI575_SSC_H */
diff --git a/product/sgi575/scp_ramfw/config_sds.c b/product/sgi575/scp_ramfw/config_sds.c
new file mode 100644
index 00000000..3cee87bd
--- /dev/null
+++ b/product/sgi575/scp_ramfw/config_sds.c
@@ -0,0 +1,118 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <stdbool.h>
+#include <fwk_assert.h>
+#include <fwk_element.h>
+#include <fwk_macros.h>
+#include <fwk_module.h>
+#include <fwk_module_idx.h>
+#include <mod_sds.h>
+#include <scp_software_mmap.h>
+#include <scp_sgi575_mmap.h>
+#include <scp_sgi575_pik.h>
+#include <scp_system_mmap.h>
+#include <sgi575_sds.h>
+#include <sgi575_ssc.h>
+
+static const uint32_t version_packed = FWK_BUILD_VERSION;
+static const uint32_t feature_flags = (SGI575_SDS_FEATURE_FIRMWARE_MASK |
+ SGI575_SDS_FEATURE_DMC_MASK |
+ SGI575_SDS_FEATURE_MESSAGING_MASK);
+
+const struct mod_sds_config sds_module_config = {
+ .region_base_address = SCP_SDS_MEM_BASE,
+ .region_size = SCP_SDS_MEM_SIZE,
+};
+
+static struct sgi575_sds_platid platid;
+
+static struct fwk_element sds_element_table[] = {
+ {
+ .name = "CPU Info",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_CPU_INFO,
+ .size = SGI575_SDS_CPU_INFO_SIZE,
+ .finalize = true,
+ }),
+ },
+ {
+ .name = "Firmware version",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_FIRMWARE_VERSION,
+ .size = SGI575_SDS_FIRMWARE_VERSION_SIZE,
+ .payload = &version_packed,
+ .finalize = true,
+ }),
+ },
+ {
+ .name = "Platform ID",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_PLATFORM_ID,
+ .size = SGI575_SDS_PLATFORM_ID_SIZE,
+ .payload = &platid,
+ .finalize = true,
+ }),
+ },
+ {
+ .name = "Reset Syndrome",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_RESET_SYNDROME,
+ .size = SGI575_SDS_RESET_SYNDROME_SIZE,
+ .payload = (void *)(&PIK_SCP->RESET_SYNDROME),
+ .finalize = true,
+ }),
+ },
+ {
+ .name = "Feature Availability",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_FEATURE_AVAILABILITY,
+ .size = SGI575_SDS_FEATURE_AVAILABILITY_SIZE,
+ .payload = &feature_flags,
+ .finalize = true,
+ }),
+ },
+#ifdef MODE_DEBUG
+ {
+ .name = "Boot Counters",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_CPU_BOOTCTR,
+ .size = SGI575_SDS_CPU_BOOTCTR_SIZE,
+ .finalize = true,
+ }),
+ },
+ {
+ .name = "CPU Flags",
+ .data = &((struct mod_sds_structure_desc) {
+ .id = SGI575_SDS_CPU_FLAGS,
+ .size = SGI575_SDS_CPU_FLAGS_SIZE,
+ .finalize = true,
+ }),
+ },
+#endif
+ { 0 }, /* Termination description. */
+};
+
+static const struct fwk_element *sds_get_element_table(fwk_id_t module_id)
+{
+ struct ssc_reg *ssc_regs = ((struct ssc_reg *)(SSC_BASE));
+
+ static_assert(BUILD_VERSION_MAJOR < UINT8_MAX, "Invalid version size");
+ static_assert(BUILD_VERSION_MINOR < UINT8_MAX, "Invalid version size");
+ static_assert(BUILD_VERSION_PATCH < UINT16_MAX, "Invalid version size");
+
+ platid.platform_identifier = ssc_regs->SSC_VERSION;
+ platid.platform_type_identifier = platid.platform_identifier &
+ SGI575_SDS_PLATID_PARTNO_MASK;
+
+ return sds_element_table;
+}
+
+struct fwk_module_config config_sds = {
+ .get_element_table = sds_get_element_table,
+ .data = &sds_module_config,
+};
diff --git a/product/sgi575/scp_ramfw/firmware.mk b/product/sgi575/scp_ramfw/firmware.mk
index f08332a3..b03f55f6 100644
--- a/product/sgi575/scp_ramfw/firmware.mk
+++ b/product/sgi575/scp_ramfw/firmware.mk
@@ -27,6 +27,7 @@ BS_FIRMWARE_MODULES := \
mhu \
smt \
scmi \
+ sds \
system_pll \
pik_clock \
css_clock \
@@ -49,6 +50,7 @@ BS_FIRMWARE_SOURCES := \
config_mhu.c \
config_smt.c \
config_scmi.c \
+ config_sds.c \
config_system_pll.c \
config_pik_clock.c \
config_css_clock.c \