n1sdp: scp_ramfw - add config files for apcontext and MPU

Change-Id: I04db52d4e2dd4f839c7ae88c1bf4cb7db7fd6e77
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>

2 files changed, 78 insertions, 0 deletions

diff --git a/product/n1sdp/scp_ramfw/config_apcontext.c b/product/n1sdp/scp_ramfw/config_apcontext.c
new file mode 100644
index 00000000..b7ee9f1c
--- /dev/null
+++ b/product/n1sdp/scp_ramfw/config_apcontext.c
@@ -0,0 +1,26 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_module.h>
+#include <fwk_module_idx.h>
+#include <mod_apcontext.h>
+#include <n1sdp_scp_software_mmap.h>
+#include <config_clock.h>
+
+/*
+ * AP Context module configuration
+ */
+static const struct mod_apcontext_config apcontext_data = {
+    .base = SCP_AP_CONTEXT_BASE,
+    .size = SCP_AP_CONTEXT_SIZE,
+    .clock_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_CLOCK,
+        CLOCK_IDX_INTERCONNECT),
+};
+
+struct fwk_module_config config_apcontext = {
+    .data = &apcontext_data,
+};
diff --git a/product/n1sdp/scp_ramfw/config_armv7m_mpu.c b/product/n1sdp/scp_ramfw/config_armv7m_mpu.c
new file mode 100644
index 00000000..e135922c
--- /dev/null
+++ b/product/n1sdp/scp_ramfw/config_armv7m_mpu.c
@@ -0,0 +1,52 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_macros.h>
+#include <fwk_module.h>
+#include <mod_armv7m_mpu.h>
+#include <n1sdp_scp_mmap.h>
+#include <n1sdp_scp_system_mmap.h>
+
+static const ARM_MPU_Region_t regions[] = {
+    { /* 0x0000_0000 - 0xFFFF_FFFF */
+        .RBAR = ARM_MPU_RBAR(0, 0x00000000),
+        .RASR = ARM_MPU_RASR(
+            1, ARM_MPU_AP_PRIV, 0, 1, 0, 1, 0, ARM_MPU_REGION_SIZE_4GB),
+    },
+    { /* 0x0080_0000 - 0x0088_0000 */
+        .RBAR = ARM_MPU_RBAR(1, SCP_RAM0_BASE),
+        .RASR = ARM_MPU_RASR(
+            0, ARM_MPU_AP_PRO, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512KB),
+    },
+    { /* 0x2000_0000 - 0x2003_FFFF */
+        .RBAR = ARM_MPU_RBAR(2, SCP_RAM1_BASE),
+        .RASR = ARM_MPU_RASR(
+            1, ARM_MPU_AP_PRIV, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB),
+    },
+    { /* 0xA400_0000 - 0xA400_0FFF*/
+        .RBAR = ARM_MPU_RBAR(3, SCP_TRUSTED_RAM_BASE),
+        .RASR = ARM_MPU_RASR(
+            1, ARM_MPU_AP_PRIV, 0, 1, 1, 1, 0, ARM_MPU_REGION_SIZE_4KB),
+    },
+    { /* 0x6540_0000 - 0x6540_00FF */
+        .RBAR = ARM_MPU_RBAR(4, SCP_MHU_SECURE_RAM),
+        .RASR = ARM_MPU_RASR(
+            1, ARM_MPU_AP_PRIV, 0, 1, 1, 1, 0, ARM_MPU_REGION_SIZE_256B),
+    },
+    { /* 0x6520_0000 - 0x6520_00FF */
+        .RBAR = ARM_MPU_RBAR(5, SCP_MHU_NONSECURE_RAM),
+        .RASR = ARM_MPU_RASR(
+            1, ARM_MPU_AP_PRIV, 0, 1, 1, 1, 0, ARM_MPU_REGION_SIZE_256B),
+    },
+};
+
+const struct fwk_module_config config_armv7m_mpu = {
+    .data = &((struct mod_armv7m_mpu_config){
+        .region_count = FWK_ARRAY_SIZE(regions),
+        .regions = regions,
+    }),
+};