morello/mcp_romfw: add mcp_romfw config files

Change-Id: I0d1c55647c9f3759490a86dfe105d86d55dd8753
Signed-off-by: Anurag Koul <anurag.koul@arm.com>

5 files changed, 94 insertions, 0 deletions

diff --git a/product/morello/mcp_romfw/config_clock.c b/product/morello/mcp_romfw/config_clock.c
new file mode 100644
index 00000000..4afc1846
--- /dev/null
+++ b/product/morello/mcp_romfw/config_clock.c
@@ -0,0 +1,10 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <fwk_module.h>
+
+const struct fwk_module_config config_clock = { 0 };
diff --git a/product/morello/mcp_romfw/config_fip.c b/product/morello/mcp_romfw/config_fip.c
new file mode 100644
index 00000000..b8bd9298
--- /dev/null
+++ b/product/morello/mcp_romfw/config_fip.c
@@ -0,0 +1,19 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2018-2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "morello_mcp_system_mmap.h"
+
+#include <mod_fip.h>
+
+#include <fwk_module.h>
+
+const struct fwk_module_config config_fip = {
+    .data = &((struct mod_fip_config){
+        .fip_base_address = MCP_QSPI_FLASH_BASE_ADDR,
+        .fip_nvm_size = MCP_QSPI_FLASH_SIZE,
+    })
+};
diff --git a/product/morello/mcp_romfw/config_morello_rom.c b/product/morello/mcp_romfw/config_morello_rom.c
new file mode 100644
index 00000000..734a8b68
--- /dev/null
+++ b/product/morello/mcp_romfw/config_morello_rom.c
@@ -0,0 +1,20 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "morello_mcp_system_mmap.h"
+
+#include <mod_fip.h>
+#include <mod_morello_rom.h>
+
+#include <fwk_module.h>
+
+const struct fwk_module_config config_morello_rom = {
+    .data = &((struct morello_rom_config){
+        .ramfw_base = MCP_RAM0_BASE,
+        .image_type = MOD_FIP_TOC_ENTRY_MCP_BL2,
+    })
+};
diff --git a/product/morello/mcp_romfw/config_pl011.c b/product/morello/mcp_romfw/config_pl011.c
new file mode 100644
index 00000000..47187bc1
--- /dev/null
+++ b/product/morello/mcp_romfw/config_pl011.c
@@ -0,0 +1,32 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "morello_mcp_mmap.h"
+#include "morello_system_clock.h"
+
+#include <mod_pl011.h>
+
+#include <fwk_element.h>
+#include <fwk_id.h>
+#include <fwk_module.h>
+
+struct fwk_module_config config_pl011 = {
+    .elements = FWK_MODULE_STATIC_ELEMENTS({
+        [0] = {
+            .name = "MCP UART",
+            .data =
+                &(struct mod_pl011_element_cfg){
+                    .reg_base = MCP_UART0_BASE,
+                    .baud_rate_bps = 115200,
+                    .clock_rate_hz = CLOCK_RATE_REFCLK,
+                    .clock_id = FWK_ID_NONE_INIT,
+                },
+        },
+
+        [1] = { 0 },
+    }),
+};
diff --git a/product/morello/mcp_romfw/fmw_cmsis.h b/product/morello/mcp_romfw/fmw_cmsis.h
new file mode 100644
index 00000000..34fb79fa
--- /dev/null
+++ b/product/morello/mcp_romfw/fmw_cmsis.h
@@ -0,0 +1,13 @@
+/*
+ * Arm SCP/MCP Software
+ * Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef FMW_CMSIS_H
+#define FMW_CMSIS_H
+
+#include <fmw_cmsis_mcp.h>
+
+#endif /* FMW_CMSIS_H */