diff options
| author | Deepak Pandey <Deepak.Pandey@arm.com> | 2018-12-13 12:00:34 +0530 |
|---|---|---|
| committer | ronald-cron-arm <39518861+ronald-cron-arm@users.noreply.github.com> | 2018-12-21 12:39:56 +0000 |
| commit | 0bd7b1798b0c7e0325758e877e8198a1740439a9 (patch) | |
| tree | 89839759c164be5b4689a5a1d3485c0c93552e8a | |
| parent | f003f2fb8da3e922ce573c16f10e96ff3c3a4c7a (diff) | |
n1sdp/mcp_rom: add Makefile and linker configuration file
Change-Id: Idcacc13d19fd8e9622783b26991d6a67cb23b7ca
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
| -rw-r--r-- | product/n1sdp/mcp_romfw/firmware.mk | 30 | ||||
| -rw-r--r-- | product/n1sdp/mcp_romfw/fmw_memory.ld.S | 32 |
2 files changed, 62 insertions, 0 deletions
diff --git a/product/n1sdp/mcp_romfw/firmware.mk b/product/n1sdp/mcp_romfw/firmware.mk new file mode 100644 index 00000000..a44fe955 --- /dev/null +++ b/product/n1sdp/mcp_romfw/firmware.mk @@ -0,0 +1,30 @@ +# +# Arm SCP/MCP Software +# Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# +# The order of the modules in the BS_FIRMWARE_MODULES list is the order in which +# the modules are initialized, bound, started during the pre-runtime phase. +# + +BS_FIRMWARE_CPU := cortex-m7 +BS_FIRMWARE_HAS_MULTITHREADING := no +BS_FIRMWARE_HAS_NOTIFICATION := yes +BS_FIRMWARE_MODULE_HEADERS_ONLY := timer \ + power_domain + +BS_FIRMWARE_MODULES := \ + pl011 \ + log \ + n1sdp_flash \ + n1sdp_rom \ + clock + +BS_FIRMWARE_SOURCES := \ + config_log.c \ + config_n1sdp_flash.c \ + config_n1sdp_rom.c \ + config_clock.c + +include $(BS_DIR)/firmware.mk diff --git a/product/n1sdp/mcp_romfw/fmw_memory.ld.S b/product/n1sdp/mcp_romfw/fmw_memory.ld.S new file mode 100644 index 00000000..a44177af --- /dev/null +++ b/product/n1sdp/mcp_romfw/fmw_memory.ld.S @@ -0,0 +1,32 @@ +/* + * Arm SCP/MCP Software + * Copyright (c) 2018, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + * Description: + * ROM firmware memory layout for the linker script. + */ + +#ifndef FMW_MEMORY_LD_S +#define FMW_MEMORY_LD_S + +#include <n1sdp_mcp_system_mmap.h> + +#define FIRMWARE_MEM_MODE FWK_MEM_MODE_DUAL_REGION_RELOCATION + +/* + * ROM memory + */ +#define FIRMWARE_MEM0_SIZE MCP_ROM_SIZE +#define FIRMWARE_MEM0_BASE MCP_ROM_BASE + +/* + * RAM memory + */ +#define FIRMWARE_MEM1_SIZE MCP_RAM1_SIZE +#define FIRMWARE_MEM1_BASE MCP_RAM1_BASE + +#define FIRMWARE_STACK_SIZE (1 * 1024) + +#endif /* FMW_MEMORY_LD_S */ |