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authorsudipto paul <sudipto.paul@arm.com>2019-06-27 19:08:28 +0100
committersudipto paul <sudipto.paul@arm.com>2019-06-27 19:08:28 +0100
commit7cad8dc24df47f174387553b59dbaf99ab2f7392 (patch)
tree52c05858a77990687728a4664ff65adfb5c52b60
parentd78eb68dbadd55faae92829a86c3be6c43d0b495 (diff)
update scp patch to add a delay between the training and the BDF parsingN1SDP-ALPHA2-19.07
Signed-off-by: sudipto paul <sudipto.paul@arm.com>
-rw-r--r--scp/0001-n1sdp-add-workaround-for-PCIe-to-avoid-SLVERR-fault.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/scp/0001-n1sdp-add-workaround-for-PCIe-to-avoid-SLVERR-fault.patch b/scp/0001-n1sdp-add-workaround-for-PCIe-to-avoid-SLVERR-fault.patch
index cf72739..f694045 100644
--- a/scp/0001-n1sdp-add-workaround-for-PCIe-to-avoid-SLVERR-fault.patch
+++ b/scp/0001-n1sdp-add-workaround-for-PCIe-to-avoid-SLVERR-fault.patch
@@ -1,4 +1,4 @@
-From 981b881bf3905c9f87df17ff4eb5780e41af5cab Mon Sep 17 00:00:00 2001
+From 14f583c6ec444b1d3ec3e1f78631039b2a86d057 Mon Sep 17 00:00:00 2001
From: Manoj Kumar <manoj.kumar3@arm.com>
Date: Thu, 23 May 2019 17:38:25 +0100
Subject: [PATCH] n1sdp: add workaround for PCIe to avoid SLVERR fault
@@ -77,7 +77,7 @@ index d3b06f2..6061a9d 100644
include $(BS_DIR)/lib.mk
diff --git a/product/n1sdp/module/n1sdp_pcie/src/mod_n1sdp_pcie.c b/product/n1sdp/module/n1sdp_pcie/src/mod_n1sdp_pcie.c
-index 10c5a56..b6d9a8b 100644
+index 362040d..5de48ca 100644
--- a/product/n1sdp/module/n1sdp_pcie/src/mod_n1sdp_pcie.c
+++ b/product/n1sdp/module/n1sdp_pcie/src/mod_n1sdp_pcie.c
@@ -24,6 +24,9 @@
@@ -98,9 +98,9 @@ index 10c5a56..b6d9a8b 100644
return dev_ctx->config->ccix_capable ? FWK_SUCCESS : status;
}
pcie_ctx.log_api->log(MOD_LOG_GROUP_INFO, "Done\n");
-@@ -322,6 +326,8 @@ static int n1sdp_pcie_setup(struct n1sdp_pcie_dev_ctx *dev_ctx)
- else
- pcie_ctx.log_api->log(MOD_LOG_GROUP_INFO, "Done\n");
+@@ -329,6 +333,8 @@ static int n1sdp_pcie_setup(struct n1sdp_pcie_dev_ctx *dev_ctx)
+ pcie_ctx.timer_api->delay(FWK_ID_ELEMENT(FWK_MODULE_IDX_TIMER, 0),
+ PCIE_LINK_TRAINING_TIMEOUT);
+ pcie_bus_enumeration(dev_ctx->config);
+