diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2016-07-21 00:22:21 +0800 |
|---|---|---|
| committer | Jeff Fan <jeff.fan@intel.com> | 2016-08-17 20:01:00 +0800 |
| commit | 7c3f2a1253d288b1b0867d973a50cd3ed64e37a4 (patch) | |
| tree | ff28d583b0bc5ffba850b8bc7714ae04677c9522 /UefiCpuPkg | |
| parent | b8b04307ebd0f200beb34f0ca2a01ff7b3514972 (diff) | |
UefiCpuPkg/MpInitLib: Fill MP_CPU_EXCHANGE_INFO fields
FillExchangeInfoData() is used to fill MP_CPU_EXCHANGE_INFO date exchanged
between C code and assembly code of AP reset vector.
v5:
1. Reference ApWakeupFunction instead of ApCFunction.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/Library/MpInitLib/MpLib.c | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index a4a2c440c0..d081111fbf 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -17,6 +17,47 @@ EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;
/**
+ The function will check if BSP Execute Disable is enabled.
+ DxeIpl may have enabled Execute Disable for BSP,
+ APs need to get the status and sync up the settings.
+
+ @retval TRUE BSP Execute Disable is enabled.
+ @retval FALSE BSP Execute Disable is not enabled.
+**/
+BOOLEAN
+IsBspExecuteDisableEnabled (
+ VOID
+ )
+{
+ UINT32 Eax;
+ CPUID_EXTENDED_CPU_SIG_EDX Edx;
+ MSR_IA32_EFER_REGISTER EferMsr;
+ BOOLEAN Enabled;
+
+ Enabled = FALSE;
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
+ if (Eax >= CPUID_EXTENDED_CPU_SIG) {
+ AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);
+ //
+ // CPUID 0x80000001
+ // Bit 20: Execute Disable Bit available.
+ //
+ if (Edx.Bits.NX != 0) {
+ EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
+ //
+ // MSR 0xC0000080
+ // Bit 11: Execute Disable Bit enable.
+ //
+ if (EferMsr.Bits.NXE != 0) {
+ Enabled = TRUE;
+ }
+ }
+ }
+
+ return Enabled;
+}
+
+/**
Get the Application Processors state.
@param[in] CpuData The pointer to CPU_AP_DATA of specified AP
@@ -407,6 +448,44 @@ ApWakeupFunction ( }
/**
+ This function will fill the exchange info structure.
+
+ @param[in] CpuMpData Pointer to CPU MP Data
+
+**/
+VOID
+FillExchangeInfoData (
+ IN CPU_MP_DATA *CpuMpData
+ )
+{
+ volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;
+
+ ExchangeInfo = CpuMpData->MpCpuExchangeInfo;
+ ExchangeInfo->Lock = 0;
+ ExchangeInfo->StackStart = CpuMpData->Buffer;
+ ExchangeInfo->StackSize = CpuMpData->CpuApStackSize;
+ ExchangeInfo->BufferStart = CpuMpData->WakeupBuffer;
+ ExchangeInfo->ModeOffset = CpuMpData->AddressMap.ModeEntryOffset;
+
+ ExchangeInfo->CodeSegment = AsmReadCs ();
+ ExchangeInfo->DataSegment = AsmReadDs ();
+
+ ExchangeInfo->Cr3 = AsmReadCr3 ();
+
+ ExchangeInfo->CFunction = (UINTN) ApWakeupFunction;
+ ExchangeInfo->NumApsExecuting = 0;
+ ExchangeInfo->CpuMpData = CpuMpData;
+
+ ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();
+
+ //
+ // Get the BSP's data of GDT and IDT
+ //
+ AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);
+ AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
+}
+
+/**
MP Initialize Library initialization.
This service will allocate AP reset vector and wakeup all APs to do APs
|