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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-10-04 14:17:51 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-11-17 17:46:06 +0000 |
| commit | f8f11924f454b0ee519de05d92d0c7881a478bbe (patch) | |
| tree | 5d10d82cb0077f6568c35491898c5c767f7fb51d /Platform/Socionext | |
| parent | fca178afd6a44ce0a8c2c7f2e4a2bded78ce6134 (diff) | |
Silicon/SynQuacerPciHostBridgeLib: add workaround to support 32-bit only cards
Implement workaround suggested by Socionext to get legacy endpoints
with 32-bit BARs working. This fixes the issue on Developer Box with
the onboard ASM1061 SATA controller.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/Socionext')
0 files changed, 0 insertions, 0 deletions