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authorGraeme Gregory <graeme.gregory@linaro.org>2016-06-22 16:25:19 +0100
committerLeif Lindholm <leif.lindholm@linaro.org>2016-06-28 11:14:56 +0100
commit697d58bd4a4d9776daf052e054170dcf8f310f65 (patch)
treec8a4266a48f86e8afdb06271c756c6ba01249aaa /Platforms
parentb52d0b38cfb642a34534a63e045c903d43263adb (diff)
Platforms/ARM/VExpress: Fix FVP FADT version
MADT will now compile with v6.1 fields so we need to bump the FADT to indicate v6.1 compatability otherwise kernel will fail to parse MADT correctly and issue the error "No valid GICC entries exist". Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org> Tested-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platforms')
-rw-r--r--Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl3
1 files changed, 2 insertions, 1 deletions
diff --git a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl
index c288ae2..b52413f 100644
--- a/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl
+++ b/Platforms/ARM/VExpress/AcpiTables/rtsm_ve-aemv8a/facp.asl
@@ -35,7 +35,7 @@
[0004] Signature : "FACP"
[0004] Table Length : 0000010C
-[0001] Revision : 05
+[0001] Revision : 06
[0001] Checksum : 18
[0006] Oem ID : "LINARO"
[0008] Oem Table ID : "RTSMVEV8"
@@ -195,3 +195,4 @@
[0001] Encoded Access Width : 01 [Byte Access:8]
[0008] Address : 0000000000000000
+[0008] Hypervisor ID : 0000000000000000