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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-04-19 09:32:19 +0200
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-05-18 10:05:22 +0200
commit08cdfb2f7d8d3efbb0894ad2e796148b66c1f120 (patch)
tree3e863041771f9a153d74c77b804da818f57031a4 /Platforms
parent9c7a9a67eb0ac68b48f0f3357fcef52ef3a23f77 (diff)
Platforms/ARM: move FVP to unicore PrePi
Currently, the only supported way of running Tianocore on FVP is using ARM Trusted Firmware at EL3, in which case only a single core will enter the UEFI firmware at EL2. This means we can move to the UniCore flavor of PrePi/PrePeiCore, which now have been made compatible with running on an otherwise MpCore capable system. So replace the .inf references, and drop or update the PCDs related to secondary boot as appropriate. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Diffstat (limited to 'Platforms')
-rw-r--r--Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc18
-rw-r--r--Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf4
2 files changed, 7 insertions, 15 deletions
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
index 78330d6..92af088 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
@@ -90,9 +90,8 @@
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Fixed Virtual Platform"
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ARM-FVP"
- # Up to 8 cores on Base models. This works fine if model happens to have less.
- gArmPlatformTokenSpaceGuid.PcdCoreCount|8
- gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+ # Only one core enters UEFI, and PSCI is implemented in EL3 by ATF
+ gArmPlatformTokenSpaceGuid.PcdCoreCount|1
#
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
@@ -106,18 +105,11 @@
gArmTokenSpaceGuid.PcdVFPEnabled|1
- # FVP models can have 2 clusters with 4 cpus each
- # Stacks for MPCores in Secure World
- # Trusted SRAM (DRAM on Foundation model)
- gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x04000000
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800
-
# Stacks for MPCores in Normal World
# Non-Trusted SRAM
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x0
# System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address space)
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
@@ -213,14 +205,14 @@
#
!ifdef EDK2_SKIP_PEICORE
# UEFI is placed in RAM by bootloader
- ArmPlatformPkg/PrePi/PeiMPCore.inf {
+ ArmPlatformPkg/PrePi/PeiUniCore.inf {
<LibraryClasses>
ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
}
!else
# UEFI lives in FLASH and copies itself to RAM
- ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+ ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
MdeModulePkg/Core/Pei/PeiMain.inf
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
index 394a170..ff126ad 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf
@@ -239,9 +239,9 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
!if $(EDK2_SKIP_PEICORE) == 1
- INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+ INF ArmPlatformPkg/PrePi/PeiUniCore.inf
!else
- INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+ INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf