diff options
| author | Lina Iyer <lina.iyer@linaro.org> | 2014-10-24 17:40:22 -0600 |
|---|---|---|
| committer | Andrey Konovalov <andrey.konovalov@linaro.org> | 2014-11-19 18:35:02 +0300 |
| commit | 9b85e2f0611b9ad95886c0fd241c9f0367b18186 (patch) | |
| tree | 4c2e451be90bd4daf8a7fdff58d07dd7ef7362c9 | |
| parent | b9f7efbf616741adc00fd34d341437ac1131bb35 (diff) | |
arm: dts: qcom: Add idle states device nodes for 8974
Add allowable C-States for each cpu using the cpu-idle-states node.
Support Standby and Standalone power collapse (power down that does not
affect any SoC idle states) for each cpu.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index a200883f7fed..819a6f407e70 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -25,6 +25,7 @@ clock-names = "cpu"; clock-latency = <100000>; qcom,saw = <&saw0>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu1: cpu@1 { @@ -38,6 +39,7 @@ clock-names = "cpu"; clock-latency = <100000>; qcom,saw = <&saw1>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu2: cpu@2 { @@ -51,6 +53,7 @@ clock-names = "cpu"; clock-latency = <100000>; qcom,saw = <&saw2>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; cpu3: cpu@3 { @@ -64,6 +67,7 @@ clock-names = "cpu"; clock-latency = <100000>; qcom,saw = <&saw3>; + cpu-idle-states = <&CPU_STBY &CPU_SPC>; }; L2: l2-cache { @@ -71,6 +75,22 @@ cache-level = <2>; qcom,saw = <&saw_l2>; }; + + idle-states { + CPU_STBY: standby { + compatible = "qcom,idle-state-stby", "arm,idle-state"; + entry-latency-us = <1>; + exit-latency-us = <1>; + min-residency-us = <2>; + }; + + CPU_SPC: spc { + compatible = "qcom,idle-state-spc", "arm,idle-state"; + entry-latency-us = <150>; + exit-latency-us = <200>; + min-residency-us = <2000>; + }; + }; }; cpu-pmu { |