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Diffstat (limited to 'arch/arm/core/fault.c')
-rw-r--r--arch/arm/core/fault.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/core/fault.c b/arch/arm/core/fault.c
index 9586621c5..b5d60d7fb 100644
--- a/arch/arm/core/fault.c
+++ b/arch/arm/core/fault.c
@@ -70,7 +70,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
esf->pc);
#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7)
+#elif defined(CONFIG_ARMV7_M)
int escalation = 0;
if (3 == fault) { /* hard fault */
@@ -124,7 +124,7 @@ static void _FaultThreadShow(const NANO_ESF *esf)
}
#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7)
+#elif defined(CONFIG_ARMV7_M)
/**
*
@@ -266,7 +266,7 @@ static void _HardFault(const NANO_ESF *esf)
#if defined(CONFIG_ARMV6_M)
_FaultThreadShow(esf);
-#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7)
+#elif defined(CONFIG_ARMV7_M)
if (_ScbHardFaultIsBusErrOnVectorRead()) {
PR_EXC(" Bus fault on vector table read\n");
} else if (_ScbHardFaultIsForced()) {
@@ -327,7 +327,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault)
_HardFault(esf);
break;
#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7)
+#elif defined(CONFIG_ARMV7_M)
case 4:
_MpuFault(esf, 0);
break;
@@ -388,7 +388,7 @@ void _Fault(const NANO_ESF *esf)
void _FaultInit(void)
{
#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7)
+#elif defined(CONFIG_ARMV7_M)
_ScbDivByZeroFaultEnable();
#else
#error Unknown ARM architecture