diff options
author | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2016-12-31 14:41:19 +0000 |
---|---|---|
committer | Kumar Gala <kumar.gala@linaro.org> | 2017-01-12 09:46:25 -0600 |
commit | 84cb997c62af43b99836daf3043894573b26782d (patch) | |
tree | 0aed50e5d004d7b64b1707e7858b9fcd97566d39 /arch/arm/core/swap.S | |
parent | ef8200dfcd5d86683f7ed1af0f83559099791b05 (diff) |
arm: Adjust cortex-m7 support to reflect its ARMv7-M architecture.
The cortex-m7 is an implementation of armv7-m. Adjust the Kconfig
support for cortex-m7 to reflect this and drop the unnecessary,
explicit, conditional compilation.
Change-Id: I6ec20e69c8c83c5a80b1f714506f7f9e295b15d5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Diffstat (limited to 'arch/arm/core/swap.S')
-rw-r--r-- | arch/arm/core/swap.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/core/swap.S b/arch/arm/core/swap.S index 64f487cc0..93f18e0f2 100644 --- a/arch/arm/core/swap.S +++ b/arch/arm/core/swap.S @@ -33,7 +33,7 @@ _ASM_FILE_PROLOGUE GTEXT(_Swap) #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) GTEXT(__svc) #else #error Unknown ARM architecture @@ -88,7 +88,7 @@ SECTION_FUNC(TEXT, __pendsv) mov r7, ip /* store r8-12 */ stmea r0!, {r3-r7} -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) stmia r0, {v1-v8, ip} #ifdef CONFIG_FP_SHARING add r0, r2, #_thread_offset_to_preempt_float @@ -111,7 +111,7 @@ SECTION_FUNC(TEXT, __pendsv) /* protect the kernel state while we play with the thread lists */ #if defined(CONFIG_ARMV6_M) cpsid i -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) movs.n r0, #_EXC_IRQ_DEFAULT_PRIO msr BASEPRI, r0 #else @@ -170,7 +170,7 @@ _thread_irq_disabled: /* restore r4-r7, go back 9*4 bytes to the start of the stored block */ subs r0, #36 ldmia r0!, {r4-r7} -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) /* restore BASEPRI for the incoming thread */ msr BASEPRI, r0 @@ -192,7 +192,7 @@ _thread_irq_disabled: bx lr #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) /** * * @brief Service call handler @@ -316,7 +316,7 @@ SECTION_FUNC(TEXT, _Swap) * of a higher priority pending. */ cpsie i -#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) svc #0 #else #error Unknown ARM architecture |