diff options
| author | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2016-12-31 13:21:43 +0000 |
|---|---|---|
| committer | Kumar Gala <kumar.gala@linaro.org> | 2017-01-12 09:46:25 -0600 |
| commit | ef8200dfcd5d86683f7ed1af0f83559099791b05 (patch) | |
| tree | e904ec08a97bd5a8643203a844b91226c3de0820 /arch/arm/core/fault.c | |
| parent | 727dc2c5d6800ff47a627e0f2dc51d3b3735f897 (diff) | |
arm: Replace CONFIG_CPU_CORTEX_M3_M4 with CONFIG_ARMV7_M
Precursor patches have arranged that conditional compilation hanging
on CONFIG_CPU_CORTEX_M3_M4 provides support for ARMv7-M, rename the
config variable to reflect this.
Change-Id: Ifa56e3c1c04505d061b2af3aec9d8b9e55b5853d
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Diffstat (limited to 'arch/arm/core/fault.c')
| -rw-r--r-- | arch/arm/core/fault.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/core/fault.c b/arch/arm/core/fault.c index 44e225d09..9586621c5 100644 --- a/arch/arm/core/fault.c +++ b/arch/arm/core/fault.c @@ -70,7 +70,7 @@ void _FaultDump(const NANO_ESF *esf, int fault) esf->pc); #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) int escalation = 0; if (3 == fault) { /* hard fault */ @@ -124,7 +124,7 @@ static void _FaultThreadShow(const NANO_ESF *esf) } #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) /** * @@ -266,7 +266,7 @@ static void _HardFault(const NANO_ESF *esf) #if defined(CONFIG_ARMV6_M) _FaultThreadShow(esf); -#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) if (_ScbHardFaultIsBusErrOnVectorRead()) { PR_EXC(" Bus fault on vector table read\n"); } else if (_ScbHardFaultIsForced()) { @@ -327,7 +327,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault) _HardFault(esf); break; #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) case 4: _MpuFault(esf, 0); break; @@ -388,7 +388,7 @@ void _Fault(const NANO_ESF *esf) void _FaultInit(void) { #if defined(CONFIG_ARMV6_M) -#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7) +#elif defined(CONFIG_ARMV7_M) || defined(CONFIG_CPU_CORTEX_M7) _ScbDivByZeroFaultEnable(); #else #error Unknown ARM architecture |