aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/cpu.h
AgeCommit message (Expand)Author
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard
2014-09-25target-ppc: Use cpu_exec_interrupt qom hookRichard Henderson
2014-06-29target-ppc: enable virtio endian ambivalent supportGreg Kurz
2014-06-27target-ppc: Add DFP to Emulated Instructions FlagTom Musta
2014-06-16spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODEAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's Event Based Branch (EBB) control SPRsAlexey Kardashevskiy
2014-06-16KVM: target-ppc: Enable TM state migrationAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's TM SPRsAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's MMCR2/MMCRS SPRsAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's FSCR SPRAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's TIR SPRAlexey Kardashevskiy
2014-06-16target-ppc: Add HID4 SPR for PPC970Alexey Kardashevskiy
2014-06-16target-ppc: Add PMC7/8 to 970 classAlexey Kardashevskiy
2014-06-16target-ppc: Add "POWER" prefix to MMCRA PMU registersAlexey Kardashevskiy
2014-06-16target-ppc: Copy and split gen_spr_7xx() for 970Alexey Kardashevskiy
2014-06-16target-ppc: Merge 970FX and 970MP into a single 970 classAlexey Kardashevskiy
2014-06-16target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRsAlexey Kardashevskiy
2014-06-16PPC: e500: Merge 32 and 64 bit SPE emulationAlexander Graf
2014-06-16spapr: Limit threads per core according to current compatibility modeAlexey Kardashevskiy
2014-06-16target-ppc: Implement "compat" CPU optionAlexey Kardashevskiy
2014-06-16PPC: Properly emulate L1CSR0 and L1CSR1Alexander Graf
2014-06-16PPC: Add L1CFG1 SPR emulationAlexander Graf
2014-06-16PPC: Add definitions for GIVORsAlexander Graf
2014-05-13cpu: make CPU_INTERRUPT_RESET available on all targetsPaolo Bonzini
2014-04-08PPC: Clean up DECR implementationAlexander Graf
2014-03-20target-ppc: Introduce powerisa-207-server flagAlexey Kardashevskiy
2014-03-20target-ppc: Reset SPRs on CPU resetAlexey Kardashevskiy
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber
2014-03-05target-ppc: add PowerPCCPU::cpu_dt_idAlexey Kardashevskiy
2014-03-05target-ppc: Fix htab_mask calculationAneesh Kumar K.V
2014-03-05target-ppc: Altivec 2.07: Update AVR StructureTom Musta
2014-03-05target-ppc: Altivec 2.07: Add Instruction FlagTom Musta
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta
2014-03-05target-ppc: Add Flag for ISA 2.07 Load/Store Quadword InstructionsTom Musta
2014-03-05target-ppc: Add Target Address SPR (TAR) to Power8Tom Musta
2014-03-05target-ppc: Add Flag for bctarTom Musta
2014-03-05target-ppc: Add Flag for Power ISA V2.06 Floating Point Test InstructionsTom Musta
2014-03-05target-ppc: Add Flag for ISA V2.06 Floating Point ConversionTom Musta
2014-03-05target-ppc: Add Flag for ISA2.06 Atomic InstructionsTom Musta
2014-03-05target-ppc: Add Flag for ISA2.06 Divide Extended InstructionsTom Musta
2014-03-05target-ppc: Add ISA2.06 bpermd InstructionTom Musta
2014-03-05target-ppc: VSX Stage 4: Add VSX 2.07 FlagTom Musta
2014-03-05target-ppc: fix SPR_CTRL/SPR_UCTRL register numbersAlexey Kardashevskiy
2014-03-05target-ppc: fix LPCR SPR numberAlexey Kardashevskiy
2013-12-20Add MSR VSX and Associated ExceptionTom Musta
2013-12-20Declare and Enable VSXTom Musta
2013-10-25target-ppc: Use #define for max slb entriesAneesh Kumar K.V
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-06 10:00:33 +0000