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2014-03-17tcg-sparc: Convert to new ldst opcodesRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Convert to new ldst helpersRichard Henderson
All of the helpers with the explicit big/little endian option require the return address as a parameter. Acquire this via a trampoline. Move the load of areg0 into the trampoline. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Tidy tcg_out_tlb_load interfaceRichard Henderson
Pass address registers explicitly, rather than as indicies of args[]. It's two argument registers either way. Use more TCGReg as appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Use TCGMemOp within qemu_ldst routinesRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Improve tcg_out_moviRichard Henderson
If bits 31:13 are zero, reduce the insn count by one. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Dont handle constant arguments to ext32 opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Don't handle remainderRichard Henderson
The generic fallback is exactly what we implemented. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Use intptr_t as appropriateRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Tidy call+jump patternsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Fix tlb readRichard Henderson
We were computing the full address into %o0 and then not using it. Adjust some of the computation to rely less on having to pull immediate values into registers. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-17tcg-sparc: Fix ld64 for 32-bit modeRichard Henderson
Since were not using an annulled branch, we need to put a nop in the delay slot. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson
Step two in the transition, adding the new ldst opcodes. Keep the old opcodes around until all backends support the new opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-be-null.hRichard Henderson
This is a no-op backend data implementation, for those targets that are not currently using the load/store optimization path. This is prepatory to always requiring these functions in all backends. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-20tcg-sparc: Fix parenthesis warningRichard Henderson
error: suggest parentheses around comparison in operand of ‘&’ [-Werror=parentheses] Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-09-02exec: Split softmmu_defs.hRichard Henderson
The _cmmu helpers can be moved to exec-all.h. The helpers that are used from TCG will shortly need access to tcg_target_long so move their declarations into tcg.h. This requires minor include adjustments to all TCG backends. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change tcg_out_ld/st offset to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change relocation offsets to intptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Allow TCG_TARGET_REG_BITS to be specified independantlyRichard Henderson
There are several hosts for which it would be useful to use the available 64-bit registers in a 32-bit pointer environment. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Change flush_icache_range arguments to uintptr_tRichard Henderson
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02tcg: Add muluh and mulsh opcodesRichard Henderson
Use them in places where mulu2 and muls2 are used. Optimize mulx2 with dead low part to mulxh. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Move the CIE and FDE header definitions to common codeRichard Henderson
These will necessarily be the same layout for all hosts. This limits the amount of boilerplate required to implement jit debug for a host. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-09tcg: Split rem requirement from div requirementRichard Henderson
There are several hosts with only a "div" insn. Remainder is computed manually from the quotient and inputs. We can do this generically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-03-03tcg-sparc: fix buildBlue Swirl
Fix build breakage by 803d805bcef4ea7b7d6ef0b4929263e1160d6b3c: make tcg_out_addsub2() always available. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson
Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-sparc: Always implement 32-bit multiword opsRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19janitor: add guards to headersPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-19Merge branch 'linux-user-for-upstream' of ↵Aurelien Jarno
git://git.linaro.org/people/rikuvoipio/qemu * 'linux-user-for-upstream' of git://git.linaro.org/people/rikuvoipio/qemu: linux-user: register align p{read, write}64 linux-user: ppc: mark as long long aligned tcg: Remove TCG_TARGET_HAS_GUEST_BASE define configure: Remove unnecessary host_guest_base code linux-user: If loading fails, print error as string, not number linux-user: Fix siginfo handling alpha-linux-user: Fix sigaltstack structure definition linux-user: Implement gethostname linux-user: Perform more checks on iovec lists linux-user: fix multi-threaded /proc/self/maps linux-user: fix statfs
2012-10-13tcg-sparc: Emit MOVR insns for setcond_i64 and movcond_64Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Emit BPr insns for brcond_i64Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Drop use of Bicc in favor of BPccRichard Henderson
Now that we're always sparcv9, we can not bother using Bicc for 32-bit branches and BPcc for 64-bit branches and instead always use BPcc. New interfaces allow less direct use of tcg_out32 and raw numbers inside the qemu_ld/st routines. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Optimize setcond2 equality compare with 0.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Use Z constraint for %g0Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix add2/sub2Richard Henderson
We must care not to clobber the high parts before we consume them. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix setcondRichard Henderson
The set of comparisons that can immediately use the carry are LTU/GEU, not LTU/LEU. Don't swap operands when we need a temp register; the register may already be in use from setcond2. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix qemu_st for 32-bitRichard Henderson
The datalo variable is still live in the miss path. Use another when reconstructing the full data value. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix setcond2Richard Henderson
Like brcond2, use tcg_high_cond. Use movcc instead of branches. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Implement movcond.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13tcg-sparc: Fix brcond2Richard Henderson
Much the same problem as recently fixed for hppa. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-12tcg: Remove TCG_TARGET_HAS_GUEST_BASE definePeter Maydell
GUEST_BASE support is now supported by all TCG backends, and is now mandatory. Drop the now-pointless TCG_TARGET_HAS_GUEST_BASE define (set by every backend) and the error if it is unset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2012-10-06tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYSRichard Henderson
There are several cases that can be handled easier inside both translators and code generators if we have out-of-band values for conditions. It's easy enough to handle ALWAYS and NEVER in the natural way inside the tcg middle-end. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-06tcg: remove obsolete jmp opAurelien Jarno
The TCG jmp operation doesn't really make sense in the QEMU context, it is unused, it is not implemented by some targets, and it is wrongly implemented by some others. This patch simply removes it. Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Stefan Weil<sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22Merge branch 'tcg-sparc' of git://repo.or.cz/qemu/rthBlue Swirl
* 'tcg-sparc' of git://repo.or.cz/qemu/rth: tcg-sparc: Preserve branch destinations during retranslation tcg-sparc: Fix and enable direct TB chaining. tcg-sparc: Add %g/%o registers to alloc_order tcg-sparc: Use defines for temporaries. tcg-sparc: Mask shift immediates to avoid illegal insns. tcg-sparc: Clean up cruft stemming from attempts to use global registers. tcg-sparc: Change AREG0 in generated code to %i0. tcg-sparc: Support GUEST_BASE. tcg-sparc: Fix qemu_ld/st to handle 32-bit host. tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode. tcg-sparc: Don't MAP_FIXED on top of the program tcg-sparc: Fix ADDX opcode. tcg-sparc: Hack in qemu_ld/st64 for 32-bit. linux-user: Use memcpy in get_user/put_user.
2012-09-22tcg: Remove tcg_target_get_call_iarg_regs_countStefan Weil
The TCG targets no longer need individual implementations. Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9, 'flags' is no longer used in tcg_target_get_call_iarg_regs_count. The remaining tcg_target_get_call_iarg_regs_count is trivial and only called once. Therefore the patch eliminates it completely. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-sparc: Preserve branch destinations during retranslationRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Fix and enable direct TB chaining.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Add %g/%o registers to alloc_orderRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2012-09-21tcg-sparc: Use defines for temporaries.Richard Henderson
And change from %i4/%i5 to %g1/%o7 to remove a v8plus fixme. Signed-off-by: Richard Henderson <rth@twiddle.net>
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