From 5e7731443c6c9214bb012e70f267c3af0aa33258 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Mon, 26 Mar 2012 11:03:36 +0000 Subject: ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs The GICD_IGROUPR0 is banked for each connected processor. It means the Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be configured for every processor. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ArmPlatformPkg/ArmRealViewEbPkg') diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c index 5eb667d6eb..7191835a61 100755 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSec.c @@ -31,7 +31,7 @@ **/ VOID ArmPlatformTrustzoneInit ( - VOID + IN UINTN MpId ) { ASSERT(FALSE); -- cgit v1.2.3