AcpiS3Save could try to check PcdIdentifyMappingPageTablePtr is NULL, if it is not, it means someone else has allocate memory for page table, AcpiS3Save could re-use this memory.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Elvin Li <elvin.li@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15910 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 66 insertions, 57 deletions

diff --git a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
index 4ef272c2b3..6de1871f67 100644
--- a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
+++ b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3Save.c
@@ -328,68 +328,74 @@ S3CreateIdentityMappingPageTables (
     VOID                                          *Hob;

     BOOLEAN                                       Page1GSupport;

 

-    Page1GSupport = FALSE;

-    if (PcdGetBool(PcdUse1GPageTable)) {

-      AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);

-      if (RegEax >= 0x80000001) {

-        AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);

-        if ((RegEdx & BIT26) != 0) {

-          Page1GSupport = TRUE;

+    S3NvsPageTableAddress = (EFI_PHYSICAL_ADDRESS) PcdGet64 (PcdIdentifyMappingPageTablePtr);

+    if (S3NvsPageTableAddress != 0x0) {

+      return S3NvsPageTableAddress;

+    } else {

+      Page1GSupport = FALSE;

+      if (PcdGetBool(PcdUse1GPageTable)) {

+        AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);

+        if (RegEax >= 0x80000001) {

+          AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);

+          if ((RegEdx & BIT26) != 0) {

+            Page1GSupport = TRUE;

+          }

         }

       }

-    }

-

-    //

-    // Get physical address bits supported.

-    //

-    Hob = GetFirstHob (EFI_HOB_TYPE_CPU);

-    if (Hob != NULL) {

-      PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;

-    } else {

-      AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);

-      if (RegEax >= 0x80000008) {

-        AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);

-        PhysicalAddressBits = (UINT8) RegEax;

+      

+      //

+      // Get physical address bits supported.

+      //

+      Hob = GetFirstHob (EFI_HOB_TYPE_CPU);

+      if (Hob != NULL) {

+        PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;

       } else {

-        PhysicalAddressBits = 36;

+        AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);

+        if (RegEax >= 0x80000008) {

+          AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);

+          PhysicalAddressBits = (UINT8) RegEax;

+        } else {

+          PhysicalAddressBits = 36;

+        }

       }

+      

+      //

+      // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.

+      //

+      ASSERT (PhysicalAddressBits <= 52);

+      if (PhysicalAddressBits > 48) {

+        PhysicalAddressBits = 48;

+      }

+      

+      //

+      // Calculate the table entries needed.

+      //

+      if (PhysicalAddressBits <= 39 ) {

+        NumberOfPml4EntriesNeeded = 1;

+        NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));

+      } else {

+        NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));

+        NumberOfPdpEntriesNeeded = 512;

+      }

+      

+      //

+      // We need calculate whole page size then allocate once, because S3 restore page table does not know each page in Nvs.

+      //

+      if (!Page1GSupport) {

+        TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded + NumberOfPml4EntriesNeeded * NumberOfPdpEntriesNeeded);

+      } else {

+        TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded);

+      }

+      DEBUG ((EFI_D_ERROR, "TotalPageTableSize - %x pages\n", TotalPageTableSize));

+      

+      //

+      // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.

+      //

+      S3NvsPageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, EFI_PAGES_TO_SIZE(TotalPageTableSize));

+      ASSERT (S3NvsPageTableAddress != 0);

+      PcdSet64 (PcdIdentifyMappingPageTablePtr, S3NvsPageTableAddress); 

+      return S3NvsPageTableAddress;

     }

-    

-    //

-    // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.

-    //

-    ASSERT (PhysicalAddressBits <= 52);

-    if (PhysicalAddressBits > 48) {

-      PhysicalAddressBits = 48;

-    }

-

-    //

-    // Calculate the table entries needed.

-    //

-    if (PhysicalAddressBits <= 39 ) {

-      NumberOfPml4EntriesNeeded = 1;

-      NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));

-    } else {

-      NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));

-      NumberOfPdpEntriesNeeded = 512;

-    }

-

-    //

-    // We need calculate whole page size then allocate once, because S3 restore page table does not know each page in Nvs.

-    //

-    if (!Page1GSupport) {

-      TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded + NumberOfPml4EntriesNeeded * NumberOfPdpEntriesNeeded);

-    } else {

-      TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded);

-    }

-    DEBUG ((EFI_D_ERROR, "TotalPageTableSize - %x pages\n", TotalPageTableSize));

-

-    //

-    // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.

-    //

-    S3NvsPageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateMemoryBelow4G (EfiReservedMemoryType, EFI_PAGES_TO_SIZE(TotalPageTableSize));

-    ASSERT (S3NvsPageTableAddress != 0);

-    return S3NvsPageTableAddress;

   } else {

     //

     // If DXE is running 32-bit mode, no need to establish page table.

diff --git a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
index dc6da58f9f..9618dc2bae 100644
--- a/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
+++ b/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
@@ -75,6 +75,9 @@
   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize    ## CONSUMES

   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3BootScriptStackSize       ## CONSUMES

   gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable

+  ## SOMETIMES_CONSUMES

+  ## SOMETIMES_PRODUCES

+  gEfiMdeModulePkgTokenSpaceGuid.PcdIdentifyMappingPageTablePtr

 

 [Depex]

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