diff options
| author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2010-11-24 16:24:48 -0500 |
|---|---|---|
| committer | Nicolas Pitre <nicolas.pitre@linaro.org> | 2010-11-24 16:31:30 -0500 |
| commit | fadb8b7248fe3fcfbd69ce2f00d6ef6721900a43 (patch) | |
| tree | fd0f6a3e1346c469a18e31f39a563dca8532b406 | |
| parent | 9838382ebeacd162320b4f72ac31778f5970e97f (diff) | |
OMAP: some definitions extracted from commit 046465b76alinux-linaro-2.6.35-2Dec2010
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| -rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 3 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/dma.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/irqs.h | 2 |
3 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index c433c9c4bd2..298a22a754e 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -382,6 +382,9 @@ #define OMAP3430_EN_MPU_SHIFT 1 /* CM_FCLKEN_PER, CM_ICLKEN_PER, PM_WKEN_PER shared bits */ + +#define OMAP3630_EN_UART4_MASK (1 << 18) +#define OMAP3630_EN_UART4_SHIFT 18 #define OMAP3430_EN_GPIO6_MASK (1 << 17) #define OMAP3430_EN_GPIO6_SHIFT 17 #define OMAP3430_EN_GPIO5_MASK (1 << 16) diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index af3a03941ad..098f154f5d4 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -319,6 +319,8 @@ #define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ #define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ +#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */ +#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */ /*----------------------------------------------------------------------------*/ #define OMAP1_DMA_TOUT_IRQ (1 << 0) diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index c01d9f08a19..65e20a68671 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h @@ -345,6 +345,8 @@ #define INT_34XX_MMC3_IRQ 94 #define INT_34XX_GPT12_IRQ 95 +#define INT_36XX_UART4_IRQ 80 + #define INT_35XX_HECC0_IRQ 24 #define INT_35XX_HECC1_IRQ 28 #define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67 |