; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc %s -o - | FileCheck %s target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "thumbv7em-arm-none-eabi" %struct.a = type { i32, %struct.b*, i8, i8, i8, i8, i8*, %struct.b*, i16, i16, i16, i16, i16, i16, i16, i16, i32, i32, i32, i32, i32, i32, i32 } %struct.b = type { i8, i8, i8, i8, i32, i16, i16, i32, i32, i32, i32, [16 x i8], [64 x i8], [128 x i8], i32, [68 x i8] } define void @test(%struct.a* nocapture %dhcp, i16 zeroext %value) #0 { ; CHECK-LABEL: test: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: ldrh r2, [r0, #20] ; CHECK-NEXT: adds r3, r2, #1 ; CHECK-NEXT: strh r3, [r0, #20] ; CHECK-NEXT: ldr r3, [r0, #16] ; CHECK-NEXT: add r2, r3 ; CHECK-NEXT: lsrs r3, r1, #8 ; CHECK-NEXT: strb.w r3, [r2, #240] ; CHECK-NEXT: ldrh r2, [r0, #20] ; CHECK-NEXT: adds r3, r2, #1 ; CHECK-NEXT: strh r3, [r0, #20] ; CHECK-NEXT: ldr r0, [r0, #16] ; CHECK-NEXT: add r0, r2 ; CHECK-NEXT: strb.w r1, [r0, #240] ; CHECK-NEXT: bx lr entry: %shr = lshr i16 %value, 8 %conv1 = trunc i16 %shr to i8 %msg_out = getelementptr inbounds %struct.a, %struct.a* %dhcp, i32 0, i32 7 %0 = load %struct.b*, %struct.b** %msg_out, align 4 %options_out_len = getelementptr inbounds %struct.a, %struct.a* %dhcp, i32 0, i32 8 %1 = load i16, i16* %options_out_len, align 4 %inc = add i16 %1, 1 store i16 %inc, i16* %options_out_len, align 4 %idxprom = zext i16 %1 to i32 %arrayidx = getelementptr inbounds %struct.b, %struct.b* %0, i32 0, i32 15, i32 %idxprom store i8 %conv1, i8* %arrayidx, align 1 %conv4 = trunc i16 %value to i8 %2 = load %struct.b*, %struct.b** %msg_out, align 4 %3 = load i16, i16* %options_out_len, align 4 %inc8 = add i16 %3, 1 store i16 %inc8, i16* %options_out_len, align 4 %idxprom9 = zext i16 %3 to i32 %arrayidx10 = getelementptr inbounds %struct.b, %struct.b* %2, i32 0, i32 15, i32 %idxprom9 store i8 %conv4, i8* %arrayidx10, align 1 ret void } attributes #0 = { minsize optsize "target-cpu"="cortex-m4" }