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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-06-29 14:24:46 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2018-06-29 14:24:46 +0000
commit4e9529bf924da3fe4055de912de25c4612b296d9 (patch)
treed54a0b18b3f0b04f469e00a06fe36347181c612f /tools/llvm-mca
parent6882f03fec66bd1fbd764e7a6466ce727b826d8b (diff)
[llvm-mca] Remove field HasReadAdvanceEntries from class ReadDescriptor.
This simplifies the logic that updates RAW dependencies in the DispatchStage. There is no advantage in storing that flag in the ReadDescriptor; we should simply rely on the call to `STI.getReadAdvanceCycles()` to obtain the ReadAdvance cycles. If there are no read-advance entries, then method `getReadAdvanceCycles()` quickly returns 0. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335977 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'tools/llvm-mca')
-rw-r--r--tools/llvm-mca/DispatchStage.cpp6
-rw-r--r--tools/llvm-mca/InstrBuilder.cpp4
-rw-r--r--tools/llvm-mca/Instruction.h5
3 files changed, 0 insertions, 15 deletions
diff --git a/tools/llvm-mca/DispatchStage.cpp b/tools/llvm-mca/DispatchStage.cpp
index 1bc292aae52..21eef3d93d6 100644
--- a/tools/llvm-mca/DispatchStage.cpp
+++ b/tools/llvm-mca/DispatchStage.cpp
@@ -82,12 +82,6 @@ void DispatchStage::updateRAWDependencies(ReadState &RS,
// For each write, check if we have ReadAdvance information, and use it
// to figure out in how many cycles this read becomes available.
const ReadDescriptor &RD = RS.getDescriptor();
- if (!RD.HasReadAdvanceEntries) {
- for (WriteRef &WR : DependentWrites)
- WR.getWriteState()->addUser(&RS, /* ReadAdvance */ 0);
- return;
- }
-
const MCSchedModel &SM = STI.getSchedModel();
const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID);
for (WriteRef &WR : DependentWrites) {
diff --git a/tools/llvm-mca/InstrBuilder.cpp b/tools/llvm-mca/InstrBuilder.cpp
index fd849bb7240..b1ed2daac38 100644
--- a/tools/llvm-mca/InstrBuilder.cpp
+++ b/tools/llvm-mca/InstrBuilder.cpp
@@ -265,8 +265,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI,
const MCSchedClassDesc &SCDesc,
const MCSubtargetInfo &STI) {
unsigned SchedClassID = MCDesc.getSchedClass();
- bool HasReadAdvanceEntries = SCDesc.NumReadAdvanceEntries > 0;
-
unsigned i = 0;
unsigned NumExplicitDefs = MCDesc.getNumDefs();
// Skip explicit definitions.
@@ -295,7 +293,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI,
ReadDescriptor &Read = ID.Reads[CurrentUse];
Read.OpIndex = i + CurrentUse;
Read.UseIndex = CurrentUse;
- Read.HasReadAdvanceEntries = HasReadAdvanceEntries;
Read.SchedClassID = SchedClassID;
LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex);
}
@@ -305,7 +302,6 @@ static void populateReads(InstrDesc &ID, const MCInst &MCI,
Read.OpIndex = ~CurrentUse;
Read.UseIndex = NumExplicitUses + CurrentUse;
Read.RegisterID = MCDesc.getImplicitUses()[CurrentUse];
- Read.HasReadAdvanceEntries = HasReadAdvanceEntries;
Read.SchedClassID = SchedClassID;
LLVM_DEBUG(dbgs() << "\t\tOpIdx=" << Read.OpIndex
<< ", RegisterID=" << Read.RegisterID << '\n');
diff --git a/tools/llvm-mca/Instruction.h b/tools/llvm-mca/Instruction.h
index 2df6a59f38c..b15b17a2f51 100644
--- a/tools/llvm-mca/Instruction.h
+++ b/tools/llvm-mca/Instruction.h
@@ -77,11 +77,6 @@ struct ReadDescriptor {
// Scheduling Class Index. It is used to query the scheduling model for the
// MCSchedClassDesc object.
unsigned SchedClassID;
- // True if there may be a local forwarding logic in hardware to serve a
- // write used by this read. This information, along with SchedClassID, is
- // used to dynamically check at Instruction creation time, if the input
- // operands can benefit from a ReadAdvance bonus.
- bool HasReadAdvanceEntries;
bool isImplicitRead() const { return OpIndex < 0; };
};