diff options
| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-04-20 06:34:48 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-04-20 06:34:48 +0000 |
| commit | 6ae246865138e381d88e2ee628847564712b87b8 (patch) | |
| tree | c4ad000404e5a4f1ad9299a0a222960dfd439ba9 /test/MC/Mips/mips64r6 | |
| parent | 6990d61a50c983045db50f7c1a17f1845fd5222e (diff) | |
[mips][microMIPS]Implement CFC*, CTC* and LDC* instructions
Differential Revision: http://reviews.llvm.org/D18640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266861 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips64r6')
| -rw-r--r-- | test/MC/Mips/mips64r6/invalid.s | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/test/MC/Mips/mips64r6/invalid.s b/test/MC/Mips/mips64r6/invalid.s index a28b234ac15..d1b31376f21 100644 --- a/test/MC/Mips/mips64r6/invalid.s +++ b/test/MC/Mips/mips64r6/invalid.s @@ -12,7 +12,6 @@ local_label: align $4, $2, $3, 4 # CHECK: :[[@LINE]]:29: error: expected 2-bit unsigned immediate jalr.hb $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different jalr.hb $31, $31 # CHECK: :[[@LINE]]:9: error: source and destination must be different - ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled break -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate break 1024 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate break -1, 5 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate @@ -39,6 +38,8 @@ local_label: drotr32 $2, $3, 32 # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate jalr.hb $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different jalr.hb $31, $31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different + ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ldc2 $11, 1024($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled lsa $2, $3, $4, 0 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4 lsa $2, $3, $4, 5 # CHECK: :[[@LINE]]:29: error: expected immediate in range 1 .. 4 pref -1, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate |