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authorAnna Thomas <anna@azul.com>2018-10-16 15:46:26 +0000
committerAnna Thomas <anna@azul.com>2018-10-16 15:46:26 +0000
commitc2874102cb09d7199a3cd3a5b7d877b56648a5d7 (patch)
treeddf9761ff2ac943cd4c6855e0937104a5a11ecbb /test/Analysis
parent5973d705524e5432b05634a9aab38ecd2360ff13 (diff)
[LV] Teach vectorizer about variant value store into uniform address
Summary: Teach vectorizer about vectorizing variant value stores to uniform address. Similar to rL343028, we do not allow vectorization if we have multiple stores to the same uniform address. Cost model already has the change for considering the extract instruction cost for a variant value store. See added test cases for how vectorization is done. The patch also contains changes to the ORE messages. Reviewers: Ayal, mkuper, anemet, hsaito Subscribers: rkruppe, llvm-commits Differential Revision: https://reviews.llvm.org/D52656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344613 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Analysis')
-rw-r--r--test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll2
-rw-r--r--test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll16
-rw-r--r--test/Analysis/LoopAccessAnalysis/store-to-invariant-check2.ll4
-rw-r--r--test/Analysis/LoopAccessAnalysis/store-to-invariant-check3.ll6
4 files changed, 16 insertions, 12 deletions
diff --git a/test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll b/test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll
index 10f9c767904..0d0fe65694c 100644
--- a/test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll
+++ b/test/Analysis/LoopAccessAnalysis/memcheck-wrapping-pointers.ll
@@ -39,7 +39,7 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
; CHECK-NEXT: Group
; CHECK-NEXT: (Low: %b High: ((4 * (1 umax %x)) + %b))
; CHECK-NEXT: Member: {%b,+,4}<%for.body>
-; CHECK: Variant Store to invariant address was not found in loop.
+; CHECK: Multiple stores to invariant address were not found in loop.
; CHECK-NEXT: SCEV assumptions:
; CHECK-NEXT: {1,+,1}<%for.body> Added Flags: <nusw>
; CHECK-NEXT: {0,+,1}<%for.body> Added Flags: <nusw>
diff --git a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll
index ad9b1295a6d..f24211d1e0d 100644
--- a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll
+++ b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check1.ll
@@ -1,26 +1,27 @@
; RUN: opt < %s -loop-accesses -analyze | FileCheck -check-prefix=OLDPM %s
; RUN: opt -passes='require<scalar-evolution>,require<aa>,loop(print-access-info)' -disable-output < %s 2>&1 | FileCheck -check-prefix=NEWPM %s
-; Test to confirm LAA will find store to invariant address.
-; Inner loop has a store to invariant address.
+; Test to confirm LAA will find multiple stores to an invariant address in the
+; inner loop.
;
; for(; i < itr; i++) {
; for(; j < itr; j++) {
; var1[i] = var2[j] + var1[i];
+; var1[i]++;
; }
; }
; The LAA with the new PM is a loop pass so we go from inner to outer loops.
; OLDPM: for.cond1.preheader:
-; OLDPM: Variant Store to invariant address was not found in loop.
+; OLDPM: Multiple stores to invariant address were not found in loop.
; OLDPM: for.body3:
-; OLDPM: Variant Store to invariant address was found in loop.
+; OLDPM: Multiple stores to invariant address were found in loop.
; NEWPM: for.body3:
-; NEWPM: Variant Store to invariant address was found in loop.
+; NEWPM: Multiple stores to invariant address were found in loop.
; NEWPM: for.cond1.preheader:
-; NEWPM: Variant Store to invariant address was not found in loop.
+; NEWPM: Multiple stores to invariant address were not found in loop.
define i32 @foo(i32* nocapture %var1, i32* nocapture readonly %var2, i32 %itr) #0 {
entry:
@@ -45,6 +46,9 @@ for.body3: ; preds = %for.body3, %for.bod
%2 = load i32, i32* %arrayidx5, align 4
%add = add nsw i32 %2, %1
store i32 %add, i32* %arrayidx5, align 4
+ %3 = load i32, i32* %arrayidx5, align 4
+ %4 = add nsw i32 %3, 1
+ store i32 %4, i32* %arrayidx5, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, %itr
diff --git a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check2.ll b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check2.ll
index e40c9e733cd..07bcdcc5c66 100644
--- a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check2.ll
+++ b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check2.ll
@@ -10,8 +10,8 @@
; }
; }
-; CHECK: Variant Store to invariant address was not found in loop.
-; CHECK-NOT: Variant Store to invariant address was found in loop.
+; CHECK: Multiple stores to invariant address were not found in loop.
+; CHECK-NOT: Multiple stores to invariant address were found in loop.
define i32 @foo(i32* nocapture readonly %var1, i32* nocapture %var2, i32 %itr) #0 {
diff --git a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check3.ll b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check3.ll
index eaadcfecaa3..8d7452471f5 100644
--- a/test/Analysis/LoopAccessAnalysis/store-to-invariant-check3.ll
+++ b/test/Analysis/LoopAccessAnalysis/store-to-invariant-check3.ll
@@ -1,8 +1,8 @@
; RUN: opt < %s -loop-accesses -analyze | FileCheck %s
; RUN: opt -passes='require<scalar-evolution>,require<aa>,loop(print-access-info)' -disable-output < %s 2>&1 | FileCheck %s
-; Test to confirm LAA will find store to invariant address.
-; Inner loop has a store to invariant address.
+; Inner loop has a store to invariant address, but LAA does not need to identify
+; the store to invariant address, since it is a single store.
;
; for(; i < itr; i++) {
; for(; j < itr; j++) {
@@ -10,7 +10,7 @@
; }
; }
-; CHECK: Variant Store to invariant address was found in loop.
+; CHECK: Multiple stores to invariant address were not found in loop.
define void @foo(i32* nocapture %var1, i32* nocapture %var2, i32 %itr) #0 {
entry: