From b7b4b66a5efa64caca570af16be1f0318a90d0a8 Mon Sep 17 00:00:00 2001 From: ienkovich Date: Thu, 12 Mar 2015 09:53:36 +0000 Subject: gcc/ PR target/65103 * config/i386/i386.c (ix86_address_cost): Fix cost of a PIC register. gcc/testsuite/ PR target/65103 * gcc.target/i386/pr65103-1.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221380 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/config/i386/i386.c | 36 ++++++++++++++----------------- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr65103-1.c | 19 ++++++++++++++++ 4 files changed, 46 insertions(+), 20 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr65103-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3a913208208..43d67175732 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-03-12 Ilya Enkovich + + PR target/65103 + * config/i386/i386.c (ix86_address_cost): Fix cost of a PIC + register. + 2015-03-12 Ilya Enkovich PR target/65044 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ab8f03acdc6..47deda7ce50 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -12931,30 +12931,26 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t, bool) if (parts.index && GET_CODE (parts.index) == SUBREG) parts.index = SUBREG_REG (parts.index); - /* Attempt to minimize number of registers in the address. */ - if ((parts.base - && (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)) - || (parts.index - && (!REG_P (parts.index) - || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER))) - cost++; - - /* When address base or index is "pic_offset_table_rtx" we don't increase - address cost. When a memopt with "pic_offset_table_rtx" is not invariant - itself it most likely means that base or index is not invariant. - Therefore only "pic_offset_table_rtx" could be hoisted out, which is not - profitable for x86. */ + /* Attempt to minimize number of registers in the address by increasing + address cost for each used register. We don't increase address cost + for "pic_offset_table_rtx". When a memopt with "pic_offset_table_rtx" + is not invariant itself it most likely means that base or index is not + invariant. Therefore only "pic_offset_table_rtx" could be hoisted out, + which is not profitable for x86. */ if (parts.base - && (current_pass->type == GIMPLE_PASS - || (!pic_offset_table_rtx - || REGNO (pic_offset_table_rtx) != REGNO(parts.base))) && (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER) - && parts.index && (current_pass->type == GIMPLE_PASS - || (!pic_offset_table_rtx - || REGNO (pic_offset_table_rtx) != REGNO(parts.index))) + || !pic_offset_table_rtx + || !REG_P (parts.base) + || REGNO (pic_offset_table_rtx) != REGNO (parts.base))) + cost++; + + if (parts.index && (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER) - && parts.base != parts.index) + && (current_pass->type == GIMPLE_PASS + || !pic_offset_table_rtx + || !REG_P (parts.index) + || REGNO (pic_offset_table_rtx) != REGNO (parts.index))) cost++; /* AMD-K6 don't like addresses with ModR/M set to 00_xxx_100b, diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 485a3f8c302..4bd7f0e7211 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-03-12 Ilya Enkovich + + PR target/65103 + * gcc.target/i386/pr65103-1.c: New. + 2015-03-12 Ilya Enkovich PR target/65044 diff --git a/gcc/testsuite/gcc.target/i386/pr65103-1.c b/gcc/testsuite/gcc.target/i386/pr65103-1.c new file mode 100644 index 00000000000..4e3a7a3a2bc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr65103-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-require-effective-target pie } */ +/* { dg-options "-O2 -fPIE" } */ +/* { dg-final { scan-assembler-not "GOTOFF," } } */ + +typedef struct S +{ + int a; + int sum; + int delta; +} S; + +S gs; +int global_opt (int max) +{ + while (gs.sum < max) + gs.sum += gs.delta; + return gs.a; +} -- cgit v1.2.3