From ae5de607bec054c1611c7d91c4d12cf070fa4159 Mon Sep 17 00:00:00 2001
From: Yvan Roux <yvan.roux@linaro.org>
Date: Fri, 16 Sep 2016 15:17:22 +0200
Subject: All added testcases since linaro 6 branch creation.

Change-Id: Ibd63e9edfec0418ef3b882b2e0f82a1a17c357b6
---
 gcc/testsuite/c-c++-common/goacc/cache-2.c         |  57 ++
 gcc/testsuite/c-c++-common/gomp/pr71371.c          |  25 +
 gcc/testsuite/c-c++-common/gomp/pr71758.c          |  10 +
 gcc/testsuite/c-c++-common/pr71372.c               |  14 +
 gcc/testsuite/c-c++-common/ubsan/bounds-13.c       |  31 +
 gcc/testsuite/c-c++-common/ubsan/pr71512-1.c       |   5 +
 gcc/testsuite/c-c++-common/ubsan/pr71512-2.c       |   5 +
 gcc/testsuite/g++.dg/concepts/memfun2.C            |  21 +
 gcc/testsuite/g++.dg/concepts/req19.C              |  13 +
 gcc/testsuite/g++.dg/concepts/req20.C              |  19 +
 gcc/testsuite/g++.dg/concepts/variadic4.C          |  20 +
 gcc/testsuite/g++.dg/conversion/ambig3.C           |  13 +
 gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C    |  37 ++
 gcc/testsuite/g++.dg/cpp0x/alias-decl-55.C         |  23 +
 gcc/testsuite/g++.dg/cpp0x/alignas7.C              |  13 +
 gcc/testsuite/g++.dg/cpp0x/constexpr-71828.C       |   5 +
 gcc/testsuite/g++.dg/cpp0x/constexpr-array16.C     |  23 +
 gcc/testsuite/g++.dg/cpp0x/constexpr-array17.C     |  61 ++
 gcc/testsuite/g++.dg/cpp0x/constexpr-list1.C       |  15 +
 gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem6.C     |  13 +
 gcc/testsuite/g++.dg/cpp0x/decltype65.C            |  11 +
 gcc/testsuite/g++.dg/cpp0x/decltype66.C            |  19 +
 gcc/testsuite/g++.dg/cpp0x/inh-ctor20.C            |  16 +
 gcc/testsuite/g++.dg/cpp0x/inh-ctor21.C            |  19 +
 gcc/testsuite/g++.dg/cpp0x/initlist-base2.C        |  21 +
 gcc/testsuite/g++.dg/cpp0x/initlist-base3.C        |  17 +
 gcc/testsuite/g++.dg/cpp0x/initlist-template1.C    |  15 +
 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C  |  10 +
 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce3.C |  15 +
 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice16.C   |   8 +
 gcc/testsuite/g++.dg/cpp0x/pr68724.C               |  15 +
 gcc/testsuite/g++.dg/cpp0x/pr70869.C               |  25 +
 gcc/testsuite/g++.dg/cpp0x/pr71054.C               |  21 +
 gcc/testsuite/g++.dg/cpp0x/pr71739.C               |   5 +
 gcc/testsuite/g++.dg/cpp0x/range-for31.C           |   9 +
 gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C          |  14 +
 gcc/testsuite/g++.dg/cpp0x/sfinae57.C              |  16 +
 gcc/testsuite/g++.dg/cpp0x/variadic-mangle1a.C     |  12 +
 gcc/testsuite/g++.dg/cpp0x/variadic-mangle2a.C     |  19 +
 gcc/testsuite/g++.dg/cpp0x/variadic-mangle3.C      |  10 +
 gcc/testsuite/g++.dg/cpp0x/variadic-mangle3a.C     |  11 +
 gcc/testsuite/g++.dg/cpp0x/variadic-nested1.C      |   9 +
 gcc/testsuite/g++.dg/cpp1y/auto-fn31.C             |   7 +
 gcc/testsuite/g++.dg/cpp1y/auto-fn32.C             |  33 +
 gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C      |  13 +
 gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C     |  27 +
 gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C          |  13 +
 gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C          |  23 +
 gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv2.C  |  26 +
 gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv3.C  |  10 +
 .../g++.dg/cpp1y/lambda-generic-static1.C          |  13 +
 .../g++.dg/cpp1y/lambda-generic-static2.C          |  19 +
 gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C           |   7 +
 gcc/testsuite/g++.dg/cpp1y/paren4.C                |  14 +
 gcc/testsuite/g++.dg/cpp1y/var-templ39a.C          |  27 +
 gcc/testsuite/g++.dg/cpp1y/var-templ51.C           |  11 +
 gcc/testsuite/g++.dg/cpp1y/var-templ52.C           |  14 +
 gcc/testsuite/g++.dg/cpp1y/var-templ53.C           |  10 +
 gcc/testsuite/g++.dg/cpp1z/fold-mangle.C           |  20 +
 gcc/testsuite/g++.dg/debug/pr71057.C               |  12 +
 gcc/testsuite/g++.dg/ext/array3.C                  |  19 +
 gcc/testsuite/g++.dg/ext/flexary16.C               |  37 ++
 gcc/testsuite/g++.dg/ext/vector31.C                |  29 +
 gcc/testsuite/g++.dg/gomp/declare-simd-6.C         |  37 ++
 gcc/testsuite/g++.dg/gomp/pr71941.C                |  22 +
 gcc/testsuite/g++.dg/init/elide5.C                 |  26 +
 gcc/testsuite/g++.dg/init/pr71516.C                |  10 +
 gcc/testsuite/g++.dg/ipa/ipa-pta-2.C               |  37 ++
 gcc/testsuite/g++.dg/lookup/scoped10.C             |   5 +
 gcc/testsuite/g++.dg/lookup/scoped9.C              |  10 +
 gcc/testsuite/g++.dg/opt/pr70847.C                 |  11 +
 gcc/testsuite/g++.dg/opt/pr71100.C                 |  18 +
 gcc/testsuite/g++.dg/opt/pr71210-1.C               |  14 +
 gcc/testsuite/g++.dg/opt/pr71210-2.C               |  23 +
 gcc/testsuite/g++.dg/opt/pr71387.C                 |  52 ++
 gcc/testsuite/g++.dg/opt/pr71528.C                 |  23 +
 gcc/testsuite/g++.dg/other/i386-10.C               |  12 +
 gcc/testsuite/g++.dg/other/pr71728.C               |  11 +
 gcc/testsuite/g++.dg/parse/pr71909.C               |  22 +
 gcc/testsuite/g++.dg/pr71184.C                     |   1 +
 gcc/testsuite/g++.dg/pr71389.C                     |  23 +
 gcc/testsuite/g++.dg/pr71624.C                     |  35 ++
 gcc/testsuite/g++.dg/template/defarg21.C           |  21 +
 gcc/testsuite/g++.dg/template/dtor10.C             |  23 +
 gcc/testsuite/g++.dg/template/friend62.C           |  16 +
 gcc/testsuite/g++.dg/template/friend63.C           |  29 +
 gcc/testsuite/g++.dg/template/pr70466-1.C          |  27 +
 gcc/testsuite/g++.dg/template/pr70466-2.C          |  25 +
 gcc/testsuite/g++.dg/template/ttp29.C              |  21 +
 gcc/testsuite/g++.dg/tm/pr71909.C                  |  18 +
 gcc/testsuite/g++.dg/torture/pr71002.C             | 160 +++++
 gcc/testsuite/g++.dg/torture/pr71405.C             |  22 +
 gcc/testsuite/g++.dg/torture/pr71448.C             |  27 +
 gcc/testsuite/g++.dg/torture/pr71452.C             |  10 +
 gcc/testsuite/g++.dg/torture/pr71874.C             |  12 +
 gcc/testsuite/g++.dg/ubsan/pr70847.C               |  11 +
 gcc/testsuite/g++.dg/ubsan/pr71393.C               |  14 +
 gcc/testsuite/g++.dg/ubsan/pr71512.C               |  20 +
 gcc/testsuite/g++.dg/vect/simd-clone-6.cc          |  43 ++
 gcc/testsuite/g++.dg/warn/Wno-narrowing1.C         |   7 +
 gcc/testsuite/g++.dg/warn/Wplacement-new-size-3.C  |  40 ++
 gcc/testsuite/gcc.c-torture/compile/pr70916.c      |  28 +
 gcc/testsuite/gcc.c-torture/compile/pr71295.c      |  12 +
 gcc/testsuite/gcc.c-torture/compile/pr71693.c      |  10 +
 gcc/testsuite/gcc.c-torture/compile/pr71916.c      |  36 ++
 gcc/testsuite/gcc.c-torture/compile/pr72802.c      | 211 +++++++
 .../gcc.c-torture/execute/ieee/pr72824-2.c         |  21 +
 gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c |  19 +
 gcc/testsuite/gcc.c-torture/execute/pr37780.c      |  49 ++
 gcc/testsuite/gcc.c-torture/execute/pr66940.c      |  20 +
 gcc/testsuite/gcc.c-torture/execute/pr71083.c      |  43 ++
 gcc/testsuite/gcc.c-torture/execute/pr71494.c      |  22 +
 gcc/testsuite/gcc.c-torture/execute/pr71554.c      |  28 +
 gcc/testsuite/gcc.c-torture/execute/pr71626-1.c    |  19 +
 gcc/testsuite/gcc.c-torture/execute/pr71626-2.c    |   4 +
 gcc/testsuite/gcc.c-torture/execute/pr71700.c      |  19 +
 gcc/testsuite/gcc.dg/align-3.c                     |  11 +
 gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c        |  11 +
 gcc/testsuite/gcc.dg/goacc/nested-function-1.c     | 100 ++++
 gcc/testsuite/gcc.dg/goacc/nested-function-2.c     |  45 ++
 gcc/testsuite/gcc.dg/goacc/pr71373.c               |  41 ++
 gcc/testsuite/gcc.dg/graphite/pr69067.c            |  28 +
 gcc/testsuite/gcc.dg/graphite/pr69068.c            |  14 +
 gcc/testsuite/gcc.dg/guality/param-5.c             |  38 ++
 gcc/testsuite/gcc.dg/ipa/pr70646.c                 |  40 ++
 gcc/testsuite/gcc.dg/ipa/pr71981.c                 |  10 +
 gcc/testsuite/gcc.dg/pr59833.c                     |  18 +
 gcc/testsuite/gcc.dg/pr67410.c                     |  15 +
 gcc/testsuite/gcc.dg/pr68217.c                     |  14 +
 gcc/testsuite/gcc.dg/pr71006.c                     |  16 +
 gcc/testsuite/gcc.dg/pr71071.c                     |  12 +
 gcc/testsuite/gcc.dg/pr71279.c                     |  14 +
 gcc/testsuite/gcc.dg/pr71518.c                     |  25 +
 gcc/testsuite/gcc.dg/pr71558.c                     |  17 +
 gcc/testsuite/gcc.dg/pr71581.c                     |  24 +
 gcc/testsuite/gcc.dg/pr71685.c                     |   6 +
 gcc/testsuite/gcc.dg/pr72816.c                     |   9 +
 gcc/testsuite/gcc.dg/spellcheck-options-12.c       |   7 +
 gcc/testsuite/gcc.dg/torture/pr70935.c             |  39 ++
 gcc/testsuite/gcc.dg/torture/pr70941.c             |  12 +
 gcc/testsuite/gcc.dg/torture/pr71423.c             |  20 +
 gcc/testsuite/gcc.dg/torture/pr71452.c             |  10 +
 gcc/testsuite/gcc.dg/torture/pr71522.c             |  27 +
 gcc/testsuite/gcc.dg/torture/pr71594.c             |  15 +
 gcc/testsuite/gcc.dg/torture/pr71606.c             |  11 +
 gcc/testsuite/gcc.dg/torture/pr71881.c             |  25 +
 gcc/testsuite/gcc.dg/torture/pr73434.c             |  19 +
 gcc/testsuite/gcc.dg/tree-ssa/pr61839_1.c          |  44 ++
 gcc/testsuite/gcc.dg/tree-ssa/pr61839_2.c          |  54 ++
 gcc/testsuite/gcc.dg/tree-ssa/pr61839_3.c          |  26 +
 gcc/testsuite/gcc.dg/tree-ssa/pr61839_4.c          |  28 +
 gcc/testsuite/gcc.dg/tree-ssa/pr70919.c            |  46 ++
 gcc/testsuite/gcc.dg/tree-ssa/scev-11.c            |  28 +
 gcc/testsuite/gcc.dg/tree-ssa/scev-12.c            |  30 +
 gcc/testsuite/gcc.dg/tree-ssa/vrp100.c             |  32 +
 gcc/testsuite/gcc.dg/tree-ssa/vrp101.c             |  13 +
 .../gcc.dg/vect/aligned-section-anchors-vect-70.c  |  33 +
 .../gcc.dg/vect/aligned-section-anchors-vect-71.c  |  25 +
 .../gcc.dg/vect/aligned-section-anchors-vect-72.c  |  29 +
 gcc/testsuite/gcc.dg/vect/pr57206.c                |  11 +
 gcc/testsuite/gcc.dg/vect/pr65951.c                |  63 ++
 gcc/testsuite/gcc.dg/vect/pr71259.c                |  28 +
 gcc/testsuite/gcc.dg/vect/pr71264.c                |  20 +
 gcc/testsuite/gcc.dg/vect/pr71818.c                |  16 +
 gcc/testsuite/gcc.dg/vect/pr71823.c                |  14 +
 .../gcc.dg/vect/vect-load-lanes-peeling-1.c        |  13 +
 .../gcc.dg/vect/vect-mult-const-pattern-1.c        |  41 ++
 .../gcc.dg/vect/vect-mult-const-pattern-2.c        |  40 ++
 gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c |  46 ++
 .../gcc.target/aarch64/aapcs64/va_arg-16.c         |  28 +
 .../aarch64/advsimd-intrinsics/p64_p128.c          | 663 +++++++++++++++++++++
 .../aarch64/advsimd-intrinsics/vfms_vfma_n.c       | 490 +++++++++++++++
 .../aarch64/advsimd-intrinsics/vreinterpret_p128.c | 166 ++++++
 .../aarch64/advsimd-intrinsics/vreinterpret_p64.c  | 212 +++++++
 .../gcc.target/aarch64/advsimd-intrinsics/vrnd.c   |  16 +
 .../aarch64/advsimd-intrinsics/vrndX.inc           |  43 ++
 .../gcc.target/aarch64/advsimd-intrinsics/vrnda.c  |  16 +
 .../gcc.target/aarch64/advsimd-intrinsics/vrndm.c  |  16 +
 .../gcc.target/aarch64/advsimd-intrinsics/vrndn.c  |  16 +
 .../gcc.target/aarch64/advsimd-intrinsics/vrndp.c  |  16 +
 .../gcc.target/aarch64/advsimd-intrinsics/vrndx.c  |  16 +
 gcc/testsuite/gcc.target/aarch64/ands_3.c          |  12 +
 .../aarch64/ifcvt_multiple_sets_subreg_1.c         |  30 +
 .../gcc.target/aarch64/ldp_stp_unaligned_1.c       |  20 +
 gcc/testsuite/gcc.target/aarch64/pr37780_1.c       |  46 ++
 gcc/testsuite/gcc.target/aarch64/pr63874.c         |  22 +
 gcc/testsuite/gcc.target/aarch64/pr70809_1.c       |  18 +
 .../gcc.target/aarch64/simd/vminmaxnm_1.c          | 127 ++++
 .../gcc.target/aarch64/simd/vmul_elem_1.c          | 541 +++++++++++++++++
 gcc/testsuite/gcc.target/aarch64/struct_return.c   |  31 +
 gcc/testsuite/gcc.target/aarch64/test_frame_16.c   |  25 +
 .../gcc.target/aarch64/thunderxloadpair.c          |  20 +
 .../gcc.target/aarch64/thunderxnoloadpair.c        |  17 +
 gcc/testsuite/gcc.target/aarch64/va_arg_1.c        |  11 +
 gcc/testsuite/gcc.target/aarch64/va_arg_2.c        |  18 +
 gcc/testsuite/gcc.target/aarch64/va_arg_3.c        |  26 +
 .../gcc.target/aarch64/vect_copy_lane_1.c          |  86 +++
 gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c |  72 +++
 gcc/testsuite/gcc.target/aarch64/vminmaxnm.c       |  37 ++
 gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c   |  32 +
 gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c    |  24 +
 gcc/testsuite/gcc.target/arm/aapcs/vfp18.c         |  28 +
 gcc/testsuite/gcc.target/arm/aapcs/vfp19.c         |  30 +
 gcc/testsuite/gcc.target/arm/aapcs/vfp20.c         |  22 +
 gcc/testsuite/gcc.target/arm/aapcs/vfp21.c         |  26 +
 gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c     |   8 +
 gcc/testsuite/gcc.target/arm/builtin_saddl.c       |  17 +
 gcc/testsuite/gcc.target/arm/builtin_saddll.c      |  18 +
 gcc/testsuite/gcc.target/arm/builtin_ssubl.c       |  17 +
 gcc/testsuite/gcc.target/arm/builtin_ssubll.c      |  18 +
 gcc/testsuite/gcc.target/arm/builtin_uaddl.c       |  17 +
 gcc/testsuite/gcc.target/arm/builtin_uaddll.c      |  18 +
 gcc/testsuite/gcc.target/arm/builtin_usubl.c       |  17 +
 gcc/testsuite/gcc.target/arm/builtin_usubll.c      |  18 +
 gcc/testsuite/gcc.target/arm/data-rel-1.c          |  12 +
 gcc/testsuite/gcc.target/arm/data-rel-2.c          |  11 +
 gcc/testsuite/gcc.target/arm/data-rel-3.c          |  11 +
 gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c        |  21 +
 gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c        |  21 +
 gcc/testsuite/gcc.target/arm/neon-vaddws16.c       |  19 +
 gcc/testsuite/gcc.target/arm/neon-vaddws32.c       |  18 +
 gcc/testsuite/gcc.target/arm/neon-vaddwu16.c       |  18 +
 gcc/testsuite/gcc.target/arm/neon-vaddwu32.c       |  18 +
 gcc/testsuite/gcc.target/arm/neon-vaddwu8.c        |  19 +
 gcc/testsuite/gcc.target/arm/pr37780_1.c           |  48 ++
 gcc/testsuite/gcc.target/arm/pr70830.c             |  14 +
 gcc/testsuite/gcc.target/arm/pr71056.c             |  32 +
 gcc/testsuite/gcc.target/avr/pr50739.c             |   7 +
 gcc/testsuite/gcc.target/avr/pr71103.c             |  16 +
 gcc/testsuite/gcc.target/avr/pr71151-1.c           |  12 +
 gcc/testsuite/gcc.target/avr/pr71151-2.c           |  26 +
 gcc/testsuite/gcc.target/avr/pr71151-3.c           |  32 +
 gcc/testsuite/gcc.target/avr/pr71151-4.c           |  32 +
 gcc/testsuite/gcc.target/avr/pr71151-5.c           |  32 +
 gcc/testsuite/gcc.target/avr/pr71151-6.c           |  32 +
 gcc/testsuite/gcc.target/avr/pr71151-7.c           |  30 +
 gcc/testsuite/gcc.target/avr/pr71151-8.c           |  29 +
 gcc/testsuite/gcc.target/avr/pr71151-common.h      |  27 +
 gcc/testsuite/gcc.target/avr/torture/pr71103-2.c   | 118 ++++
 gcc/testsuite/gcc.target/i386/avx-pr71559.c        |   8 +
 gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c |  52 ++
 gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c |   6 +
 .../gcc.target/i386/avx512f-ceilf-sfix-vec-1.c     |  52 ++
 .../gcc.target/i386/avx512f-ceilf-sfix-vec-2.c     |   7 +
 .../gcc.target/i386/avx512f-ceilf-vec-1.c          |  52 ++
 .../gcc.target/i386/avx512f-ceilf-vec-2.c          |   6 +
 .../gcc.target/i386/avx512f-floor-vec-1.c          |  52 ++
 .../gcc.target/i386/avx512f-floor-vec-2.c          |   6 +
 .../gcc.target/i386/avx512f-floorf-sfix-vec-1.c    |  52 ++
 .../gcc.target/i386/avx512f-floorf-sfix-vec-2.c    |   7 +
 .../gcc.target/i386/avx512f-floorf-vec-1.c         |  52 ++
 .../gcc.target/i386/avx512f-floorf-vec-2.c         |   6 +
 gcc/testsuite/gcc.target/i386/avx512f-pr71559.c    |   8 +
 .../gcc.target/i386/avx512f-rint-sfix-vec-1.c      |  52 ++
 .../gcc.target/i386/avx512f-rint-sfix-vec-2.c      |   7 +
 .../gcc.target/i386/avx512f-rintf-sfix-vec-1.c     |  52 ++
 .../gcc.target/i386/avx512f-rintf-sfix-vec-2.c     |   6 +
 .../gcc.target/i386/avx512f-round-sfix-vec-1.c     |  52 ++
 .../gcc.target/i386/avx512f-round-sfix-vec-2.c     |   7 +
 .../gcc.target/i386/avx512f-roundf-sfix-vec-1.c    |  52 ++
 .../gcc.target/i386/avx512f-roundf-sfix-vec-2.c    |   7 +
 .../gcc.target/i386/avx512f-trunc-vec-1.c          |  52 ++
 .../gcc.target/i386/avx512f-trunc-vec-2.c          |   6 +
 .../gcc.target/i386/avx512f-truncf-vec-1.c         |  52 ++
 .../gcc.target/i386/avx512f-truncf-vec-2.c         |   6 +
 gcc/testsuite/gcc.target/i386/fabsneg-1.c          |  36 ++
 gcc/testsuite/gcc.target/i386/pr68657.c            |  15 +
 gcc/testsuite/gcc.target/i386/pr70876.c            |  13 +
 gcc/testsuite/gcc.target/i386/pr70877.c            |  14 +
 gcc/testsuite/gcc.target/i386/pr71529.C            |  22 +
 gcc/testsuite/gcc.target/i386/pr71647.c            |  32 +
 gcc/testsuite/gcc.target/i386/pr76342.c            |  11 +
 gcc/testsuite/gcc.target/i386/sse2-pr71559.c       |  73 +++
 gcc/testsuite/gcc.target/powerpc/abs128-1.c        |  61 ++
 gcc/testsuite/gcc.target/powerpc/copysign128-1.c   |  58 ++
 gcc/testsuite/gcc.target/powerpc/ctz-3.c           |  62 ++
 gcc/testsuite/gcc.target/powerpc/ctz-4.c           | 110 ++++
 gcc/testsuite/gcc.target/powerpc/darn-0.c          |  15 +
 gcc/testsuite/gcc.target/powerpc/darn-1.c          |  15 +
 gcc/testsuite/gcc.target/powerpc/darn-2.c          |  15 +
 gcc/testsuite/gcc.target/powerpc/dform-3.c         |  39 ++
 gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp       |  39 ++
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c   |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c   |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c   |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c   |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c   |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c   |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c   |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c   |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c  |  17 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c  |  15 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c  |  18 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c  |  16 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c  |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c  |  14 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c   |  20 +
 gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c   |  14 +
 gcc/testsuite/gcc.target/powerpc/divkc3-1.c        |  22 +
 gcc/testsuite/gcc.target/powerpc/float128-cmp.c    | 106 ++++
 .../gcc.target/powerpc/float128-complex-1.c        | 157 +++++
 .../gcc.target/powerpc/float128-complex-2.c        | 160 +++++
 gcc/testsuite/gcc.target/powerpc/inf128-1.c        |  55 ++
 gcc/testsuite/gcc.target/powerpc/mulkc3-1.c        |  22 +
 gcc/testsuite/gcc.target/powerpc/nan128-1.c        |  77 +++
 gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c     | 171 ++++++
 gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c     | 191 ++++++
 gcc/testsuite/gcc.target/powerpc/p9-splat-1.c      |  27 +
 gcc/testsuite/gcc.target/powerpc/p9-splat-2.c      |  38 ++
 gcc/testsuite/gcc.target/powerpc/p9-splat-3.c      |  61 ++
 gcc/testsuite/gcc.target/powerpc/p9-splat-4.c      |  10 +
 gcc/testsuite/gcc.target/powerpc/p9-vneg.c         |  12 +
 gcc/testsuite/gcc.target/powerpc/p9-vparity.c      | 107 ++++
 gcc/testsuite/gcc.target/powerpc/p9-vpermr.c       |  21 +
 gcc/testsuite/gcc.target/powerpc/pr70963.c         |  44 ++
 gcc/testsuite/gcc.target/powerpc/pr71186.c         |  32 +
 gcc/testsuite/gcc.target/powerpc/pr71493-1.c       |  13 +
 gcc/testsuite/gcc.target/powerpc/pr71493-2.c       |  13 +
 gcc/testsuite/gcc.target/powerpc/pr71656-1.c       |  20 +
 gcc/testsuite/gcc.target/powerpc/pr71656-2.c       |  47 ++
 gcc/testsuite/gcc.target/powerpc/pr71670.c         |   7 +
 gcc/testsuite/gcc.target/powerpc/pr71698.c         |  13 +
 gcc/testsuite/gcc.target/powerpc/pr71720.c         |  15 +
 gcc/testsuite/gcc.target/powerpc/pr71763.c         |  25 +
 gcc/testsuite/gcc.target/powerpc/pr71805.c         | 113 ++++
 gcc/testsuite/gcc.target/powerpc/pr72853.c         | 108 ++++
 gcc/testsuite/gcc.target/powerpc/signbit-1.c       |  16 +
 gcc/testsuite/gcc.target/powerpc/signbit-2.c       |  18 +
 gcc/testsuite/gcc.target/powerpc/signbit-3.c       | 172 ++++++
 gcc/testsuite/gcc.target/powerpc/vadsdu-0.c        |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsdu-1.c        |  23 +
 gcc/testsuite/gcc.target/powerpc/vadsdu-2.c        |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsdu-3.c        |  23 +
 gcc/testsuite/gcc.target/powerpc/vadsdu-4.c        |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsdu-5.c        |  23 +
 gcc/testsuite/gcc.target/powerpc/vadsdub-1.c       |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsdub-2.c       |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsduh-1.c       |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsduh-2.c       |  23 +
 gcc/testsuite/gcc.target/powerpc/vadsduw-1.c       |  24 +
 gcc/testsuite/gcc.target/powerpc/vadsduw-2.c       |  23 +
 gcc/testsuite/gcc.target/powerpc/vslv-0.c          |  17 +
 gcc/testsuite/gcc.target/powerpc/vslv-1.c          |  17 +
 gcc/testsuite/gcc.target/powerpc/vsrv-0.c          |  17 +
 gcc/testsuite/gcc.target/powerpc/vsrv-1.c          |  17 +
 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c   | 143 +++++
 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c   | 236 ++++++++
 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c   | 142 +++++
 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c   | 230 +++++++
 gcc/testsuite/gcc.target/s390/nolrl-1.c            |  19 +
 gcc/testsuite/gcc.target/sparc/fpcmp.c             |  18 +
 gcc/testsuite/gcc.target/sparc/fpcmpu.c            |  31 +
 gcc/testsuite/gcc.target/sparc/vis4misc.c          | 126 ++++
 .../gfortran.dg/allocate_with_source_20.f03        |  21 +
 .../gfortran.dg/allocate_with_source_21.f03        |  52 ++
 gcc/testsuite/gfortran.dg/array_constructor_50.f90 |  21 +
 gcc/testsuite/gfortran.dg/class_array_22.f03       |  25 +
 gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 |   8 +
 gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90 |   9 +
 gcc/testsuite/gfortran.dg/dec_structure_1.f90      |  56 ++
 gcc/testsuite/gfortran.dg/dec_structure_10.f90     | 119 ++++
 gcc/testsuite/gfortran.dg/dec_structure_11.f90     |  20 +
 gcc/testsuite/gfortran.dg/dec_structure_2.f90      |  41 ++
 gcc/testsuite/gfortran.dg/dec_structure_3.f90      |  52 ++
 gcc/testsuite/gfortran.dg/dec_structure_4.f90      |  43 ++
 gcc/testsuite/gfortran.dg/dec_structure_5.f90      |  49 ++
 gcc/testsuite/gfortran.dg/dec_structure_6.f90      |  46 ++
 gcc/testsuite/gfortran.dg/dec_structure_7.f90      |  75 +++
 gcc/testsuite/gfortran.dg/dec_structure_8.f90      |  60 ++
 gcc/testsuite/gfortran.dg/dec_structure_9.f90      |  42 ++
 gcc/testsuite/gfortran.dg/dec_union_1.f90          |  66 ++
 gcc/testsuite/gfortran.dg/dec_union_2.f90          |  60 ++
 gcc/testsuite/gfortran.dg/dec_union_3.f90          |  35 ++
 gcc/testsuite/gfortran.dg/dec_union_4.f90          |  63 ++
 gcc/testsuite/gfortran.dg/dec_union_5.f90          |  41 ++
 gcc/testsuite/gfortran.dg/dec_union_6.f90          |  59 ++
 gcc/testsuite/gfortran.dg/dec_union_7.f90          |  38 ++
 .../gfortran.dg/deferred_character_17.f90          |  13 +
 gcc/testsuite/gfortran.dg/dependency_46.f90        |  11 +
 gcc/testsuite/gfortran.dg/dependency_48.f90        |  26 +
 gcc/testsuite/gfortran.dg/goacc/cache-2.f95        |  12 +
 gcc/testsuite/gfortran.dg/goacc/cray-2.f95         |  56 ++
 gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95       | 176 ++++++
 gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95       |  58 ++
 .../gfortran.dg/goacc/nested-function-1.f90        |  93 +++
 gcc/testsuite/gfortran.dg/goacc/pr71704.f90        |  60 ++
 gcc/testsuite/gfortran.dg/gomp/order-1.f90         |  92 +++
 gcc/testsuite/gfortran.dg/gomp/order-2.f90         |  37 ++
 gcc/testsuite/gfortran.dg/gomp/pr70855.f90         |  18 +
 gcc/testsuite/gfortran.dg/gomp/pr71687.f90         |  11 +
 gcc/testsuite/gfortran.dg/gomp/pr71704.f90         |  58 ++
 gcc/testsuite/gfortran.dg/gomp/pr71705.f90         |   7 +
 gcc/testsuite/gfortran.dg/gomp/pr71758.f90         |  10 +
 gcc/testsuite/gfortran.dg/namelist_90.f            |  28 +
 gcc/testsuite/gfortran.dg/null_9.f90               |  30 +
 gcc/testsuite/gfortran.dg/pr69603.f90              |  16 +
 gcc/testsuite/gfortran.dg/pr70040.f90              |  19 +
 gcc/testsuite/gfortran.dg/pr70673.f90              |  25 +
 gcc/testsuite/gfortran.dg/pr70931.f90              |  10 +
 gcc/testsuite/gfortran.dg/pr71047.f08              |  48 ++
 gcc/testsuite/gfortran.dg/pr71204.f90              |  17 +
 gcc/testsuite/gfortran.dg/pr71688.f90              |  13 +
 gcc/testsuite/gfortran.dg/pr71764.f90              |  34 ++
 gcc/testsuite/gfortran.dg/pr71883.f90              |  38 ++
 gcc/testsuite/gfortran.dg/select_type_35.f03       |  41 ++
 gcc/testsuite/gfortran.dg/submodule_16.f08         |  53 ++
 gcc/testsuite/gfortran.dg/unexpected_eof.f         |   8 +
 gcc/testsuite/gnat.dg/case_character.adb           |  19 +
 gcc/testsuite/gnat.dg/loop_optimization23.adb      |  14 +
 gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb  |  11 +
 gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads  |  17 +
 gcc/testsuite/gnat.dg/opt56.adb                    |  15 +
 gcc/testsuite/gnat.dg/opt56.ads                    |   7 +
 gcc/testsuite/gnat.dg/renaming10.adb               |  12 +
 gcc/testsuite/gnat.dg/renaming10.ads               |   9 +
 gcc/testsuite/opt55.adb                            |  20 +
 gcc/testsuite/opt55.ads                            |  22 +
 libgomp/testsuite/libgomp.c++/target-20.C          |  80 +++
 libgomp/testsuite/libgomp.c++/target-21.C          | 173 ++++++
 libgomp/testsuite/libgomp.fortran/associate3.f90   |  20 +
 libgomp/testsuite/libgomp.hsa.c/complex-align-2.c  |  27 +
 libgomp/testsuite/libgomp.hsa.c/switch-sbr-2.c     |  59 ++
 .../testsuite/libgomp.oacc-c/nested-function-1.c   |  52 ++
 .../testsuite/libgomp.oacc-c/nested-function-2.c   | 155 +++++
 libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95 |   6 +
 .../libgomp.oacc-fortran/nested-function-1.f90     |  70 +++
 .../libgomp.oacc-fortran/nested-function-2.f90     | 173 ++++++
 .../libgomp.oacc-fortran/nested-function-3.f90     | 244 ++++++++
 .../testsuite/20_util/function/cons/refqual.cc     |  31 +
 .../tuple/cons/element_accepts_anything_byval.cc   |  30 +
 .../22_locale/codecvt/codecvt_utf8/69703.cc        | 103 ++++
 .../testsuite/23_containers/set/allocator/71964.cc |  71 +++
 .../25_algorithms/binary_search/partitioned.cc     |  67 +++
 .../25_algorithms/equal_range/partitioned.cc       |  66 ++
 .../25_algorithms/lexicographical_compare/71545.cc |  35 ++
 .../25_algorithms/lower_bound/partitioned.cc       | 100 ++++
 .../25_algorithms/upper_bound/partitioned.cc       |  98 +++
 .../filesystem/operations/copy_file.cc             |  82 +++
 .../filesystem/operations/create_directory.cc      |  63 ++
 .../filesystem/operations/permissions.cc           |  51 ++
 .../experimental/filesystem/path/native/string.cc  |  73 +++
 .../testsuite/experimental/memory_resource/1.cc    | 162 +++++
 .../memory_resource/null_memory_resource.cc        |  53 ++
 .../memory_resource/resource_adaptor.cc            |  87 +++
 .../experimental/optional/cons/value_neg.cc        |  39 ++
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 create mode 100644 gcc/testsuite/c-c++-common/goacc/cache-2.c
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 create mode 100644 gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vslv-0.c
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 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
 create mode 100644 gcc/testsuite/gcc.target/s390/nolrl-1.c
 create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmp.c
 create mode 100644 gcc/testsuite/gcc.target/sparc/fpcmpu.c
 create mode 100644 gcc/testsuite/gcc.target/sparc/vis4misc.c
 create mode 100644 gcc/testsuite/gfortran.dg/allocate_with_source_20.f03
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 create mode 100644 gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90
 create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_1.f90
 create mode 100644 gcc/testsuite/gfortran.dg/dec_structure_10.f90
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 create mode 100644 gcc/testsuite/gfortran.dg/deferred_character_17.f90
 create mode 100644 gcc/testsuite/gfortran.dg/dependency_46.f90
 create mode 100644 gcc/testsuite/gfortran.dg/dependency_48.f90
 create mode 100644 gcc/testsuite/gfortran.dg/goacc/cache-2.f95
 create mode 100644 gcc/testsuite/gfortran.dg/goacc/cray-2.f95
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 create mode 100644 gcc/testsuite/gfortran.dg/gomp/order-2.f90
 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr70855.f90
 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr71687.f90
 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr71704.f90
 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr71705.f90
 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr71758.f90
 create mode 100644 gcc/testsuite/gfortran.dg/namelist_90.f
 create mode 100644 gcc/testsuite/gfortran.dg/null_9.f90
 create mode 100644 gcc/testsuite/gfortran.dg/pr69603.f90
 create mode 100644 gcc/testsuite/gfortran.dg/pr70040.f90
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 create mode 100644 gcc/testsuite/gfortran.dg/pr71764.f90
 create mode 100644 gcc/testsuite/gfortran.dg/pr71883.f90
 create mode 100644 gcc/testsuite/gfortran.dg/select_type_35.f03
 create mode 100644 gcc/testsuite/gfortran.dg/submodule_16.f08
 create mode 100644 gcc/testsuite/gfortran.dg/unexpected_eof.f
 create mode 100644 gcc/testsuite/gnat.dg/case_character.adb
 create mode 100644 gcc/testsuite/gnat.dg/loop_optimization23.adb
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 create mode 100644 gcc/testsuite/gnat.dg/opt56.adb
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 create mode 100644 gcc/testsuite/gnat.dg/renaming10.adb
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 create mode 100644 gcc/testsuite/opt55.adb
 create mode 100644 gcc/testsuite/opt55.ads
 create mode 100644 libgomp/testsuite/libgomp.c++/target-20.C
 create mode 100644 libgomp/testsuite/libgomp.c++/target-21.C
 create mode 100644 libgomp/testsuite/libgomp.fortran/associate3.f90
 create mode 100644 libgomp/testsuite/libgomp.hsa.c/complex-align-2.c
 create mode 100644 libgomp/testsuite/libgomp.hsa.c/switch-sbr-2.c
 create mode 100644 libgomp/testsuite/libgomp.oacc-c/nested-function-1.c
 create mode 100644 libgomp/testsuite/libgomp.oacc-c/nested-function-2.c
 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95
 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90
 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90
 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90
 create mode 100644 libstdc++-v3/testsuite/20_util/function/cons/refqual.cc
 create mode 100644 libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc
 create mode 100644 libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/69703.cc
 create mode 100644 libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc
 create mode 100644 libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc
 create mode 100644 libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc
 create mode 100644 libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc
 create mode 100644 libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc
 create mode 100644 libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/filesystem/operations/copy_file.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/memory_resource/1.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc
 create mode 100644 libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc

diff --git a/gcc/testsuite/c-c++-common/goacc/cache-2.c b/gcc/testsuite/c-c++-common/goacc/cache-2.c
new file mode 100644
index 00000000000..f7175157915
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/goacc/cache-2.c
@@ -0,0 +1,57 @@
+/* OpenACC cache directive: invalid usage.  */
+
+int
+main (int argc, char **argv)
+{
+#define N   2
+    int a[N], b[N];
+    int i;
+
+    for (i = 0; i < N; i++)
+    {
+        a[i] = 3;
+        b[i] = 0;
+    }
+
+#pragma acc parallel copyin (a[0:N]) copyout (b[0:N])
+{
+    int ii;
+
+    for (ii = 0; ii < N; ii++)
+    {
+        const int idx = ii;
+        int n = 1;
+        const int len = n;
+
+#pragma acc cache /* { dg-error "expected '\\\(' before end of line" } */
+#pragma acc cache a[0:N] /* { dg-error "expected '\\\(' before 'a'" } */
+	/* { dg-bogus "expected end of line before 'a'" "" { xfail c++ } 27 } */
+#pragma acc cache (a) /* { dg-error "expected '\\\['" } */
+#pragma acc cache ( /* { dg-error "expected (identifier|unqualified-id) before end of line" } */
+#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
+#pragma acc cache (,) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" } */
+#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
+#pragma acc cache (a[0:N],) /* { dg-error "expected (identifier|unqualified-id) before '(,|\\\))' token" "" { xfail c } } */
+#pragma acc cache (a[0:N]) copyin (a[0:N]) /* { dg-error "expected end of line before 'copyin'" } */
+#pragma acc cache () /* { dg-error "expected (identifier|unqualified-id) before '\\\)' token" } */
+#pragma acc cache (a[0:N] b[0:N]) /* { dg-error "expected '\\\)' before 'b'" } */
+#pragma acc cache (a[0:N] b[0:N}) /* { dg-error "expected '\\\)' before 'b'" } */
+	/* { dg-bogus "expected end of line before '\\\}' token" "" { xfail c++ } 38 } */
+#pragma acc cache (a[0:N] /* { dg-error "expected '\\\)' before end of line" } */
+#pragma acc cache (a[0:N]) ( /* { dg-error "expected end of line before '\\(' token" } */
+#pragma acc cache (a[0:N]) ii /* { dg-error "expected end of line before 'ii'" } */
+#pragma acc cache (a[0:N] ii) /* { dg-error "expected '\\)' before 'ii'" } */
+
+        b[ii] = a[ii];
+    }
+}
+
+
+    for (i = 0; i < N; i++)
+    {
+        if (a[i] != b[i])
+            __builtin_abort ();
+    }
+
+    return 0;
+}
diff --git a/gcc/testsuite/c-c++-common/gomp/pr71371.c b/gcc/testsuite/c-c++-common/gomp/pr71371.c
new file mode 100644
index 00000000000..da6e842b6e8
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/pr71371.c
@@ -0,0 +1,25 @@
+/* PR middle-end/71371 */
+/* { dg-do compile } */
+
+void baz (int *);
+
+void
+foo (void)
+{
+  int i;
+  #pragma omp taskloop
+  for (i = 0; i < 100; i++)
+    baz (&i);
+}
+
+void
+bar (void)
+{
+  int i;
+  #pragma omp parallel
+  {
+    #pragma omp for
+    for (i = 0; i < 100; i++)
+      baz (&i);
+  }
+}
diff --git a/gcc/testsuite/c-c++-common/gomp/pr71758.c b/gcc/testsuite/c-c++-common/gomp/pr71758.c
new file mode 100644
index 00000000000..d3c86972ef5
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/pr71758.c
@@ -0,0 +1,10 @@
+/* PR middle-end/71758 */
+
+void
+foo (int *p)
+{
+  long long i = 0;
+  #pragma omp target device (i)
+  ;
+  #pragma omp target update device (i) to (p[0])
+}
diff --git a/gcc/testsuite/c-c++-common/pr71372.c b/gcc/testsuite/c-c++-common/pr71372.c
new file mode 100644
index 00000000000..943adab628d
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/pr71372.c
@@ -0,0 +1,14 @@
+/* PR c++/71372 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+
+void
+foo (volatile int *p, int q)
+{
+  *(volatile int *)p = 0;
+  *(p + (q - q) + 1) = 0;
+  *(p + (q - q) + 2) = 0;
+  *(p + (q - q) + 3) = 0;
+}
+
+/* { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } } */
diff --git a/gcc/testsuite/c-c++-common/ubsan/bounds-13.c b/gcc/testsuite/c-c++-common/ubsan/bounds-13.c
new file mode 100644
index 00000000000..25b0467ec67
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/ubsan/bounds-13.c
@@ -0,0 +1,31 @@
+/* PR sanitizer/71498 */
+/* { dg-do run } */
+/* { dg-options "-fsanitize=bounds -Wno-array-bounds" } */
+
+struct S { int a[100]; int b, c; } s;
+
+__attribute__((noinline, noclone)) int
+foo (int x)
+{
+  return s.a[x];
+}
+
+__attribute__((noinline, noclone)) int
+bar (int x)
+{
+  static int *d = &s.a[99];
+  asm volatile ("" : : "r" (&d));
+  return s.a[x];
+}
+
+int
+main ()
+{
+  volatile int a = 0;
+  a += foo (100);
+  a += bar (100);
+  return 0;
+}
+
+/* { dg-output "index 100 out of bounds for type 'int \\\[100\\\]'\[^\n\r]*(\n|\r\n|\r)" } */
+/* { dg-output "\[^\n\r]*index 100 out of bounds for type 'int \\\[100\\\]'\[^\n\r]*(\n|\r\n|\r)" } */
diff --git a/gcc/testsuite/c-c++-common/ubsan/pr71512-1.c b/gcc/testsuite/c-c++-common/ubsan/pr71512-1.c
new file mode 100644
index 00000000000..2a90ab18d51
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/ubsan/pr71512-1.c
@@ -0,0 +1,5 @@
+/* PR c/71512 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fnon-call-exceptions -ftrapv -fexceptions -fsanitize=undefined" } */
+
+#include "../../gcc.dg/pr44545.c"
diff --git a/gcc/testsuite/c-c++-common/ubsan/pr71512-2.c b/gcc/testsuite/c-c++-common/ubsan/pr71512-2.c
new file mode 100644
index 00000000000..1c955930be8
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/ubsan/pr71512-2.c
@@ -0,0 +1,5 @@
+/* PR c/71512 */
+/* { dg-do compile } */
+/* { dg-options "-O -fexceptions -fnon-call-exceptions -ftrapv -fsanitize=undefined" } */
+
+#include "../../gcc.dg/pr47086.c"
diff --git a/gcc/testsuite/g++.dg/concepts/memfun2.C b/gcc/testsuite/g++.dg/concepts/memfun2.C
new file mode 100644
index 00000000000..c186a183762
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/memfun2.C
@@ -0,0 +1,21 @@
+// PR c++/72415
+// { dg-options "-std=c++1z -fconcepts" }
+
+template<int... Indices>
+struct indices {};
+
+template<typename Dummy>
+struct foo_type {
+    template<int... Indices>
+    static void impl(indices<Indices...>)
+        requires (... && (Indices, true));
+
+    static auto caller()
+    { return impl(indices<0, 1, 2> {}); }
+};
+
+int main()
+{
+    // internal compiler error: in satisfy_predicate_constraint, at cp/constraint.cc:2013
+    foo_type<void>::caller();
+}
diff --git a/gcc/testsuite/g++.dg/concepts/req19.C b/gcc/testsuite/g++.dg/concepts/req19.C
new file mode 100644
index 00000000000..0564b0ce8b0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/req19.C
@@ -0,0 +1,13 @@
+// { dg-options "-std=c++1z -fconcepts" }
+
+struct B
+{
+  template <class T> void f(T t)
+    requires requires (T tt) { tt; }
+  { }
+};
+
+int main()
+{
+  B().f(42);
+}
diff --git a/gcc/testsuite/g++.dg/concepts/req20.C b/gcc/testsuite/g++.dg/concepts/req20.C
new file mode 100644
index 00000000000..0584e98c68b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/req20.C
@@ -0,0 +1,19 @@
+// { dg-options "-std=c++1z -fconcepts" }
+
+template <class T> concept bool C = true;
+
+template <class T>
+requires C<typename T::foo>
+void f(T t) { }
+
+void f(...);
+
+template <class T>
+requires C<T>
+void g(T t) { }
+
+int main()
+{
+  f(42);
+  g(42);
+}
diff --git a/gcc/testsuite/g++.dg/concepts/variadic4.C b/gcc/testsuite/g++.dg/concepts/variadic4.C
new file mode 100644
index 00000000000..d20fa7da4e5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/variadic4.C
@@ -0,0 +1,20 @@
+// PR c++/73456
+// { dg-options "-std=c++1z -fconcepts" }
+
+template<typename...> struct list {};
+
+template<typename Seq>
+concept bool Sequence = true;
+
+template<Sequence... Seqs>
+struct zip;
+
+template<Sequence... Seqs>
+    requires requires { typename list<Seqs...>; }
+// main.cpp:12:8: internal compiler error: in non_atomic_constraint_p, at cp/logic.cc:315
+struct zip<Seqs...> {};
+
+int main()
+{
+    zip<list<>, list<int>> {};
+}
diff --git a/gcc/testsuite/g++.dg/conversion/ambig3.C b/gcc/testsuite/g++.dg/conversion/ambig3.C
new file mode 100644
index 00000000000..e17b64ea90a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/conversion/ambig3.C
@@ -0,0 +1,13 @@
+// PR c++/71835
+// { dg-do compile }
+
+typedef void T (int);
+struct A { operator T * (); };	// { dg-message "candidate" }
+struct B { operator T * (); };	// { dg-message "candidate" }
+struct C : A, B {} c;
+
+void
+foo ()
+{
+  c (0);		// { dg-error "is ambiguous" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C b/gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C
new file mode 100644
index 00000000000..39592b26a58
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C
@@ -0,0 +1,37 @@
+// PR c++/71442
+// { dg-do compile { target c++11 } }
+// { dg-options "-Wunused-variable" }
+
+struct C
+{
+  template<typename... Ts>
+  int operator()(Ts &&...)
+  {
+    return sizeof...(Ts);
+  }
+};
+
+int
+foo ()
+{
+  C {} (1, 1L, 1LL, 1.0);
+}
+
+template<int N>
+void
+bar ()
+{
+  char a;		// { dg-warning "unused variable" }
+  short b;		// { dg-warning "unused variable" }
+  int c;		// { dg-warning "unused variable" }
+  long d;		// { dg-warning "unused variable" }
+  long long e;		// { dg-warning "unused variable" }
+  float f;		// { dg-warning "unused variable" }
+  double g;		// { dg-warning "unused variable" }
+}
+
+void
+baz ()
+{
+  bar <0> ();
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/alias-decl-55.C b/gcc/testsuite/g++.dg/cpp0x/alias-decl-55.C
new file mode 100644
index 00000000000..135ff532909
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/alias-decl-55.C
@@ -0,0 +1,23 @@
+// PR c++/71718
+// { dg-do compile { target c++11 } }
+
+template <typename T>
+class A : T{};
+
+template <typename T>
+using sp = A<T>;
+
+struct Base {};
+
+template <typename T, int num = 1>
+const sp<T>
+rec() 			// { dg-error "depth" }
+{
+  return rec<T, num - 1>();
+}
+
+static void f(void) {
+  rec<Base>();
+}
+
+// { dg-prune-output "compilation terminated" }
diff --git a/gcc/testsuite/g++.dg/cpp0x/alignas7.C b/gcc/testsuite/g++.dg/cpp0x/alignas7.C
new file mode 100644
index 00000000000..4ea12526855
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/alignas7.C
@@ -0,0 +1,13 @@
+// PR c++/71513
+// { dg-do compile { target c++11 } }
+
+template < int N, typename T >
+struct A
+{
+  enum alignas (N) E : T;
+};
+
+#define SA(X) static_assert((X), #X)
+
+constexpr int al = alignof(double);
+SA(alignof(A<al,char>::E) == al);
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-71828.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-71828.C
new file mode 100644
index 00000000000..b74cde965ff
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-71828.C
@@ -0,0 +1,5 @@
+// PR c++/71828
+// { dg-do compile { target c++11 } }
+
+constexpr _Complex int a { 1, 2 };
+static_assert (& __imag a != &__real a, "");
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-array16.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-array16.C
new file mode 100644
index 00000000000..af2e58d1428
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-array16.C
@@ -0,0 +1,23 @@
+// PR c++/71166
+// { dg-do compile { target c++11 } }
+
+struct Foo { int value; };
+
+constexpr Foo MakeFoo() { return Foo{0}; }
+
+struct Bar {
+	Foo color = MakeFoo();
+};
+
+struct BarContainer {
+	Bar array[1];
+};
+
+Foo X ()
+{
+  return MakeFoo ();
+}
+
+void Foo() {
+	new BarContainer();
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-array17.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-array17.C
new file mode 100644
index 00000000000..c6afa507f02
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-array17.C
@@ -0,0 +1,61 @@
+// PR c++/71092
+// { dg-do compile { target c++11 } }
+
+template <typename _Default> struct A { using type = _Default; };
+template <typename _Default, template <typename> class>
+using __detected_or = A<_Default>;
+template <typename _Default, template <typename> class _Op>
+using __detected_or_t = typename __detected_or<_Default, _Op>::type;
+template <typename _Tp> struct B { typedef _Tp value_type; };
+struct C {
+  template <typename _Tp> using __pointer = typename _Tp::pointer;
+};
+template <typename _Alloc> struct J : C {
+  using pointer = __detected_or_t<typename _Alloc::value_type *, __pointer>;
+};
+template <typename _T1> void _Construct(_T1 *) { new _T1; }
+struct D {
+  template <typename _ForwardIterator, typename _Size>
+  static _ForwardIterator __uninit_default_n(_ForwardIterator p1, _Size) {
+    _Construct(p1);
+  }
+};
+template <typename _ForwardIterator, typename _Size>
+void __uninitialized_default_n(_ForwardIterator p1, _Size) {
+  D::__uninit_default_n(p1, 0);
+}
+template <typename _ForwardIterator, typename _Size, typename _Tp>
+void __uninitialized_default_n_a(_ForwardIterator p1, _Size, _Tp) {
+  __uninitialized_default_n(p1, 0);
+}
+template <typename> struct __shared_ptr {
+  constexpr __shared_ptr() : _M_ptr(), _M_refcount() {}
+  int _M_ptr;
+  int _M_refcount;
+};
+template <typename _Alloc> struct F {
+  typedef _Alloc _Tp_alloc_type;
+  struct G {
+    typename J<_Tp_alloc_type>::pointer _M_start;
+    G(_Tp_alloc_type);
+  };
+  F(int, _Alloc p2) : _M_impl(p2) {}
+  G _M_impl;
+};
+template <typename _Tp, typename _Alloc = B<_Tp>> struct K : F<_Alloc> {
+  typedef _Alloc allocator_type;
+  K(int, allocator_type p2 = allocator_type()) : F<_Alloc>(0, p2) {
+    __uninitialized_default_n_a(this->_M_impl._M_start, 0, 0);
+  }
+};
+struct H {
+  H();
+  struct I {
+    __shared_ptr<int> trigger[1];
+  };
+  __shared_ptr<int> resetTrigger_;
+  K<I> states_;
+  __shared_ptr<int> triggerManager_;
+};
+__shared_ptr<int> a;
+H::H() : states_(0), triggerManager_(a) {}
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-list1.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-list1.C
new file mode 100644
index 00000000000..f831a112cc9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-list1.C
@@ -0,0 +1,15 @@
+// PR c++/72457
+// { dg-do compile { target c++11 } }
+
+struct A {
+  int i;
+  constexpr A(): i(0) {}
+};
+
+struct B: A { };
+
+struct C
+{
+  B b;
+  constexpr C() : b{} {}
+};
diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem6.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem6.C
new file mode 100644
index 00000000000..ed18ab1a630
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-ptrmem6.C
@@ -0,0 +1,13 @@
+// PR c++/71896
+// { dg-do compile { target c++11 } }
+
+struct Foo {
+  int x;
+};
+
+constexpr bool compare(int Foo::*t) { return t == &Foo::x; }
+
+constexpr bool b = compare(&Foo::x);
+
+#define SA(X) static_assert ((X),#X)
+SA(b);
diff --git a/gcc/testsuite/g++.dg/cpp0x/decltype65.C b/gcc/testsuite/g++.dg/cpp0x/decltype65.C
new file mode 100644
index 00000000000..68734881680
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/decltype65.C
@@ -0,0 +1,11 @@
+// PR c++/71511
+// { dg-do compile { target c++11 } }
+
+template < typename T >
+class A
+{
+  static int i;
+};
+
+//okay: template < typename T > int A <T>::i = 100;
+template < typename T > int decltype (A < T > ())::i = 100; // { dg-error "decltype" }
diff --git a/gcc/testsuite/g++.dg/cpp0x/decltype66.C b/gcc/testsuite/g++.dg/cpp0x/decltype66.C
new file mode 100644
index 00000000000..76ff1e2e7b6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/decltype66.C
@@ -0,0 +1,19 @@
+// PR c++/71350
+// { dg-do compile { target c++11 } }
+
+template<typename T, unsigned int N>
+struct Array
+{
+    T data[N];
+};
+
+template<typename T>
+struct Foo
+{
+    int operator[](const Array<int, 2>& i) const { return 0; }
+    auto bar() -> decltype((*this)[{1,2}] * 0) {
+      return *this;		// { dg-error "cannot convert" }
+    }
+};
+
+template struct Foo<int>;
diff --git a/gcc/testsuite/g++.dg/cpp0x/inh-ctor20.C b/gcc/testsuite/g++.dg/cpp0x/inh-ctor20.C
new file mode 100644
index 00000000000..f33056df493
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/inh-ctor20.C
@@ -0,0 +1,16 @@
+// PR c++/70972
+// { dg-do compile { target c++11 } }
+
+struct moveonly {
+    moveonly(moveonly&&) = default;
+    moveonly() = default;
+};
+
+struct A {
+    A(moveonly) {}
+};
+struct B : A {
+    using A::A;
+};
+
+B b(moveonly{});
diff --git a/gcc/testsuite/g++.dg/cpp0x/inh-ctor21.C b/gcc/testsuite/g++.dg/cpp0x/inh-ctor21.C
new file mode 100644
index 00000000000..64655068a0a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/inh-ctor21.C
@@ -0,0 +1,19 @@
+// PR c++/70972
+// { dg-do run { target c++11 } }
+
+struct abort_on_copy{
+    abort_on_copy(abort_on_copy&&) = default;
+    abort_on_copy(const abort_on_copy&) { __builtin_abort(); }
+    abort_on_copy() = default;
+};
+
+struct A {
+    A(abort_on_copy) {}
+};
+struct B : A {
+    using A::A;
+};
+
+int main() {
+    B b(abort_on_copy{});
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-base2.C b/gcc/testsuite/g++.dg/cpp0x/initlist-base2.C
new file mode 100644
index 00000000000..68ccad908c8
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/initlist-base2.C
@@ -0,0 +1,21 @@
+// PR c++/55922
+// { dg-do run { target c++11 } }
+
+bool called = false;
+
+struct Base {
+  Base() { if (called) throw 1; called = true; }
+};
+
+struct B1 : virtual Base {
+  B1() { }
+};
+
+struct C : B1, virtual Base {
+  C() : B1{}
+  { }
+};
+
+int main() {
+  C c;
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-base3.C b/gcc/testsuite/g++.dg/cpp0x/initlist-base3.C
new file mode 100644
index 00000000000..9febac304e1
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/initlist-base3.C
@@ -0,0 +1,17 @@
+// PR c++/71774
+// { dg-do compile { target c++11 } }
+
+class Meow
+{
+  protected:
+    Meow() =default;        
+    virtual void f() {}
+};
+
+class Purr : public Meow
+{
+  public:
+    Purr()
+      : Meow{}
+    {}  
+};
diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-template1.C b/gcc/testsuite/g++.dg/cpp0x/initlist-template1.C
new file mode 100644
index 00000000000..a24e205d71c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/initlist-template1.C
@@ -0,0 +1,15 @@
+// PR c++/70824
+// { dg-do compile { target c++11 } }
+
+#include <initializer_list>
+
+constexpr
+int
+max(std::initializer_list<int> __l)
+{ return *__l.begin(); }
+
+template <class Src>
+void
+a() {
+  const int v =  max({1});
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C
new file mode 100644
index 00000000000..4b8d6487f5c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv11.C
@@ -0,0 +1,10 @@
+// PR c++/71105
+// { dg-do compile { target c++11 } }
+
+void foo()
+{
+  int i;
+  static_cast<void(*)()>([i]{});  // { dg-error "invalid static_cast" }
+  static_cast<void(*)()>([=]{});  // { dg-error "invalid static_cast" }
+  static_cast<void(*)()>([&]{});  // { dg-error "invalid static_cast" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce3.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce3.C
new file mode 100644
index 00000000000..68ac29c9eac
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-deduce3.C
@@ -0,0 +1,15 @@
+// PR c++/69223
+// { dg-do compile { target c++11 } }
+
+template <class T> struct A
+{
+  T x[20];
+};
+
+int main()
+{
+  auto l = [](const A<int>& i){ return i; };
+  A<int> a;
+
+  l(a);
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice16.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice16.C
new file mode 100644
index 00000000000..f7dea7ca653
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice16.C
@@ -0,0 +1,8 @@
+// PR c++/70781
+// { dg-do compile { target c++11 } }
+
+template < typename T >
+void foo ()
+{
+  T ([=] (S) { [=] {}; }); 	// { dg-error "" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr68724.C b/gcc/testsuite/g++.dg/cpp0x/pr68724.C
new file mode 100644
index 00000000000..ff6d84dc3f7
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr68724.C
@@ -0,0 +1,15 @@
+// PR 68724 ICE in  unificiation
+// { dg-do compile { target c++11 } }
+
+template <typename _Tp, _Tp>
+struct integral_constant
+{
+};
+
+integral_constant<bool, true> inst;
+
+template <typename _Tp>
+struct integral_constant<bool, __is_enum(_Tp)> // { dg-error "" }
+{
+};
+
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr70869.C b/gcc/testsuite/g++.dg/cpp0x/pr70869.C
new file mode 100644
index 00000000000..84c532b6772
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr70869.C
@@ -0,0 +1,25 @@
+// PR c++/70869
+// { dg-do run { target c++11 } }
+
+#include <initializer_list>
+
+struct A
+{
+  int f () { return 1; }
+  int g () { return 2; }
+  int h () { return 3; }
+};
+
+int
+main ()
+{
+  int cnt = 0;
+  for (const auto &m : { &A::f, &A::g, &A::h })
+    {
+      A a;
+      if ((a.*m) () != ++cnt)
+	__builtin_abort ();
+    }
+  if (cnt != 3)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr71054.C b/gcc/testsuite/g++.dg/cpp0x/pr71054.C
new file mode 100644
index 00000000000..518bafcbd21
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr71054.C
@@ -0,0 +1,21 @@
+// PR c++/71054
+// { dg-do compile { target c++11 } }
+
+#include <initializer_list>
+
+template <typename D, typename T = decltype (&D::U)>
+struct S
+{
+  struct A
+  {
+    int a;
+    int b;
+    T p;
+  };
+  S () { std::initializer_list<A> a{ {0, 0, &D::V} }; }
+};
+struct R {
+  void V (int);
+  void U (int);
+};
+S<R> b;
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr71739.C b/gcc/testsuite/g++.dg/cpp0x/pr71739.C
new file mode 100644
index 00000000000..b31a580cd0e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr71739.C
@@ -0,0 +1,5 @@
+// PR c++/71739
+// { dg-do compile { target c++11 } }
+
+template <int N> struct alignas(N) A;
+template <int N> struct alignas(N) A {};
diff --git a/gcc/testsuite/g++.dg/cpp0x/range-for31.C b/gcc/testsuite/g++.dg/cpp0x/range-for31.C
new file mode 100644
index 00000000000..13daf619238
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/range-for31.C
@@ -0,0 +1,9 @@
+// PR c++/71604
+// { dg-do compile { target c++11 } }
+
+void foo ()
+{
+  int a[2] = { 1, 2 };
+  for (struct S { S (int) {} } S : a) // { dg-error "types may not be defined" }
+    ;
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C b/gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C
new file mode 100644
index 00000000000..6b7cfba0d3c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/rv-bitfield3.C
@@ -0,0 +1,14 @@
+// PR c++/71576
+// { dg-do compile { target c++11 } }
+
+template < typename T > T && foo ();
+
+struct A
+{
+  int i:5;
+};
+
+void foo ()
+{
+  int &&j = foo < A > ().i;
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/sfinae57.C b/gcc/testsuite/g++.dg/cpp0x/sfinae57.C
new file mode 100644
index 00000000000..975a330b9bd
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/sfinae57.C
@@ -0,0 +1,16 @@
+// PR c++/71495
+// { dg-do compile { target c++11 } }
+
+struct A;
+template <class T> void f(T);	// { dg-bogus "initializing" }
+template <class T> T&& declval();
+struct B
+{
+  template <class T, class U> static decltype(f<T>(declval<U>())) g(int);
+  template <class T, class U> void g(...);
+} b;
+
+int main()
+{
+  b.g<A,A>(42);
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic-mangle1a.C b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle1a.C
new file mode 100644
index 00000000000..b230ffa6560
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle1a.C
@@ -0,0 +1,12 @@
+// Test for sZ mangling.
+// { dg-do compile { target c++11 } }
+// { dg-final { scan-assembler "_Z1fIJidEEv1AIXstDpT_EE" } }
+// { dg-options -fabi-version=9 }
+
+template <int I> struct A { };
+template <typename... Ts> void f(A<sizeof...(Ts)>);
+
+int main()
+{
+  f<int,double>(A<2>());
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic-mangle2a.C b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle2a.C
new file mode 100644
index 00000000000..3ac15176704
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle2a.C
@@ -0,0 +1,19 @@
+// Testcase from cxx-abi-dev.
+// { dg-do compile { target c++11 } }
+// { dg-options "-fabi-version=9" }
+
+struct A {
+  template<int...T> using N = int[sizeof...(T)];
+  template<int...A> void f(N<A...> &);
+
+  template<typename...T> using M = int[sizeof...(T)];
+  template<typename...A> void g(M<A...> &);
+};
+void g(A a)
+{
+  int arr[3];
+  // { dg-final { scan-assembler "_ZN1A1fIJLi1ELi2ELi3EEEEvRAszspT__i" } }
+  a.f<1,2,3>(arr);
+  // { dg-final { scan-assembler "_ZN1A1gIJiiiEEEvRAstDpT__i" } }
+  a.g<int,int,int>(arr);
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3.C b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3.C
new file mode 100644
index 00000000000..f239ef717de
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3.C
@@ -0,0 +1,10 @@
+// Testcase from cxx-abi-dev.
+// { dg-do compile { target c++11 } }
+// { dg-final { scan-assembler "_ZN1A1fIJiiEiJiiiEEEvRAsPDpT_T0_DpT1_E_iS3_S5_" } }
+
+struct A {
+  template<typename...T> using N = int[sizeof...(T)];
+  template<typename...A, typename B, typename...C>
+      void f(N<A..., B, C...> &, B, C...);
+};
+void g(A a) { int arr[6]; a.f<int, int>(arr, 1, 2, 3, 4); }
diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3a.C b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3a.C
new file mode 100644
index 00000000000..eba8f591c3e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/variadic-mangle3a.C
@@ -0,0 +1,11 @@
+// Testcase from cxx-abi-dev.
+// { dg-do compile { target c++11 } }
+// { dg-options -fabi-version=9 }
+// { dg-final { scan-assembler "_ZN1A1fIJiiEiJiiiEEEvRAstDpT1__iT0_S2_" } }
+
+struct A {
+  template<typename...T> using N = int[sizeof...(T)];
+  template<typename...A, typename B, typename...C>
+      void f(N<A..., B, C...> &, B, C...);
+};
+void g(A a) { int arr[6]; a.f<int, int>(arr, 1, 2, 3, 4); }
diff --git a/gcc/testsuite/g++.dg/cpp0x/variadic-nested1.C b/gcc/testsuite/g++.dg/cpp0x/variadic-nested1.C
new file mode 100644
index 00000000000..abfb49a712c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/variadic-nested1.C
@@ -0,0 +1,9 @@
+// PR c++/71833
+// { dg-do compile { target c++11 } }
+
+template < typename ... Ts > struct A 
+{
+  template < Ts ..., typename ... Us > struct B {};
+};
+
+A <>::B < int > e;
diff --git a/gcc/testsuite/g++.dg/cpp1y/auto-fn31.C b/gcc/testsuite/g++.dg/cpp1y/auto-fn31.C
new file mode 100644
index 00000000000..c99c59571e9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/auto-fn31.C
@@ -0,0 +1,7 @@
+// PR c++/70572
+// { dg-do compile { target c++14 } }
+
+void foo ()
+{
+  decltype (auto) a = foo;  // { dg-error "initializer" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/auto-fn32.C b/gcc/testsuite/g++.dg/cpp1y/auto-fn32.C
new file mode 100644
index 00000000000..0a5dafce858
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/auto-fn32.C
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++14 } }
+
+template<class,class> struct same_type;
+template<class T> struct same_type<T,T> {};
+
+struct A
+{
+  static int b;
+  int c;
+
+  template <int>
+  decltype(auto) f() { return A::c; }
+
+  template <int>
+  decltype(auto) g() { return (A::c); }
+};
+
+A a;
+
+template <int>
+decltype(auto) f() { return A::b; }
+
+template <int>
+decltype(auto) g() { return (A::b); }
+
+int main()
+{
+  same_type<decltype(f<0>()), int>();
+  same_type<decltype(g<0>()), int&>();
+
+  same_type<decltype(a.f<0>()), int>();
+  same_type<decltype(a.g<0>()), int&>();
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C
new file mode 100644
index 00000000000..3abdd8490d6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-array5.C
@@ -0,0 +1,13 @@
+// PR c++/71972
+// { dg-do compile { target c++14 } }
+
+typedef int size_t;
+template <int N> struct S {
+  template <size_t M> constexpr S(const char (&)[M]) : data{} {
+    data[0] = data[0];
+  }
+  char data[N];
+};
+int main() {
+  constexpr S<1> s1("");
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C
new file mode 100644
index 00000000000..383bde934be
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-switch4.C
@@ -0,0 +1,27 @@
+// PR c++/72868
+// { dg-do compile }
+// { dg-options "-std=gnu++14" }
+
+constexpr int
+foo (int i)
+{
+  switch (i)
+    {
+    case 11 ... 12:
+      return 4;
+    case 0 ... 9:
+      return 3;
+    default:
+      return 7;
+    }
+}
+
+#define SA(X) static_assert((X),#X)
+SA (foo (-1) == 7);
+SA (foo (0) == 3);
+SA (foo (3) == 3);
+SA (foo (9) == 3);
+SA (foo (10) == 7);
+SA (foo (11) == 4);
+SA (foo (12) == 4);
+SA (foo (13) == 7);
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C b/gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C
new file mode 100644
index 00000000000..2e4ec4964d5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-conv1.C
@@ -0,0 +1,13 @@
+// PR c++/71105
+// { dg-do compile { target c++14 } }
+
+void foo()
+{
+  int i;
+  static_cast<void(*)(int)>([i](auto){});  // { dg-error "invalid static_cast" }
+  static_cast<void(*)(int)>([=](auto){});  // { dg-error "invalid static_cast" }
+  static_cast<void(*)(int)>([&](auto){});  // { dg-error "invalid static_cast" }
+  static_cast<float(*)(float)>([i](auto x){ return x; });  // { dg-error "invalid static_cast" }
+  static_cast<float(*)(float)>([=](auto x){ return x; });  // { dg-error "invalid static_cast" }
+  static_cast<float(*)(float)>([&](auto x){ return x; });  // { dg-error "invalid static_cast" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C b/gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C
new file mode 100644
index 00000000000..45c0f3fe186
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-conv2.C
@@ -0,0 +1,23 @@
+// PR c++/71105
+// { dg-do compile { target c++14 } }
+
+template <typename T> T declval();
+template <typename, typename> struct is_same
+{ static constexpr bool value = false; };
+template <typename T> struct is_same<T, T>
+{ static constexpr bool value = true; };
+
+template <class F>
+struct indirected : F {
+  indirected(F f) : F(f) {}
+  template <class I>
+  auto operator()(I i) -> decltype(declval<F&>()(*i)) {
+    return static_cast<F&>(*this)(*i);
+  }
+};
+
+int main() {
+  auto f = [=](auto i) { return i + i; };
+  auto i = indirected<decltype(f)>{f};
+  static_assert(is_same<decltype(i(declval<int*>())), int>::value, "");
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv2.C b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv2.C
new file mode 100644
index 00000000000..5528455fe0b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv2.C
@@ -0,0 +1,26 @@
+// PR c++/71117
+// { dg-do compile { target c++14 } }
+
+template <class T> T&& declval() noexcept;
+template <class, class>
+constexpr bool is_same = false;
+template <class T>
+constexpr bool is_same<T, T> = true;
+
+template <class F>
+struct indirected : F {
+    indirected(F f) : F(f) {}
+    template <class I>
+    auto operator()(I i) -> decltype(declval<F&>()(*i)) {
+        return static_cast<F&>(*this)(*i);
+    }
+};
+
+int main() {
+    auto f = [](auto rng) {
+        static_assert(is_same<decltype(rng), int>, "");
+        return 42;
+    };
+    indirected<decltype(f)> i(f);
+    static_assert(is_same<decltype(i(declval<int*>())), int>, "");
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv3.C b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv3.C
new file mode 100644
index 00000000000..8ec6a2092d7
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-conv3.C
@@ -0,0 +1,10 @@
+// PR c++/70942
+// { dg-do compile { target c++14 } }
+
+int main()
+{
+    int x = 0;
+    [](auto&& xv){
+        static_cast<decltype(xv)>(xv) = 1;
+    }(x);
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C
new file mode 100644
index 00000000000..669226826c6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static1.C
@@ -0,0 +1,13 @@
+// PR c++/70735
+// { dg-do run { target c++14 } }
+
+int main()
+{
+  static int a;
+  auto f = [](auto) { return a; };
+  if (f(0) != 0)
+    __builtin_abort();
+  a = 1;
+  if (f(0) != 1)
+    __builtin_abort();
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C
new file mode 100644
index 00000000000..c8e251fc957
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-generic-static2.C
@@ -0,0 +1,19 @@
+// PR c++/70735
+// { dg-do run { target c++14 } }
+
+template <class T>
+static void g()
+{
+  static int a;
+  auto f = [](auto) { return a; };
+  if (f(0) != 0)
+    __builtin_abort();
+  a = 1;
+  if (f(0) != 1)
+    __builtin_abort();
+}
+
+int main()
+{
+  g<int>();
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C b/gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C
new file mode 100644
index 00000000000..86fb88aad17
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/lambda-ice1.C
@@ -0,0 +1,7 @@
+// PR c++/72800
+// { dg-do compile { target c++14 } }
+
+void foo ()
+{
+  [n {}] {};  // { dg-error "one element|deducing" }
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/paren4.C b/gcc/testsuite/g++.dg/cpp1y/paren4.C
new file mode 100644
index 00000000000..71abe846dbf
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/paren4.C
@@ -0,0 +1,14 @@
+// PR c++/70822
+// { dg-do compile { target c++14 } }
+
+struct a
+{
+  static int b;
+};
+
+template <typename>
+void
+foo ()
+{
+  &(a::b);
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/var-templ39a.C b/gcc/testsuite/g++.dg/cpp1y/var-templ39a.C
new file mode 100644
index 00000000000..5ba1b9d4579
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/var-templ39a.C
@@ -0,0 +1,27 @@
+// PR c++/66260
+// { dg-do compile { target c++14 } }
+
+template <class>
+bool foo = false;
+template <>
+bool foo<int> = true;
+template <class T, int N>
+bool foo<T[N]> = foo<T>;
+
+#define assert(X) if (!(X)) __builtin_abort();
+
+int main()
+{
+  // { dg-final { scan-assembler "_Z3fooIiE" } }
+  assert(foo<int>);
+  // { dg-final { scan-assembler "_Z3fooIdE" } }
+  assert(!foo<double>);
+  // { dg-final { scan-assembler "_Z3fooIA3_iE" } }
+  assert(foo<int[3]>);
+  // { dg-final { scan-assembler "_Z3fooIA3_dE" } }
+  assert(!foo<double[3]>);
+  // { dg-final { scan-assembler "_Z3fooIA2_A5_A3_iE" } }
+  assert(foo<int[2][5][3]>);
+  // { dg-final { scan-assembler "_Z3fooIA2_A5_A3_dE" } }
+  assert(!foo<double[2][5][3]>);
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/var-templ51.C b/gcc/testsuite/g++.dg/cpp1y/var-templ51.C
new file mode 100644
index 00000000000..f85ef9c1177
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/var-templ51.C
@@ -0,0 +1,11 @@
+// PR c++/60095
+// { dg-do link { target c++14 } }
+
+template <class>
+constexpr bool b = false;
+template<typename T>
+constexpr bool b<T*> = true;
+int main() {
+    b<int*>;
+    b<double*>;
+}
diff --git a/gcc/testsuite/g++.dg/cpp1y/var-templ52.C b/gcc/testsuite/g++.dg/cpp1y/var-templ52.C
new file mode 100644
index 00000000000..61fd19e44ce
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/var-templ52.C
@@ -0,0 +1,14 @@
+// PR c++/69515
+// { dg-do link { target c++14 } }
+
+struct A { A(int = 0) {} };
+
+template<class...> class meow;
+
+template<typename T> A foo;
+template<typename... Ts> A foo<meow<Ts...>> = 1;
+
+auto&& a = foo<meow<int>>;
+auto&& b = foo<meow<int, int>>;
+
+int main() {}
diff --git a/gcc/testsuite/g++.dg/cpp1y/var-templ53.C b/gcc/testsuite/g++.dg/cpp1y/var-templ53.C
new file mode 100644
index 00000000000..3e30d679f19
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/var-templ53.C
@@ -0,0 +1,10 @@
+// PR c++/71630
+// { dg-do compile { target c++14 } }
+
+template <class T>
+extern T pi;
+
+int main()
+{
+  return pi<int>;
+}
diff --git a/gcc/testsuite/g++.dg/cpp1z/fold-mangle.C b/gcc/testsuite/g++.dg/cpp1z/fold-mangle.C
new file mode 100644
index 00000000000..709ef2e2cc5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1z/fold-mangle.C
@@ -0,0 +1,20 @@
+// PR c++/71711
+// { dg-options -std=c++1z }
+
+template < int > struct A {};
+template < int ... N > void unary_left (A < (... + N) >);
+template < int ... N > void unary_right (A < (N + ...) >);
+template < int ... N > void binary_left (A < (42 + ... + N) >);
+template < int ... N > void binary_right (A < (N + ... + 42) >);
+
+void bar ()
+{
+  // { dg-final { scan-assembler "_Z10unary_leftIJLi1ELi2ELi3EEEv1AIXflplT_EE" } }
+  unary_left < 1, 2, 3 > ({});
+  // { dg-final { scan-assembler "_Z11unary_rightIJLi1ELi2ELi3EEEv1AIXfrplT_EE" } }
+  unary_right < 1, 2, 3 > ({});
+  // { dg-final { scan-assembler "_Z11binary_leftIJLi1ELi2ELi3EEEv1AIXfLplLi42ET_EE" } }
+  binary_left < 1, 2, 3 > ({});
+  // { dg-final { scan-assembler "_Z12binary_rightIJLi1ELi2ELi3EEEv1AIXfRplT_Li42EEE" } }
+  binary_right < 1, 2, 3 > ({});
+}
diff --git a/gcc/testsuite/g++.dg/debug/pr71057.C b/gcc/testsuite/g++.dg/debug/pr71057.C
new file mode 100644
index 00000000000..2ed1eed988e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/debug/pr71057.C
@@ -0,0 +1,12 @@
+// { dg-do compile }
+// { dg-options "-g" }
+template <typename _Tp> using decay_t = _Tp;
+template <typename> struct A;
+template <typename> struct B { B(A<int>); };
+template <typename> struct C {
+      template <typename U> using constructor = B<decay_t<U>>;
+        typedef constructor<int> dummy;
+};
+template <typename> struct D {};
+C<int> a;
+D<B<int>> fn1() { fn1, a; }
diff --git a/gcc/testsuite/g++.dg/ext/array3.C b/gcc/testsuite/g++.dg/ext/array3.C
new file mode 100644
index 00000000000..e8940dbee21
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/array3.C
@@ -0,0 +1,19 @@
+// PR c++/70709
+// { dg-options "" }
+
+struct A
+{
+  A (int);
+};
+
+struct B
+{
+  B () {} 
+  A a[0];
+};
+
+struct C
+{
+  C () {} 
+  B a[0];
+};
diff --git a/gcc/testsuite/g++.dg/ext/flexary16.C b/gcc/testsuite/g++.dg/ext/flexary16.C
new file mode 100644
index 00000000000..a3e040d7c1b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/flexary16.C
@@ -0,0 +1,37 @@
+// PR c++/71147 - [6 Regression] Flexible array member wrongly rejected
+//   in template
+// { dg-do compile }
+
+template <typename>
+struct container
+{
+  struct elem {
+    unsigned u;
+  };
+
+  struct incomplete {
+    int x;
+    elem array[];
+  };
+};
+
+unsigned f (container<void>::incomplete* i)
+{
+  return i->array [0].u;
+}
+
+
+template <typename T>
+struct D: container<T>
+{
+  struct S {
+    int x;
+    typename container<T>::elem array[];
+  };
+};
+
+
+unsigned g (D<void>::S *s)
+{
+  return s->array [0].u;
+}
diff --git a/gcc/testsuite/g++.dg/ext/vector31.C b/gcc/testsuite/g++.dg/ext/vector31.C
new file mode 100644
index 00000000000..a0568394315
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/vector31.C
@@ -0,0 +1,29 @@
+// PR c++/71871
+// { dg-do compile }
+
+typedef unsigned int V __attribute__ ((__vector_size__ (32)));
+
+template <int N>
+void
+foo (V *x)
+{
+  V a = *x;
+  a = a ? a : -1;
+  *x = a;
+}
+
+template <typename T>
+void
+bar (T *x)
+{
+  T a = *x;
+  a = a ? a : -1;
+  *x = a;
+}
+
+void
+test (V *x, V *y)
+{
+  foo<0> (x);
+  bar<V> (y);
+}
diff --git a/gcc/testsuite/g++.dg/gomp/declare-simd-6.C b/gcc/testsuite/g++.dg/gomp/declare-simd-6.C
new file mode 100644
index 00000000000..09137ee5b98
--- /dev/null
+++ b/gcc/testsuite/g++.dg/gomp/declare-simd-6.C
@@ -0,0 +1,37 @@
+// PR c++/71257
+// { dg-do compile }
+// { dg-options "-fopenmp-simd" }
+
+struct S { int a; };
+#pragma omp declare simd linear(val(a):2)
+int f1 (int &a);
+#pragma omp declare simd linear(uval(a):2)
+unsigned short f2 (unsigned short &a);
+#pragma omp declare simd linear(ref(a):1)
+int f3 (long long int &a);
+#pragma omp declare simd linear(a:1)
+int f4 (int &a);
+#pragma omp declare simd linear(val(a))
+int f5 (int a);
+#pragma omp declare simd linear(uval(a):2)		// { dg-error "modifier applied to non-reference variable" }
+int f6 (unsigned short a);
+#pragma omp declare simd linear(ref(a):1)		// { dg-error "modifier applied to non-reference variable" }
+int f7 (unsigned long int a);
+#pragma omp declare simd linear(a:1)
+int f8 (int a);
+#pragma omp declare simd linear(val(a):2)		// { dg-error "applied to non-integral non-pointer variable" }
+int f9 (S &a);
+#pragma omp declare simd linear(uval(a):2)		// { dg-error "applied to non-integral non-pointer variable" }
+int f10 (S &a);
+#pragma omp declare simd linear(ref(a):1)		// { dg-bogus "applied to non-integral non-pointer variable" }
+int f11 (S &a);
+#pragma omp declare simd linear(a:1)			// { dg-error "applied to non-integral non-pointer variable" }
+int f12 (S &a);
+#pragma omp declare simd linear(val(a))			// { dg-error "applied to non-integral non-pointer variable" }
+int f13 (S a);
+#pragma omp declare simd linear(uval(a):2)		// { dg-error "modifier applied to non-reference variable" }
+int f14 (S a);
+#pragma omp declare simd linear(ref(a):1)		// { dg-error "modifier applied to non-reference variable" }
+int f15 (S a);
+#pragma omp declare simd linear(a:1)			// { dg-error "applied to non-integral non-pointer variable" }
+int f16 (S a);
diff --git a/gcc/testsuite/g++.dg/gomp/pr71941.C b/gcc/testsuite/g++.dg/gomp/pr71941.C
new file mode 100644
index 00000000000..ffa53d03e60
--- /dev/null
+++ b/gcc/testsuite/g++.dg/gomp/pr71941.C
@@ -0,0 +1,22 @@
+// PR c++/71941
+// { dg-do compile }
+// { dg-options "-fopenmp" }
+
+struct A { A (); A (A &); ~A (); };
+
+template <int N>
+struct B
+{
+  struct C { A a; C () : a () {} };
+  C c;
+  void foo ();
+};
+
+void
+bar ()
+{
+  B<0> b;
+#pragma omp task
+  for (int i = 0; i < 2; i++)
+    b.foo ();
+}
diff --git a/gcc/testsuite/g++.dg/init/elide5.C b/gcc/testsuite/g++.dg/init/elide5.C
new file mode 100644
index 00000000000..e52d55fae68
--- /dev/null
+++ b/gcc/testsuite/g++.dg/init/elide5.C
@@ -0,0 +1,26 @@
+// PR c++/71913
+// { dg-do link { target c++11 } }
+
+void* operator new(decltype(sizeof(1)), void* p) { return p; }
+
+struct IndirectReturn {
+  IndirectReturn() {}
+  // Undefined so we get a link error if the indirect return value is copied
+  IndirectReturn(const IndirectReturn&);
+  IndirectReturn& operator=(const IndirectReturn&) = delete;
+  ~IndirectReturn() {}
+};
+
+IndirectReturn foo() { return IndirectReturn(); }
+
+void bar(void* ptr) {
+  new (ptr) IndirectReturn(foo());
+}
+
+alignas (alignof (IndirectReturn))
+unsigned char c[sizeof(IndirectReturn)];
+
+int main()
+{
+  bar(c);
+}
diff --git a/gcc/testsuite/g++.dg/init/pr71516.C b/gcc/testsuite/g++.dg/init/pr71516.C
new file mode 100644
index 00000000000..0b9aec41707
--- /dev/null
+++ b/gcc/testsuite/g++.dg/init/pr71516.C
@@ -0,0 +1,10 @@
+// PR c++/71516
+// { dg-do compile }
+
+struct A;	// { dg-message "forward declaration of" }
+struct B
+{ 
+  static A a;
+};
+A B::a = A();	// { dg-error "has initializer but incomplete type|invalid use of incomplete type" }
+struct A {};
diff --git a/gcc/testsuite/g++.dg/ipa/ipa-pta-2.C b/gcc/testsuite/g++.dg/ipa/ipa-pta-2.C
new file mode 100644
index 00000000000..fd7c7939ff9
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ipa/ipa-pta-2.C
@@ -0,0 +1,37 @@
+// { dg-do run }
+// { dg-options "-O2 -fipa-pta" }
+
+extern "C" void abort (void);
+
+struct Y { ~Y(); int i; };
+
+Y::~Y () {}
+
+static Y __attribute__((noinline)) foo ()
+{
+  Y res;
+  res.i = 3;
+  return res;
+}
+
+static Y __attribute__((noinline)) bar ()
+{
+  Y res;
+  res.i = 42;
+  return res;
+}
+
+static Y (*fn) ();
+
+int a;
+int main()
+{
+  if (a)
+    fn = foo;
+  else
+    fn = bar;
+  Y res = fn ();
+  if (res.i != 42)
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/lookup/scoped10.C b/gcc/testsuite/g++.dg/lookup/scoped10.C
new file mode 100644
index 00000000000..c604297c6db
--- /dev/null
+++ b/gcc/testsuite/g++.dg/lookup/scoped10.C
@@ -0,0 +1,5 @@
+namespace A { }
+namespace N { struct A; }
+using namespace N;
+
+struct ::A *p;
diff --git a/gcc/testsuite/g++.dg/lookup/scoped9.C b/gcc/testsuite/g++.dg/lookup/scoped9.C
new file mode 100644
index 00000000000..06f09028b0a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/lookup/scoped9.C
@@ -0,0 +1,10 @@
+// PR c++/71173
+
+namespace foo {
+  namespace bar {
+    class foo {};
+  }
+  class baz {};
+}
+using namespace foo::bar;
+::foo::baz mybaz;
diff --git a/gcc/testsuite/g++.dg/opt/pr70847.C b/gcc/testsuite/g++.dg/opt/pr70847.C
new file mode 100644
index 00000000000..2b5435317cb
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr70847.C
@@ -0,0 +1,11 @@
+// PR c++/70847
+// { dg-do compile }
+
+struct D { virtual D& f(); };
+
+void
+g()
+{
+  D d;
+  d.f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f();
+}
diff --git a/gcc/testsuite/g++.dg/opt/pr71100.C b/gcc/testsuite/g++.dg/opt/pr71100.C
new file mode 100644
index 00000000000..ff739e2e62a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr71100.C
@@ -0,0 +1,18 @@
+// PR c++/71100
+// { dg-do compile }
+// { dg-options "-O2" }
+
+struct D { ~D (); };
+struct E { D foo () { throw 1; } };
+
+inline void
+bar (D (E::*f) (), E *o)
+{
+  (o->*f) ();
+}
+
+void
+baz (E *o)
+{
+  bar (&E::foo, o);
+}
diff --git a/gcc/testsuite/g++.dg/opt/pr71210-1.C b/gcc/testsuite/g++.dg/opt/pr71210-1.C
new file mode 100644
index 00000000000..03b1fb55c50
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr71210-1.C
@@ -0,0 +1,14 @@
+// PR c++/71210
+// { dg-do compile }
+// { dg-options "-O2" }
+
+#include <typeinfo>
+
+void f1 (const std::type_info&) __attribute__((noreturn));
+struct S1 { ~S1 (); };
+struct S2
+{
+  virtual S1 f2 () const { f1 (typeid (*this)); }
+  S1 f3 () const { return f2 (); }
+};
+void f4 () { S2 a; a.f3 (); }
diff --git a/gcc/testsuite/g++.dg/opt/pr71210-2.C b/gcc/testsuite/g++.dg/opt/pr71210-2.C
new file mode 100644
index 00000000000..02a31bd5fe8
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr71210-2.C
@@ -0,0 +1,23 @@
+// PR c++/71210
+// { dg-do compile }
+// { dg-options "-O2" }
+
+struct C { int a; int b; C (); ~C (); };
+
+namespace
+{
+  struct A
+  {
+    A () {}
+    virtual C bar (int) = 0;
+    C baz (int x) { return bar (x); }
+  };
+}
+
+A *a;
+
+void
+foo ()
+{
+  C c = a->baz (0);
+}
diff --git a/gcc/testsuite/g++.dg/opt/pr71387.C b/gcc/testsuite/g++.dg/opt/pr71387.C
new file mode 100644
index 00000000000..56f4a4d38b4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr71387.C
@@ -0,0 +1,52 @@
+// PR middle-end/71387
+// { dg-do compile }
+// { dg-options "-Og" }
+
+struct A
+{
+  A ();
+  inline A (const A &);
+};
+
+struct B
+{
+  explicit B (unsigned long) : b(0), c(1) {}
+  A a;
+  unsigned long b;
+  int c;
+};
+
+struct C {};
+
+struct D
+{
+  explicit D (const C *) {}
+};
+
+struct E : public D
+{
+  E (const C *x) : D(x) {}
+  virtual A foo () const = 0;
+  virtual A bar () const = 0;
+};
+
+struct F : public B
+{
+  inline void baz ();
+  F (const E *);
+  const E *f;
+};
+
+inline void
+F::baz ()
+{
+  if (b == 0)
+    a = f->bar ();
+  else
+    a = f->foo ();
+}
+
+F::F (const E *) : B(4)
+{
+  baz ();
+}
diff --git a/gcc/testsuite/g++.dg/opt/pr71528.C b/gcc/testsuite/g++.dg/opt/pr71528.C
new file mode 100644
index 00000000000..bfe06220472
--- /dev/null
+++ b/gcc/testsuite/g++.dg/opt/pr71528.C
@@ -0,0 +1,23 @@
+// PR c++/71528
+// { dg-do run }
+// { dg-options "-O2" }
+
+extern int &x;
+int y;
+
+int &
+foo ()
+{
+  return y;
+}
+
+int &x = foo ();
+
+int
+main ()
+{
+  if (&x != &y)
+    __builtin_abort ();
+}
+
+extern int &x;
diff --git a/gcc/testsuite/g++.dg/other/i386-10.C b/gcc/testsuite/g++.dg/other/i386-10.C
new file mode 100644
index 00000000000..96def72f8f0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/other/i386-10.C
@@ -0,0 +1,12 @@
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-options -maes }
+
+typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
+
+int main()
+{
+    const char index = 1;
+    __m128i r = { };
+
+    r = __builtin_ia32_aeskeygenassist128 (r, (int)(index));
+}
diff --git a/gcc/testsuite/g++.dg/other/pr71728.C b/gcc/testsuite/g++.dg/other/pr71728.C
new file mode 100644
index 00000000000..b70e3c2f457
--- /dev/null
+++ b/gcc/testsuite/g++.dg/other/pr71728.C
@@ -0,0 +1,11 @@
+// PR c++/71728
+// { dg-do compile }
+// { dg-options "-std=gnu++14 -Wall" }
+
+int
+foo ()
+{
+  if (({ goto test; test: 1; }) != 1)
+    return 1;
+  return 2;
+}
diff --git a/gcc/testsuite/g++.dg/parse/pr71909.C b/gcc/testsuite/g++.dg/parse/pr71909.C
new file mode 100644
index 00000000000..ee592bf8e2b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/parse/pr71909.C
@@ -0,0 +1,22 @@
+// PR c++/71909
+// { dg-do compile }
+
+struct S
+{
+  S () try : m (0) {}
+  catch (...) {}
+  void foo () try {}
+  catch (int) {}
+  catch (...) {}
+  int m;
+};
+
+struct T
+{
+  T () : m (0) {}
+  catch (...) {}	// { dg-error "expected unqualified-id before" }
+  void foo () {}
+  catch (int) {}	// { dg-error "expected unqualified-id before" }
+  catch (...) {}	// { dg-error "expected unqualified-id before" }
+  int m;
+};
diff --git a/gcc/testsuite/g++.dg/pr71184.C b/gcc/testsuite/g++.dg/pr71184.C
new file mode 100644
index 00000000000..452303e47a1
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr71184.C
@@ -0,0 +1 @@
+operator new[ // { dg-error "expected type-specifier before 'new'" }
diff --git a/gcc/testsuite/g++.dg/pr71389.C b/gcc/testsuite/g++.dg/pr71389.C
new file mode 100644
index 00000000000..023abe1755c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr71389.C
@@ -0,0 +1,23 @@
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+// { dg-options "-std=c++11 -O3 -march=ivybridge" }
+
+#include <functional>
+
+extern int le_s6, le_s9, le_s11;
+long foo_v14[16][16];
+
+void fn1() {
+  std::array<std::array<int, 16>, 16> v13;
+  for (; le_s6;)
+    for (int k1 = 2; k1 < 4; k1 = k1 + 1) {
+      for (int n1 = 0; n1 < le_s9; n1 = 8) {
+        *foo_v14[6] = 20923310;
+        for (int i2 = n1; i2 < n1 + 8; i2 = i2 + 1)
+          v13.at(5).at(i2 + 6 - n1) = 306146921;
+      }
+
+      for (int l2 = 0; l2 < le_s11; l2 = l2 + 1)
+          *(l2 + v13.at(5).begin()) = 306146921;
+    }
+  v13.at(le_s6 - 4);
+}
diff --git a/gcc/testsuite/g++.dg/pr71624.C b/gcc/testsuite/g++.dg/pr71624.C
new file mode 100644
index 00000000000..94a75cd4c41
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr71624.C
@@ -0,0 +1,35 @@
+/* PR71624 */
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+/* { dg-options "-fcheck-pointer-bounds -mmpx -O2" } */
+
+class c1
+{
+public:
+  virtual int fn1 () const;
+  int fn2 (const int *) const;
+};
+
+class c2
+{
+  int fn1 ();
+  c1 obj;
+};
+
+int
+c1::fn1 () const
+{
+  return 0;
+}
+
+int
+c1::fn2 (const int *) const
+{
+  return this->fn1 ();
+}
+
+int
+c2::fn1 ()
+{
+  return obj.fn2 (0);
+}
+
diff --git a/gcc/testsuite/g++.dg/template/defarg21.C b/gcc/testsuite/g++.dg/template/defarg21.C
new file mode 100644
index 00000000000..6ac227665ef
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/defarg21.C
@@ -0,0 +1,21 @@
+// PR c++/71822
+// { dg-do compile }
+
+int bar (int);
+
+template <typename T>
+struct A
+{
+  explicit A (int x = bar (sizeof (T)));
+};
+
+struct B
+{
+  A <int> b[2];
+};
+
+void
+baz ()
+{
+  B b;
+}
diff --git a/gcc/testsuite/g++.dg/template/dtor10.C b/gcc/testsuite/g++.dg/template/dtor10.C
new file mode 100644
index 00000000000..0b21e307f12
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/dtor10.C
@@ -0,0 +1,23 @@
+// PR c++/71748
+
+struct A
+{
+  virtual ~A () {}
+};
+
+struct B : public A
+{
+  virtual ~B () {}
+};
+
+template < int > void foo ()
+{
+  B *b = new B;
+  b->~A ();
+}
+
+int main ()
+{
+  foo < 0 > ();
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/template/friend62.C b/gcc/testsuite/g++.dg/template/friend62.C
new file mode 100644
index 00000000000..c9796c49205
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/friend62.C
@@ -0,0 +1,16 @@
+// PR c++/71227
+// { dg-options "" }
+
+class A {
+  public:
+    template<typename T>
+      friend int f(int x, T v) { // { dg-message "declaration" }
+        return x + v;
+      }
+};
+
+
+template<>
+int f(int x, int v) {		// { dg-warning "friend" }
+  return x + v;
+}
diff --git a/gcc/testsuite/g++.dg/template/friend63.C b/gcc/testsuite/g++.dg/template/friend63.C
new file mode 100644
index 00000000000..f3a292c3fd3
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/friend63.C
@@ -0,0 +1,29 @@
+// PR c++/71738
+
+template < class > struct S
+{
+  template < class > struct A
+  { 
+    template < class > struct B
+    {
+      template <class Z>
+      void operator=(Z) { S::i = 0; }
+    };
+  };
+
+  // Note that this friend declaration is useless, since nested classes are
+  // already friends of their enclosing class.
+  template < class X >
+  template < class Y >
+  template < class Z >
+  friend void A < X >::B < Y >::operator= (Z);
+
+private:
+  static int i;
+};
+
+int main()
+{
+  S<int>::A<int>::B<int> b;
+  b = 0;
+}
diff --git a/gcc/testsuite/g++.dg/template/pr70466-1.C b/gcc/testsuite/g++.dg/template/pr70466-1.C
new file mode 100644
index 00000000000..7eb83eab957
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/pr70466-1.C
@@ -0,0 +1,27 @@
+// PR c++/70466
+
+template < class T, class T >  // { dg-error "conflicting" }
+class A
+{
+public:
+  explicit A (T (S::*f) ()) {}  // { dg-error "expected" }
+};
+
+template < class T, class S > 
+A < T, S > foo (T (S::*f) ())
+{
+  return A < T, S > (f);
+}
+
+class B
+{
+public:
+  void bar () {}
+};
+
+int
+main ()
+{
+  foo (&B::bar);
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/template/pr70466-2.C b/gcc/testsuite/g++.dg/template/pr70466-2.C
new file mode 100644
index 00000000000..7a7458a61f1
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/pr70466-2.C
@@ -0,0 +1,25 @@
+// PR c++/70466
+
+template < class T, class S >
+struct A
+{
+  explicit A (...) {}
+};
+
+template < class T, class S >
+A < T, S > foo (T (S::*f) ())
+{
+  return A < T, S > (f);
+}
+
+struct B
+{
+  void bar () {}
+};
+
+int
+main ()
+{
+  foo (&B::bar);
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/template/ttp29.C b/gcc/testsuite/g++.dg/template/ttp29.C
new file mode 100644
index 00000000000..7d4e03ab20b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/template/ttp29.C
@@ -0,0 +1,21 @@
+// PR c++/70778
+
+template <class KeyType>
+struct Stuff
+{
+  template <KeyType, class>
+  struct AddToFront;
+
+  template <KeyType ToAdd, template<KeyType> class Holder, KeyType Indexs>
+  struct AddToFront<ToAdd, Holder<Indexs> >
+  {
+  };
+};
+
+template <unsigned>
+struct Holder {};
+
+int main()
+{
+  Stuff<unsigned>::AddToFront<0, Holder<24> > t;
+}
diff --git a/gcc/testsuite/g++.dg/tm/pr71909.C b/gcc/testsuite/g++.dg/tm/pr71909.C
new file mode 100644
index 00000000000..941f2315170
--- /dev/null
+++ b/gcc/testsuite/g++.dg/tm/pr71909.C
@@ -0,0 +1,18 @@
+// PR c++/71909
+// { dg-do compile { target c++11 } }
+// { dg-options "-fgnu-tm" }
+
+struct S
+{
+  S () __transaction_atomic [[outer]] try : m {0} {} catch (int) {} catch (...) {}
+  int m;
+};
+
+struct T
+{
+  T () __transaction_atomic __attribute__((outer)) try : m {0} {} catch (int) {} catch (...) {}
+  int m;
+};
+
+void foo () __transaction_atomic [[outer]] try {} catch (int) {} catch (...) {}
+void bar () __transaction_atomic __attribute__((outer)) try {} catch (int) {} catch (...) {}
diff --git a/gcc/testsuite/g++.dg/torture/pr71002.C b/gcc/testsuite/g++.dg/torture/pr71002.C
new file mode 100644
index 00000000000..8a726809217
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71002.C
@@ -0,0 +1,160 @@
+// { dg-do run }
+
+using size_t = __SIZE_TYPE__;
+
+inline void* operator new(size_t, void* p) noexcept
+{ return p; }
+
+inline void operator delete(void*, void*)
+{ }
+
+struct long_t
+{
+  size_t is_short : 1;
+  size_t length   : (__SIZEOF_SIZE_T__ * __CHAR_BIT__ - 1);
+  size_t capacity;
+  char* pointer;
+};
+
+union long_raw_t {
+  unsigned char data[sizeof(long_t)];
+  struct __attribute__((aligned(alignof(long_t)))) { } align;
+};
+
+struct short_header
+{
+  unsigned char is_short : 1;
+  unsigned char length   : (__CHAR_BIT__ - 1);
+};
+
+struct short_t
+{
+  short_header h;
+  char data[23];
+};
+
+union repr_t
+{
+  long_raw_t  r;
+  short_t     s;
+
+  const short_t& short_repr() const
+  { return s; }
+
+  const long_t& long_repr() const
+  { return *static_cast<const long_t*>(static_cast<const void*>(&r)); }
+
+  short_t& short_repr()
+  { return s;  }
+
+  long_t& long_repr()
+  { return *static_cast<long_t*>(static_cast<void*>(&r)); }
+};
+
+class string
+{
+public:
+  string()
+  {
+    short_t& s = m_repr.short_repr();
+    s.h.is_short = 1;
+    s.h.length = 0;
+    s.data[0] = '\0';
+  }
+
+  string(const char* str)
+  {
+    size_t length = __builtin_strlen(str);
+    if (length + 1 > 23) {
+      long_t& l = m_repr.long_repr();
+      l.is_short = 0;
+      l.length = length;
+      l.capacity = length + 1;
+      l.pointer = new char[l.capacity];
+      __builtin_memcpy(l.pointer, str, length + 1);
+    } else {
+      short_t& s = m_repr.short_repr();
+      s.h.is_short = 1;
+      s.h.length = length;
+      __builtin_memcpy(s.data, str, length + 1);
+    }
+  }
+
+  string(string&& other)
+    : string{}
+  {
+    swap_data(other);
+  }
+
+  ~string()
+  {
+    if (!is_short()) {
+      delete[] m_repr.long_repr().pointer;
+    }
+  }
+
+  size_t length() const
+  { return is_short() ? short_length() : long_length(); }
+
+private:
+  bool is_short() const
+  { return m_repr.s.h.is_short != 0; }
+
+  size_t short_length() const
+  { return m_repr.short_repr().h.length; }
+
+  size_t long_length() const
+  { return m_repr.long_repr().length; }
+
+  void swap_data(string& other)
+  {
+    if (is_short()) {
+      if (other.is_short()) {
+        repr_t tmp(m_repr);
+        m_repr = other.m_repr;
+        other.m_repr = tmp;
+      } else {
+        short_t short_backup(m_repr.short_repr());
+        m_repr.short_repr().~short_t();
+        ::new(&m_repr.long_repr()) long_t(other.m_repr.long_repr());
+        other.m_repr.long_repr().~long_t();
+        ::new(&other.m_repr.short_repr()) short_t(short_backup);
+      }
+    } else {
+      if (other.is_short()) {
+        short_t short_backup(other.m_repr.short_repr());
+        other.m_repr.short_repr().~short_t();
+        ::new(&other.m_repr.long_repr()) long_t(m_repr.long_repr());
+        m_repr.long_repr().~long_t();
+        ::new(&m_repr.short_repr()) short_t(short_backup);
+      } else {
+        long_t tmp(m_repr.long_repr());
+        m_repr.long_repr() = other.m_repr.long_repr();
+        other.m_repr.long_repr() = tmp;
+      }
+    }
+  }
+
+  repr_t m_repr;
+};
+
+struct foo
+{
+  __attribute__((noinline))
+  foo(string str)
+    : m_str{static_cast<string&&>(str)},
+      m_len{m_str.length()}
+  { }
+
+  string m_str;
+  size_t m_len;
+};
+
+int main()
+{
+  foo f{"the quick brown fox jumps over the lazy dog"};
+  if (f.m_len == 0) {
+    __builtin_abort();
+  }
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/torture/pr71405.C b/gcc/testsuite/g++.dg/torture/pr71405.C
new file mode 100644
index 00000000000..52602437a08
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71405.C
@@ -0,0 +1,22 @@
+// PR tree-optimization/71405
+// { dg-do compile }
+
+struct C
+{
+  C () {}
+  int i;
+};
+
+void *
+operator new (__SIZE_TYPE__ x, void *y)
+{
+  return y;
+}
+
+int
+main ()
+{
+  int a;
+  new (&a) C;
+  return a; 
+}
diff --git a/gcc/testsuite/g++.dg/torture/pr71448.C b/gcc/testsuite/g++.dg/torture/pr71448.C
new file mode 100644
index 00000000000..ca00ca83b36
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71448.C
@@ -0,0 +1,27 @@
+// PR c++/71448
+// { dg-do compile }
+// { dg-additional-options "-std=c++11" }
+
+static constexpr const char foo[] = "foo";
+static constexpr const char *bar = "bar";
+
+static_assert ((foo + 3 - foo) == 3, "check");
+static_assert (foo + 2 != foo, "check");
+static_assert (foo + 2 >= foo, "check");
+static_assert (3 + foo >= foo, "check");
+static_assert (foo <= foo + 2, "check");
+static_assert (foo <= 3 + foo, "check");
+static_assert (foo + 2 > foo, "check");
+static_assert (3 + foo > foo, "check");
+static_assert (foo < 2 + foo, "check");
+static_assert (foo < foo + 3, "check");
+static_assert ((bar + 3 - bar) == 3, "check");
+static_assert (bar + 2 != bar, "check");
+static_assert (2 + bar >= bar, "check");
+static_assert (bar + 3 >= bar, "check");
+static_assert (bar <= bar + 2, "check");
+static_assert (bar <= 3 + bar, "check");
+static_assert (bar + 2 > bar, "check");
+static_assert (3 + bar > bar, "check");
+static_assert (bar < 2 + bar, "check");
+static_assert (bar < bar + 3, "check");
diff --git a/gcc/testsuite/g++.dg/torture/pr71452.C b/gcc/testsuite/g++.dg/torture/pr71452.C
new file mode 100644
index 00000000000..3ebe3a176f3
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71452.C
@@ -0,0 +1,10 @@
+// { dg-do run }
+
+int main()
+{
+  bool b;
+  *(char *)&b = 123;
+  if (*(char *)&b != 123)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/torture/pr71874.C b/gcc/testsuite/g++.dg/torture/pr71874.C
new file mode 100644
index 00000000000..d9b4e2f8849
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr71874.C
@@ -0,0 +1,12 @@
+// PR middle-end/71874
+// { dg-do run }
+
+int
+main ()
+{
+  char str[] = "abcdefghijklmnopqrstuvwxyzABCDEF";
+  __builtin_memmove (str + 20, str + 15, 11);
+  if (__builtin_strcmp (str, "abcdefghijklmnopqrstpqrstuvwxyzF") != 0)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/ubsan/pr70847.C b/gcc/testsuite/g++.dg/ubsan/pr70847.C
new file mode 100644
index 00000000000..2b5435317cb
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ubsan/pr70847.C
@@ -0,0 +1,11 @@
+// PR c++/70847
+// { dg-do compile }
+
+struct D { virtual D& f(); };
+
+void
+g()
+{
+  D d;
+  d.f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f().f();
+}
diff --git a/gcc/testsuite/g++.dg/ubsan/pr71393.C b/gcc/testsuite/g++.dg/ubsan/pr71393.C
new file mode 100644
index 00000000000..6011e3a8de0
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ubsan/pr71393.C
@@ -0,0 +1,14 @@
+// PR c++/71393
+// { dg-do compile }
+// { dg-options "-fsanitize=undefined" }
+
+struct B { B &operator << (long); };
+struct A { A (); long a, b, c, d, e, f; };
+
+A::A ()
+{
+  B q;
+  q << 0 << a << 0 << b << 0 << (b / a) << 0 << c << 0 << (c / a) << 0
+    << d << 0 << (d / a) << 0 << e << 0 << (e / a) << 0 << f << 0
+    << (f / a) << 0;
+}
diff --git a/gcc/testsuite/g++.dg/ubsan/pr71512.C b/gcc/testsuite/g++.dg/ubsan/pr71512.C
new file mode 100644
index 00000000000..9822c989a1c
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ubsan/pr71512.C
@@ -0,0 +1,20 @@
+/* PR c/71512 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftrapv -fnon-call-exceptions -fsanitize=undefined" } */
+
+bool
+foo (int *x, int *y, int *z)
+{
+  try
+    {
+      x[0] = y[0] + z[0];
+      x[1] = y[1] - z[1];
+      x[2] = y[2] * z[2];
+      x[3] = -y[3];
+    }
+  catch (...)
+    {
+      return true;
+    }
+  return false;
+}
diff --git a/gcc/testsuite/g++.dg/vect/simd-clone-6.cc b/gcc/testsuite/g++.dg/vect/simd-clone-6.cc
new file mode 100644
index 00000000000..fb00e8816a5
--- /dev/null
+++ b/gcc/testsuite/g++.dg/vect/simd-clone-6.cc
@@ -0,0 +1,43 @@
+// PR c++/71257
+// { dg-require-effective-target vect_simd_clones }
+// { dg-additional-options "-fopenmp-simd -fno-inline" }
+// { dg-additional-options "-mavx" { target avx_runtime } }
+
+#include "../../gcc.dg/vect/tree-vect.h"
+
+#define N 1024
+struct S { int a; };
+int c[N], e[N], f[N];
+S d[N];
+
+#pragma omp declare simd linear(ref(b, c) : 1)
+int
+foo (int a, S &b, int &c)
+{
+  return a + b.a + c;
+}
+
+void
+do_main ()
+{
+  int i;
+  for (i = 0; i < N; i++)
+    {
+      c[i] = i;
+      d[i].a = 2 * i;
+      f[i] = 3 * i;
+    }
+  #pragma omp simd
+  for (i = 0; i < N; i++)
+    e[i] = foo (c[i], d[i], f[i]);
+  for (i = 0; i < N; i++)
+    if (e[i] != 6 * i)
+      __builtin_abort ();
+}
+
+int
+main ()
+{
+  check_vect ();
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/warn/Wno-narrowing1.C b/gcc/testsuite/g++.dg/warn/Wno-narrowing1.C
new file mode 100644
index 00000000000..285f05a1249
--- /dev/null
+++ b/gcc/testsuite/g++.dg/warn/Wno-narrowing1.C
@@ -0,0 +1,7 @@
+// PR c++/69872
+// { dg-options "-Wall -Wextra -pedantic -Wno-narrowing" }
+
+struct s { int x, y; };
+short offsets[1] = {
+  ((char*) &(((struct s*)16)->y) - (char *)16),  // { dg-bogus "note" }
+};
diff --git a/gcc/testsuite/g++.dg/warn/Wplacement-new-size-3.C b/gcc/testsuite/g++.dg/warn/Wplacement-new-size-3.C
new file mode 100644
index 00000000000..c93e4e698a7
--- /dev/null
+++ b/gcc/testsuite/g++.dg/warn/Wplacement-new-size-3.C
@@ -0,0 +1,40 @@
+// PR c++/71306 - bogus -Wplacement-new with an array element
+// { dg-do compile }
+// { dg-options "-Wplacement-new" }
+
+void* operator new (__SIZE_TYPE__, void *p) { return p; }
+
+struct S64 { char c [64]; };
+
+S64 s2 [2];
+S64* ps2 [2];
+S64* ps2_2 [2][2];
+
+void* pv2 [2];
+
+void f ()
+{
+  char a [2][sizeof (S64)];
+
+  new (a) S64;
+  new (a [0]) S64;
+  new (a [1]) S64;
+
+  // Verify there is no warning with buffers of sufficient size.
+  new (&s2 [0]) S64;
+  new (&s2 [1]) S64;
+
+  // ..and no warning with pointers to buffers of unknown size.
+  new (ps2 [0]) S64;
+  new (ps2 [1]) S64;
+
+  // But a warning when using the ps2_2 array itself as opposed
+  // to the pointers it's elements might point to.
+  new (ps2_2 [0]) S64;	// { dg-warning "placement new" }
+  new (ps2_2 [1]) S64;	// { dg-warning "placement new" }
+
+  // ..and no warning again with pointers to buffers of unknown
+  // size.
+  new (pv2 [0]) S64;
+  new (pv2 [1]) S64;
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr70916.c b/gcc/testsuite/gcc.c-torture/compile/pr70916.c
new file mode 100644
index 00000000000..c3ea69fba9b
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr70916.c
@@ -0,0 +1,28 @@
+/* PR tree-optimization/70916 */
+
+int a, b, c, d, i, k;
+int static *e = &b, *j;
+int **f;
+int static ***g = &f;
+int *h;
+void
+fn1 ()
+{
+  for (;;)
+    {
+      int l[1] = { };
+      int m = (__UINTPTR_TYPE__) l;
+      for (; d; d--)
+	{
+	  int ****n;
+	  int *****o = &n;
+	  i = a & 7 ? : a;
+	  *e = (((*o = &g) != (int ****) g) < h[c], 0) || k;
+	  if (*e)
+	    {
+	      **n = &j;
+	      *e = (__UINTPTR_TYPE__) h;
+	    }
+	}
+    }
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr71295.c b/gcc/testsuite/gcc.c-torture/compile/pr71295.c
new file mode 100644
index 00000000000..d2ec852fd08
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr71295.c
@@ -0,0 +1,12 @@
+extern void fn2 (long long);
+int a;
+
+void
+fn1 ()
+{
+  long long b[3];
+  a = 0;
+  for (; a < 3; a++)
+    b[a] = 1;
+  fn2 (b[1]);
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr71693.c b/gcc/testsuite/gcc.c-torture/compile/pr71693.c
new file mode 100644
index 00000000000..fc9249c922c
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr71693.c
@@ -0,0 +1,10 @@
+/* PR middle-end/71693 */
+
+unsigned short v;
+
+void
+foo (int x)
+{
+  v = ((((unsigned short) (0x0001 | (x & 0x0070) | 0x0100) & 0x00ffU) << 8)
+       | (((unsigned short) (0x0001 | (x & 0x0070) | 0x0100) >> 8) & 0x00ffU));
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr71916.c b/gcc/testsuite/gcc.c-torture/compile/pr71916.c
new file mode 100644
index 00000000000..95bc5b71f30
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr71916.c
@@ -0,0 +1,36 @@
+/* PR rtl-optimization/71916 */
+
+int a, b, c, d, f, g;
+short h;
+
+short
+foo (short p1)
+{
+  return a >= 2 || p1 > 7 >> a ? p1 : p1 << a;
+}
+
+void
+bar (void)
+{
+  for (;;)
+    {
+      int i, j[3];
+      h = b >= 2 ? d : d >> b;
+      if (foo (f > h ^ c))
+	{
+	  d = 0;
+	  while (f <= 2)
+	    {
+	      char k[2];
+	      for (;;)
+		k[i++] = 7;
+	    }
+	}
+      else
+	for (;;)
+	  g = j[2];
+      if (g)
+	for (;;)
+	  ;
+    }
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr72802.c b/gcc/testsuite/gcc.c-torture/compile/pr72802.c
new file mode 100644
index 00000000000..b9e1ab31580
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr72802.c
@@ -0,0 +1,211 @@
+static a[];
+static b, h, m, n, o, p, q, t, u, v, t5, t6, t16, t17, t18, t25;
+c;
+static volatile d;
+static volatile e;
+static volatile f;
+static volatile g;
+j;
+static volatile k;
+static volatile l;
+static volatile r;
+const volatile s;
+static volatile w;
+static volatile x;
+const volatile y;
+static volatile z;
+static volatile t1;
+static volatile t2;
+const t3;
+t4;
+const volatile t8;
+const volatile t9;
+const volatile t10;
+static volatile t11;
+static volatile t12;
+static volatile t13;
+static volatile t14;
+const volatile t15;
+static volatile t19;
+static volatile t20;
+const volatile t21;
+static volatile t22;
+static volatile t23;
+const volatile t24;
+*t29;
+fn1() { b = 5; }
+fn2(long);
+#pragma pack(1)
+struct S0 {
+  short f3;
+  float f4;
+  signed f5
+};
+const struct S0 t7[] = {};
+static fn3() {
+  int t26[] = {};
+  int t27[10] = {};
+  --t25;
+  if (fn4()) {
+    t5++;
+    fn5();
+    int t28[] = {t26, t27};
+    return;
+  }
+}
+fn6() {
+  int i, t30 = 0;
+  if (fn6 == 2)
+    t30 = 1;
+  {
+    int t31, i = 0;
+    for (; i < 256; i++) {
+      t31 = i;
+      if (i & 1)
+        t31 = 0;
+      a[i] = t31;
+    }
+    i = 0;
+    for (; i < 3; i++)
+      t29[i] = t6;
+    fn7();
+    fn3();
+    t4 = c = j = 0;
+  }
+  fn2(h);
+  if (t30)
+    printf(b);
+  g;
+  fn2(g);
+  printf(b);
+  f;
+  fn2(f);
+  if (t30)
+    printf(b);
+  e;
+  fn2(e);
+  printf(b);
+  fn8();
+  d;
+  fn2(d);
+  if (t30)
+    printf(b);
+  l;
+  fn2(l);
+  printf(b);
+  k;
+  fn2(k);
+  if (t30)
+    printf(b);
+  printf(b);
+  for (; i; i++) {
+    y;
+    fn2(y);
+    printf(b);
+    x;
+    fn2(x);
+    if (t30)
+      printf(b);
+    w;
+    fn2(w);
+    printf(b);
+    fn2(v);
+    printf(b);
+    fn2(u);
+    if (t30)
+      printf(b);
+    fn2(t);
+    printf(b);
+    s;
+    fn2(s);
+    if (t30)
+      printf(b);
+    r;
+    fn2(r);
+    printf(b);
+    fn2(q);
+    if (t30)
+      printf(b);
+    fn2(p);
+    printf("", b);
+    fn2(o);
+    printf(b);
+    fn2(n);
+    if (t30)
+      printf(b);
+    fn2(m);
+    printf(b);
+  }
+  fn2(z);
+  if (t30)
+    printf(b);
+  printf("", t3);
+  t2;
+  fn2(t2);
+  printf(b);
+  t1;
+  fn2(t1);
+  if (t30)
+    printf(b);
+  for (; i < 6; i++) {
+    t10;
+    fn2(t10);
+    printf(b);
+    t9;
+    fn2(t9);
+    if (t30)
+      printf(b);
+    t8;
+    fn2(t8);
+    printf(b);
+    fn2(t7[i].f3);
+    if (t30)
+      printf(b);
+    fn2(t7[i].f4);
+    printf(b);
+    fn2(t7[i].f5);
+    if (t30)
+      printf(b);
+    t15;
+    fn2(t15);
+    printf(b);
+    t14;
+    fn2(t14);
+    if (t30)
+      printf(b);
+    t13;
+    fn2(t13);
+    printf(b);
+    t12;
+    fn2(t12);
+    if (t30)
+      printf(b);
+    t11;
+    fn2(t11);
+    printf(b);
+    t21;
+    fn2(t21);
+    if (t30)
+      printf(b);
+    t20;
+    fn2(t20);
+    fn2(t19);
+    if (t30)
+      printf(b);
+    fn2(t18);
+    printf(b);
+    fn2(t17);
+    printf(b);
+    fn2(t16);
+    printf(b);
+  }
+  t24;
+  t24;
+  if (t30)
+    printf(b);
+  printf(t23);
+  t22;
+  t22;
+  if (t30)
+    printf(b);
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c b/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c
new file mode 100644
index 00000000000..0622d01d21b
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824-2.c
@@ -0,0 +1,21 @@
+/* PR tree-optimization/72824 */
+
+typedef float V __attribute__((vector_size (4 * sizeof (float))));
+
+static inline void
+foo (V *x, V value)
+{
+  int i;
+  for (i = 0; i < 32; ++i)
+    x[i] = value;
+}
+
+int
+main ()
+{
+  V x[32];
+  foo (x, (V) { 0.f, -0.f, 0.f, -0.f });
+  if (__builtin_copysignf (1.0, x[3][1]) != -1.0f)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c b/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c
new file mode 100644
index 00000000000..1c213733ca1
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/ieee/pr72824.c
@@ -0,0 +1,19 @@
+/* PR tree-optimization/72824 */
+
+static inline void
+foo (float *x, float value)
+{
+  int i;
+  for (i = 0; i < 32; ++i)
+    x[i] = value;
+}
+
+int
+main ()
+{
+  float x[32];
+  foo (x, -0.f);
+  if (__builtin_copysignf (1.0, x[3]) != -1.0f)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr37780.c b/gcc/testsuite/gcc.c-torture/execute/pr37780.c
new file mode 100644
index 00000000000..a9eca68786e
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr37780.c
@@ -0,0 +1,49 @@
+/* PR middle-end/37780.  */
+
+#define VAL (8 * sizeof (int))
+
+int __attribute__ ((noinline, noclone))
+fooctz (int i)
+{
+  return (i == 0) ? VAL : __builtin_ctz (i);
+}
+
+int __attribute__ ((noinline, noclone))
+fooctz2 (int i)
+{
+  return (i != 0) ? __builtin_ctz (i) : VAL;
+}
+
+unsigned int __attribute__ ((noinline, noclone))
+fooctz3 (unsigned int i)
+{
+  return (i > 0) ?  __builtin_ctz (i) : VAL;
+}
+
+int __attribute__ ((noinline, noclone))
+fooclz (int i)
+{
+  return (i == 0) ? VAL : __builtin_clz (i);
+}
+
+int __attribute__ ((noinline, noclone))
+fooclz2 (int i)
+{
+  return (i != 0) ? __builtin_clz (i) : VAL;
+}
+
+unsigned int __attribute__ ((noinline, noclone))
+fooclz3 (unsigned int i)
+{
+  return (i > 0) ? __builtin_clz (i) : VAL;
+}
+
+int
+main (void)
+{
+  if (fooctz (0) != VAL || fooctz2 (0) != VAL || fooctz3 (0) != VAL
+      || fooclz (0) != VAL || fooclz2 (0) != VAL || fooclz3 (0) != VAL)
+    __builtin_abort ();
+
+  return 0;
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr66940.c b/gcc/testsuite/gcc.c-torture/execute/pr66940.c
new file mode 100644
index 00000000000..fbd109dccc7
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr66940.c
@@ -0,0 +1,20 @@
+long long __attribute__ ((noinline, noclone))
+foo (long long ival)
+{
+ if (ival <= 0)
+    return -0x7fffffffffffffffL - 1;
+
+ return 0x7fffffffffffffffL;
+}
+
+int
+main (void)
+{
+  if (foo (-1) != (-0x7fffffffffffffffL - 1))
+    __builtin_abort ();
+
+  if (foo (1) != 0x7fffffffffffffffL)
+    __builtin_abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71083.c b/gcc/testsuite/gcc.c-torture/execute/pr71083.c
new file mode 100644
index 00000000000..05744349333
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71083.c
@@ -0,0 +1,43 @@
+struct lock_chain {
+  unsigned int irq_context: 2,
+    depth: 6,
+    base: 24;
+};
+
+__attribute__((noinline, noclone))
+struct lock_chain * foo (struct lock_chain *chain)
+{
+  int i;
+  for (i = 0; i < 100; i++)
+    {
+      chain[i+1].base = chain[i].base;
+    }
+  return chain;
+}
+
+struct lock_chain1 {
+  char x;
+  unsigned short base;
+} __attribute__((packed));
+
+__attribute__((noinline, noclone))
+struct lock_chain1 * bar (struct lock_chain1 *chain)
+{
+  int i;
+  for (i = 0; i < 100; i++)
+    {
+      chain[i+1].base = chain[i].base;
+    }
+  return chain;
+}
+
+struct lock_chain test [101];
+struct lock_chain1 test1 [101];
+
+int
+main ()
+{
+  foo (test);
+  bar (test1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71494.c b/gcc/testsuite/gcc.c-torture/execute/pr71494.c
new file mode 100644
index 00000000000..f962f2c2e21
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71494.c
@@ -0,0 +1,22 @@
+/* PR middle-end/71494 */
+
+int
+main ()
+{
+  void *label = &&out;
+  int i = 0;
+  void test (void)
+  {
+    label = &&out2;
+    goto *label;
+   out2:;
+    i++;
+  }
+  goto *label;
+ out:
+  i += 2;
+  test ();
+  if (i != 3)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71554.c b/gcc/testsuite/gcc.c-torture/execute/pr71554.c
new file mode 100644
index 00000000000..f0cb4bb0778
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71554.c
@@ -0,0 +1,28 @@
+/* PR target/71554 */
+
+int v;
+
+__attribute__ ((noinline, noclone)) void
+bar (void)
+{
+  v++;
+}
+
+__attribute__ ((noinline, noclone))
+void
+foo (unsigned int x)
+{
+  signed int y = ((-__INT_MAX__ - 1) / 2);
+  signed int r;
+  if (__builtin_mul_overflow (x, y, &r))
+    bar ();
+}
+
+int
+main ()
+{
+  foo (2);
+  if (v)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c b/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c
new file mode 100644
index 00000000000..26cfa9650e0
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c
@@ -0,0 +1,19 @@
+/* PR middle-end/71626 */
+
+typedef __INTPTR_TYPE__ V __attribute__((__vector_size__(sizeof (__INTPTR_TYPE__))));
+
+__attribute__((noinline, noclone)) V
+foo ()
+{
+  V v = { (__INTPTR_TYPE__) foo };
+  return v;
+}
+
+int
+main ()
+{
+  V v = foo ();
+  if (v[0] != (__INTPTR_TYPE__) foo)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c b/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c
new file mode 100644
index 00000000000..4a27c54fbf3
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c
@@ -0,0 +1,4 @@
+/* PR middle-end/71626 */
+/* { dg-additional-options "-fpic" { target fpic } } */
+
+#include "pr71626-1.c"
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71700.c b/gcc/testsuite/gcc.c-torture/execute/pr71700.c
new file mode 100644
index 00000000000..80afd3809c3
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71700.c
@@ -0,0 +1,19 @@
+struct S
+{
+  signed f0 : 16;
+  unsigned f1 : 1;
+};
+
+int b;
+static struct S c[] = {{-1, 0}, {-1, 0}};
+struct S d;
+
+int
+main ()
+{
+  struct S e = c[0];
+  d = e;
+  if (d.f1 != 0)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/align-3.c b/gcc/testsuite/gcc.dg/align-3.c
new file mode 100644
index 00000000000..5c97d5ac3cc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/align-3.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-expand" } */
+
+typedef struct { char a[2]; } __attribute__((__packed__)) TU2;
+unsigned short get16_unaligned(const void *p) {
+    unsigned short v;
+    *(TU2 *)(void *)(&v) = *(const TU2 *)p;
+    return v;
+}
+
+/* { dg-final { scan-rtl-dump "MEM\[^\n\r\]*A8\\\]" "expand" } } */
diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c b/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
new file mode 100644
index 00000000000..4fd8b74f329
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/debug/dwarf2/pr71855.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -g -dA" } */
+
+// Test that there is only one DW_TAG_unspecified_parameters DIE.
+
+void
+foo (const char *format, ...)
+{
+}
+
+// { dg-final { scan-assembler-times "DIE.*DW_TAG_unspecified_parameters" 1 } }
diff --git a/gcc/testsuite/gcc.dg/goacc/nested-function-1.c b/gcc/testsuite/gcc.dg/goacc/nested-function-1.c
new file mode 100644
index 00000000000..e17c0e2227f
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/goacc/nested-function-1.c
@@ -0,0 +1,100 @@
+/* Exercise nested function decomposition, gcc/tree-nested.c.  */
+/* See gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 for the Fortran
+   version.  */
+
+int main ()
+{
+#define N 100
+  int nonlocal_arg;
+  int nonlocal_a[N];
+  int nonlocal_i;
+  int nonlocal_j;
+
+  for (int i = 0; i < N; ++i)
+    nonlocal_a[i] = 5;
+  nonlocal_arg = 5;
+
+  void local ()
+  {
+    int local_i;
+    int local_arg;
+    int local_a[N];
+    int local_j;
+
+    for (int i = 0; i < N; ++i)
+      local_a[i] = 5;
+    local_arg = 5;
+
+#pragma acc kernels loop \
+  gang(num:local_arg) worker(local_arg) vector(local_arg) \
+  wait async(local_arg)
+    for (local_i = 0; local_i < N; ++local_i)
+      {
+#pragma acc cache (local_a[local_i:5])
+	local_a[local_i] = 100;
+#pragma acc loop seq tile(*)
+	for (local_j = 0; local_j < N; ++local_j)
+	  ;
+#pragma acc loop auto independent tile(1)
+	for (local_j = 0; local_j < N; ++local_j)
+	  ;
+      }
+
+#pragma acc kernels loop \
+  gang(static:local_arg) worker(local_arg) vector(local_arg) \
+  wait(local_arg, local_arg + 1, local_arg + 2) async
+    for (local_i = 0; local_i < N; ++local_i)
+      {
+#pragma acc cache (local_a[local_i:4])
+	local_a[local_i] = 100;
+#pragma acc loop seq tile(1)
+	for (local_j = 0; local_j < N; ++local_j)
+	  ;
+#pragma acc loop auto independent tile(*)
+	for (local_j = 0; local_j < N; ++local_j)
+	  ;
+      }
+  }
+
+  void nonlocal ()
+  {
+    for (int i = 0; i < N; ++i)
+      nonlocal_a[i] = 5;
+    nonlocal_arg = 5;
+
+#pragma acc kernels loop \
+  gang(num:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) \
+  wait async(nonlocal_arg)
+    for (nonlocal_i = 0; nonlocal_i < N; ++nonlocal_i)
+      {
+#pragma acc cache (nonlocal_a[nonlocal_i:3])
+	nonlocal_a[nonlocal_i] = 100;
+#pragma acc loop seq tile(2)
+	for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
+	  ;
+#pragma acc loop auto independent tile(3)
+	for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
+	  ;
+      }
+
+#pragma acc kernels loop \
+  gang(static:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) \
+  wait(nonlocal_arg, nonlocal_arg + 1, nonlocal_arg + 2) async
+    for (nonlocal_i = 0; nonlocal_i < N; ++nonlocal_i)
+      {
+#pragma acc cache (nonlocal_a[nonlocal_i:2])
+	nonlocal_a[nonlocal_i] = 100;
+#pragma acc loop seq tile(*)
+	for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
+	  ;
+#pragma acc loop auto independent tile(*)
+	for (nonlocal_j = 0; nonlocal_j < N; ++nonlocal_j)
+	  ;
+      }
+  }
+
+  local ();
+  nonlocal ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/goacc/nested-function-2.c b/gcc/testsuite/gcc.dg/goacc/nested-function-2.c
new file mode 100644
index 00000000000..70c9ec8ebfa
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/goacc/nested-function-2.c
@@ -0,0 +1,45 @@
+/* Exercise nested function decomposition, gcc/tree-nested.c.  */
+
+int
+main (void)
+{
+  int j = 0, k = 6, l = 7, m = 8;
+  void simple (void)
+  {
+    int i;
+#pragma acc parallel
+    {
+#pragma acc loop
+      for (i = 0; i < m; i+= k)
+	j = (m + i - j) * l;
+    }
+  }
+  void collapse (void)
+  {
+    int x, y, z;
+#pragma acc parallel
+    {
+#pragma acc loop collapse (3)
+      for (x = 0; x < k; x++)
+	for (y = -5; y < l; y++)
+	  for (z = 0; z < m; z++)
+	    j += x + y + z;
+    }
+  }
+  void reduction (void)
+  {
+    int x, y, z;
+#pragma acc parallel reduction (+:j)
+    {
+#pragma acc loop reduction (+:j) collapse (3)
+      for (x = 0; x < k; x++)
+	for (y = -5; y < l; y++)
+	  for (z = 0; z < m; z++)
+	    j += x + y + z;
+    }
+  }
+  simple();
+  collapse();
+  reduction();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/goacc/pr71373.c b/gcc/testsuite/gcc.dg/goacc/pr71373.c
new file mode 100644
index 00000000000..9381752cc9d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/goacc/pr71373.c
@@ -0,0 +1,41 @@
+/* Unintentional nested function usage.  */
+/* Due to missing right braces '}', the following functions are parsed as
+   nested functions.  This ran into an ICE.  */
+
+void foo (void)
+{
+  #pragma acc parallel
+  {
+    #pragma acc loop independent
+    for (int i = 0; i < 16; i++)
+      ;
+  // Note right brace '}' commented out here.
+  //}
+}
+void bar (void)
+{
+}
+
+// Adding right brace '}' here, to make this compile.
+}
+
+
+// ..., and the other way round:
+
+void BAR (void)
+{
+// Note right brace '}' commented out here.
+//}
+
+void FOO (void)
+{
+  #pragma acc parallel
+  {
+    #pragma acc loop independent
+    for (int i = 0; i < 16; i++)
+      ;
+  }
+}
+
+// Adding right brace '}' here, to make this compile.
+}
diff --git a/gcc/testsuite/gcc.dg/graphite/pr69067.c b/gcc/testsuite/gcc.dg/graphite/pr69067.c
new file mode 100644
index 00000000000..145ac822907
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/graphite/pr69067.c
@@ -0,0 +1,28 @@
+/* { dg-do link } */
+/* { dg-options " -O1 -floop-nest-optimize" } */
+/* { dg-additional-options "-flto" { target lto } } */
+
+int a1, c1, cr, kt;
+int aa[2];
+
+int
+ce (void)
+{
+  while (a1 < 1)
+    {
+      int g8;
+      for (g8 = 0; g8 < 3; ++g8)
+	if (c1 != 0)
+	  cr = aa[a1 * 2] = kt;
+      for (c1 = 0; c1 < 2; ++c1)
+	aa[c1] = cr;
+      ++a1;
+    }
+  return 0;
+}
+
+int
+main (void)
+{
+  return ce ();
+}
diff --git a/gcc/testsuite/gcc.dg/graphite/pr69068.c b/gcc/testsuite/gcc.dg/graphite/pr69068.c
new file mode 100644
index 00000000000..0abea060025
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/graphite/pr69068.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fgraphite-identity" } */
+
+int qo;
+int zh[2];
+
+void
+td (void)
+{
+  int ly, en;
+  for (ly = 0; ly < 2; ++ly)
+    for (en = 0; en < 2; ++en)
+      zh[en] = ((qo == 0) || (((qo * 2) != 0))) ? 1 : -1;
+}
diff --git a/gcc/testsuite/gcc.dg/guality/param-5.c b/gcc/testsuite/gcc.dg/guality/param-5.c
new file mode 100644
index 00000000000..8ca82ea68e5
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/guality/param-5.c
@@ -0,0 +1,38 @@
+/* { dg-do run } */
+/* { dg-options "-g" } */
+/* { dg-skip-if "" { *-*-* }  { "*" } { "-O0" } } */
+
+typedef __UINTPTR_TYPE__ uintptr_t;
+
+typedef struct { uintptr_t pa; uintptr_t pb; } fatp_t
+  __attribute__ ((aligned (2 * __alignof__ (uintptr_t))));
+
+__attribute__((noinline, noclone)) void
+clear_stack (void)
+{
+  char a[128 * 1024 + 128];
+
+  __builtin_memset (a + 128 * 1024, 0, 128);
+}
+
+__attribute__((noinline, noclone)) void
+foo (fatp_t str, int count)
+{
+  char a[128 * 1024];
+
+  if (count > 0)
+    foo (str, count - 1);
+  clear_stack ();
+  count--;  /* BREAK */
+}
+
+int
+main (void)
+{
+  fatp_t ptr = { 31415927, 27182818 };
+  foo (ptr, 1);
+  return 0;
+}
+
+/* { dg-final { gdb-test 26 "str.pa" "31415927" } } */
+/* { dg-final { gdb-test 26 "str.pb" "27182818" } } */
diff --git a/gcc/testsuite/gcc.dg/ipa/pr70646.c b/gcc/testsuite/gcc.dg/ipa/pr70646.c
new file mode 100644
index 00000000000..f85816e7303
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ipa/pr70646.c
@@ -0,0 +1,40 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#pragma GCC optimize("no-unit-at-a-time")
+
+typedef unsigned char u8;
+typedef unsigned long long u64;
+
+static inline __attribute__((always_inline)) u64 __swab64p(const u64 *p)
+{
+ return (__builtin_constant_p((u64)(*p)) ? ((u64)( (((u64)(*p) & (u64)0x00000000000000ffULL) << 56) | (((u64)(*p) & (u64)0x000000000000ff00ULL) << 40) | (((u64)(*p) & (u64)0x0000000000ff0000ULL) << 24) | (((u64)(*p) & (u64)0x00000000ff000000ULL) << 8) | (((u64)(*p) & (u64)0x000000ff00000000ULL) >> 8) | (((u64)(*p) & (u64)0x0000ff0000000000ULL) >> 24) | (((u64)(*p) & (u64)0x00ff000000000000ULL) >> 40) | (((u64)(*p) & (u64)0xff00000000000000ULL) >> 56))) : __builtin_bswap64(*p));
+}
+
+static inline u64 wwn_to_u64(void *wwn)
+{
+ return __swab64p(wwn);
+}
+
+void __attribute__((noinline,noclone)) broken(u64* shost)
+{
+ u8 node_name[8] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
+ *shost = wwn_to_u64(node_name);
+}
+
+void __attribute__((noinline,noclone)) dummy(void)
+{
+ __builtin_abort();
+}
+
+int main(int argc, char* argv[])
+{
+ u64 v;
+
+ broken(&v);
+
+ if(v != (u64)-1)
+  __builtin_abort();
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/ipa/pr71981.c b/gcc/testsuite/gcc.dg/ipa/pr71981.c
new file mode 100644
index 00000000000..1b2160246e8
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/ipa/pr71981.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -w" } */
+
+int **a;
+static void fn1(char **p1) {
+  char s = *p1, b = &s;
+  while (*fn2()[a])
+    ;
+}
+int main() { fn1(""); return 0; }
diff --git a/gcc/testsuite/gcc.dg/pr59833.c b/gcc/testsuite/gcc.dg/pr59833.c
new file mode 100644
index 00000000000..e0e4ed5c5cc
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr59833.c
@@ -0,0 +1,18 @@
+/* { dg-do run { target { *-*-linux* *-*-gnu* } } } */
+/* { dg-options "-O0 -lm" } */
+/* { dg-require-effective-target issignaling } */
+
+#define _GNU_SOURCE
+#include <math.h>
+
+int main (void)
+{
+  float sNaN = __builtin_nansf ("");
+  double x = (double) sNaN;
+  if (issignaling(x))
+  {
+    __builtin_abort();
+  }
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/pr67410.c b/gcc/testsuite/gcc.dg/pr67410.c
new file mode 100644
index 00000000000..ff3c4f16867
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr67410.c
@@ -0,0 +1,15 @@
+/* PR c/67410 */
+/* { dg-do run } */
+/* { dg-options "-std=gnu11" } */
+
+struct {
+  __CHAR16_TYPE__ s[2];
+} a[] = { u"ff", [0].s[0] = u'x', [1] = u"\u1234\u4567", [1].s[0] = u'\u89ab' };
+
+int
+main ()
+{
+  if (a[0].s[0] != u'x' || a[0].s[1] != u'f' || a[1].s[0] != u'\u89ab' || a[1].s[1] != u'\u4567')
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/pr68217.c b/gcc/testsuite/gcc.dg/pr68217.c
new file mode 100644
index 00000000000..426a99a6b61
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr68217.c
@@ -0,0 +1,14 @@
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1" } */
+
+int foo (void)
+{
+    volatile int a = -1;
+    long long b = (1LL << (sizeof (b) * 8 - 1)); // LLONG_MIN
+    long long x = (a & b); // x == 0x8000000000000000
+    if (x < 1LL) { ; } else { __builtin_abort(); }
+    return 0;
+}
+
+/* { dg-final { scan-tree-dump "\\\[-INF, 0\\\]" "vrp1" } } */
diff --git a/gcc/testsuite/gcc.dg/pr71006.c b/gcc/testsuite/gcc.dg/pr71006.c
new file mode 100644
index 00000000000..2b45aa01c7e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71006.c
@@ -0,0 +1,16 @@
+/* PR target/71006 */
+/* { dg-do compile } */
+/* { dg-options "-O1 -ftree-vectorize" } */
+
+unsigned char uu, gu, e2;
+
+void
+fs (void)
+{
+  char *nq = (char *)&gu, *k4 = (char *)&gu;
+  while (*k4 < 1)
+    {
+      uu += (*nq != 0 || e2 != 0);
+      ++*k4;
+    }
+}
diff --git a/gcc/testsuite/gcc.dg/pr71071.c b/gcc/testsuite/gcc.dg/pr71071.c
new file mode 100644
index 00000000000..582f1f15a43
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71071.c
@@ -0,0 +1,12 @@
+/* PR bootstrap/71071 */
+/* { dg-do compile } *
+/* { dg-options "-O2" } */
+
+struct S { unsigned b : 1; } a;
+
+void
+foo ()
+{
+  if (a.b)
+    ;
+}
diff --git a/gcc/testsuite/gcc.dg/pr71279.c b/gcc/testsuite/gcc.dg/pr71279.c
new file mode 100644
index 00000000000..4ecc84b6425
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71279.c
@@ -0,0 +1,14 @@
+/* PR middle-end/71279 */
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+/* { dg-additional-options "-march=knl" { target { i?86-*-* x86_64-*-* } } } */
+
+extern int a, b;
+long c[1][1][1];
+long d[1][1];
+
+void fn1 ()
+{
+  for (int e = 0; e < b; e = e + 1)
+    *(e + **c) = (a && *d[1]) - 1;
+}
diff --git a/gcc/testsuite/gcc.dg/pr71518.c b/gcc/testsuite/gcc.dg/pr71518.c
new file mode 100644
index 00000000000..6240ca8f2bf
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71518.c
@@ -0,0 +1,25 @@
+/* PR tree-optimization/71518 */
+/* { dg-options "-O3" } */
+
+int a, *b[9], c, d, e; 
+
+static int
+fn1 ()
+{
+  for (c = 6; c >= 0; c--)
+    for (d = 0; d < 2; d++)
+      {
+        b[d * 2 + c] = 0;
+        e = a > 1 ? : 0;
+        if (e == 2) 
+          return 0;
+      }
+  return 0;
+}
+
+int
+main ()
+{
+  fn1 ();
+  return 0; 
+}
diff --git a/gcc/testsuite/gcc.dg/pr71558.c b/gcc/testsuite/gcc.dg/pr71558.c
new file mode 100644
index 00000000000..33a648e108c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71558.c
@@ -0,0 +1,17 @@
+/* PR tree-optimization/71588 */
+
+/* strcpy must not be pure, but make sure we don't ICE even when
+   it is declared incorrectly.  */
+char *strcpy (char *, const char *) __attribute__ ((__pure__));
+__SIZE_TYPE__ strlen (const char *);
+void *malloc (__SIZE_TYPE__);
+
+char a[20];
+
+char *
+foo (void)
+{
+  __SIZE_TYPE__ b = strlen (a);
+  char *c = malloc (b);
+  return strcpy (c, a);
+}
diff --git a/gcc/testsuite/gcc.dg/pr71581.c b/gcc/testsuite/gcc.dg/pr71581.c
new file mode 100644
index 00000000000..d82eb1ed5c9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71581.c
@@ -0,0 +1,24 @@
+/* PR middle-end/71581 */
+/* { dg-do compile } */
+/* { dg-options "-Wuninitialized" } */
+
+_Complex float
+f1 (void)
+{
+  float x;
+  return x;	/* { dg-warning "is used uninitialized in this function" } */
+}
+
+_Complex double
+f2 (void)
+{
+  double x;
+  return x;	/* { dg-warning "is used uninitialized in this function" } */
+}
+
+_Complex int
+f3 (void)
+{
+  int x;
+  return x;	/* { dg-warning "is used uninitialized in this function" } */
+}
diff --git a/gcc/testsuite/gcc.dg/pr71685.c b/gcc/testsuite/gcc.dg/pr71685.c
new file mode 100644
index 00000000000..80e5c8f5902
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71685.c
@@ -0,0 +1,6 @@
+/* PR c/71685 */
+/* { dg-do compile } */
+/* { dg-options "-std=gnu11" } */
+
+extern struct S v, s;
+struct S { int t; int p[]; } v = { 4, 0 };
diff --git a/gcc/testsuite/gcc.dg/pr72816.c b/gcc/testsuite/gcc.dg/pr72816.c
new file mode 100644
index 00000000000..b1498c7a703
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr72816.c
@@ -0,0 +1,9 @@
+/* PR c/72816 */
+/* { dg-do compile } */
+/* { dg-options "-std=gnu11" } */
+
+typedef const int A[];
+struct S {
+  int a;
+  A b;
+};
diff --git a/gcc/testsuite/gcc.dg/spellcheck-options-12.c b/gcc/testsuite/gcc.dg/spellcheck-options-12.c
new file mode 100644
index 00000000000..b5e65e54a39
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/spellcheck-options-12.c
@@ -0,0 +1,7 @@
+/* Verify that we don't include -Wno- variants for options marked
+   with RejectNegative when considering hints for misspelled options
+   (PR driver/71651).  */
+
+/* { dg-do compile } */
+/* { dg-options "-fno-stack-protector-explicit" } */
+/* { dg-error "unrecognized command line option .-fno-stack-protector-explicit.; did you mean .-fstack-protector-explicit.." "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.dg/torture/pr70935.c b/gcc/testsuite/gcc.dg/torture/pr70935.c
new file mode 100644
index 00000000000..eb7f034ce83
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr70935.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -g" } */
+
+int d0, sj, v0, rp, zi;
+
+void
+zn(void)
+{
+  if (v0 != 0)
+    {
+      int *js, *r3;
+      int pm, gc;
+
+      for (gc = 0; gc < 1; ++gc)
+        {
+          sj = 1;
+          while (sj != 0)
+            ;
+        }
+      r3 = &pm;
+      *js = (long)&gc;
+ka:
+      for (d0 = 0; d0 < 2; ++d0)
+        {
+          d0 = zi;
+          if (zi)
+            for (pm = 2; pm != 0; --pm)
+              ;
+        }
+      while (*r3 != 0)
+        {
+          while (pm)
+            ;
+          ++r3;
+        }
+    }
+  rp = 0;
+  goto ka;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr70941.c b/gcc/testsuite/gcc.dg/torture/pr70941.c
new file mode 100644
index 00000000000..eb37a1fb293
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr70941.c
@@ -0,0 +1,12 @@
+/* { dg-do run } */
+/* { dg-require-effective-target int32plus } */
+
+signed char a = 0, b = 0, c = 0, d = 0;
+
+int main()
+{
+  a = -(b - 405418259) - ((d && c) ^ 2040097152);
+  if (a != (signed char) -1634678893)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71423.c b/gcc/testsuite/gcc.dg/torture/pr71423.c
new file mode 100644
index 00000000000..06a613f11fe
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71423.c
@@ -0,0 +1,20 @@
+/* { dg-do run } */
+
+struct S1
+{
+  int f1:1;
+};
+
+volatile struct S1 b = { 0 };
+
+int
+main ()
+{
+  char c = b.f1;
+  b.f1 = 1; 
+
+  if (b.f1 > -1 || c)
+    __builtin_abort (); 
+
+  return 0; 
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71452.c b/gcc/testsuite/gcc.dg/torture/pr71452.c
new file mode 100644
index 00000000000..8948d39fdaf
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71452.c
@@ -0,0 +1,10 @@
+/* { dg-do run } */
+
+int main()
+{
+  _Bool b;
+  *(char *)&b = 123;
+  if (*(char *)&b != 123)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71522.c b/gcc/testsuite/gcc.dg/torture/pr71522.c
new file mode 100644
index 00000000000..953c4c71100
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71522.c
@@ -0,0 +1,27 @@
+/* { dg-do run } */
+
+#if __SIZEOF_LONG_DOUBLE__ == 16
+#define STR "AAAAAAAAAAAAAAA"
+#elif __SIZEOF_LONG_DOUBLE__ == 12
+#define STR "AAAAAAAAAAA"
+#elif __SIZEOF_LONG_DOUBLE__ == 8
+#define STR "AAAAAAA"
+#elif __SIZEOF_LONG_DOUBLE__ == 4
+#define STR "AAA"
+#else
+#define STR "A"
+#endif
+
+int main()
+{
+  long double d;
+  char s[sizeof d];
+
+  __builtin_memcpy(&d, STR, sizeof d);
+  __builtin_memcpy(&s, &d, sizeof s);
+
+  if (__builtin_strncmp (s, STR, sizeof s) != 0)
+    __builtin_abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71594.c b/gcc/testsuite/gcc.dg/torture/pr71594.c
new file mode 100644
index 00000000000..468a9f6891c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71594.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "--param max-rtl-if-conversion-insns=2" } */
+
+unsigned short a;
+int b, c;
+int *d;
+void fn1() {
+  *d = 24;
+  for (; *d <= 65;) {
+    unsigned short *e = &a;
+    b = (a &= 0 <= 0) < (c ?: (*e %= *d));
+    for (; *d <= 83;)
+      ;
+  }
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71606.c b/gcc/testsuite/gcc.dg/torture/pr71606.c
new file mode 100644
index 00000000000..b0cc26ac771
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71606.c
@@ -0,0 +1,11 @@
+_Complex a;
+void fn1 ();
+
+int main () {
+  fn1 (a);
+  return 0;
+}
+
+void fn1 (__complex__ long double p1) {
+  __imag__ p1 = 6.0L;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71881.c b/gcc/testsuite/gcc.dg/torture/pr71881.c
new file mode 100644
index 00000000000..b17db1b21c1
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71881.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-g" } */
+
+int a, b, c, d, *e, f, g;
+
+int fn1 ()
+{
+  char h[2];
+  int i = 0;
+  for (; i < 2; i++)
+    {
+      if (c)
+	for (*e = 0; *e;)
+	  {
+	    int j[f];
+	    i = *e;
+	  }
+      h[i] = 0;
+    }
+  for (; a;)
+    return h[0];
+  for (b = 0; b;)
+    i = g = (1 & i) < d;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr73434.c b/gcc/testsuite/gcc.dg/torture/pr73434.c
new file mode 100644
index 00000000000..624e0c6ccfb
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr73434.c
@@ -0,0 +1,19 @@
+/* { dg-do run } */
+
+typedef struct { unsigned char x; } A;
+typedef struct { unsigned char x; } B;
+
+int idx = 0;
+
+A objs[1] = {{0}};
+
+int main()
+{
+  B *b = (B*)&objs[idx];
+  b->x++;
+  if (b->x)
+    b->x = 0;
+  if (b->x)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr61839_1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_1.c
new file mode 100644
index 00000000000..9f8168a81f2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_1.c
@@ -0,0 +1,44 @@
+/* PR tree-optimization/61839.  */
+/* { dg-do run } */
+/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-optimized" } */
+/* { dg-require-effective-target int32plus } */
+
+__attribute__ ((noinline))
+int foo ()
+{
+  int a = -1;
+  volatile unsigned b = 1U;
+  int c = 1;
+  c = (a + 972195718) >> (1LU <= b);
+  if (c == 486097858)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+__attribute__ ((noinline))
+int bar ()
+{
+  int a = -1;
+  volatile unsigned b = 1U;
+  int c = 1;
+  c = (a + 972195718) >> (b ? 2 : 3);
+  if (c == 243048929)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+int main ()
+{
+  foo ();
+  bar ();
+}
+
+/* Scan for c = 972195717) >> [0, 1] in function foo.  */
+/* { dg-final { scan-tree-dump-times "486097858 : 972195717" 1  "vrp1" } } */
+/* Scan for c = 972195717) >> [2, 3] in function bar.  */
+/* { dg-final { scan-tree-dump-times "243048929 : 121524464" 2  "vrp1" } } */
+/* { dg-final { scan-tree-dump-times "486097858" 0  "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr61839_2.c b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_2.c
new file mode 100644
index 00000000000..ffa00a7e674
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_2.c
@@ -0,0 +1,54 @@
+/* PR tree-optimization/61839.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1" } */
+/* { dg-require-effective-target int32plus } */
+
+__attribute__ ((noinline))
+int foo ()
+{
+  int a = -1;
+  volatile unsigned b = 1U;
+  int c = 1;
+  c = (a + 972195718) / (b ? 1 : 0);
+  if (c == 972195717)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+__attribute__ ((noinline))
+int bar ()
+{
+  int a = -1;
+  volatile unsigned b = 1U;
+  int c = 1;
+  c = (a + 972195718) % (b ? 1 : 0);
+  if (c == 972195717)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+__attribute__ ((noinline))
+int bar2 ()
+{
+  int a = -1;
+  volatile unsigned b = 1U;
+  int c = 1;
+  c = (a + 972195716) % (b ? 1 : 2);
+  if (c == 972195715)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+
+/* Dont optimize 972195717 / 0 in function foo.  */
+/* { dg-final { scan-tree-dump-times "972195717 / _" 1  "vrp1" } } */
+/* Dont optimize 972195717 % 0 in function bar.  */
+/* { dg-final { scan-tree-dump-times "972195717 % _" 1 "vrp1" } } */
+/* Optimize in function bar2.  */
+/* { dg-final { scan-tree-dump-times "972195715 % _" 0 "vrp1" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr61839_3.c b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_3.c
new file mode 100644
index 00000000000..5ceb0738bde
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_3.c
@@ -0,0 +1,26 @@
+/* PR tree-optimization/61839.  */
+/* { dg-do run } */
+/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-optimized" } */
+
+__attribute__ ((noinline))
+int foo (int a, unsigned b)
+{
+  int c = 1;
+  b =  a ? 12 : 13;
+  c = b << 8;
+  if (c == 3072)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+int main ()
+{
+  volatile unsigned b = 1U;
+  foo (-1, b);
+}
+
+/* Scan for c [12, 13] << 8 in function foo.  */
+/* { dg-final { scan-tree-dump-times "3072 : 3328" 2  "vrp1" } } */
+/* { dg-final { scan-tree-dump-times "3072" 0  "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr61839_4.c b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_4.c
new file mode 100644
index 00000000000..5c026c89c7d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr61839_4.c
@@ -0,0 +1,28 @@
+/* PR tree-optimization/61839.  */
+/* { dg-do run } */
+/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-optimized" } */
+/* { dg-require-effective-target int32plus } */
+
+__attribute__ ((noinline))
+int foo (int a, unsigned b)
+{
+  unsigned c = 1;
+  if (b >= 1 && b <= ((unsigned)(-1) - 1))
+    return 0;
+  c = b >> 4;
+  if (c == 268435455)
+    ;
+  else
+    __builtin_abort ();
+  return 0;
+}
+
+int main ()
+{
+  volatile unsigned b = (unsigned)(-1);
+  foo (-1, b);
+}
+
+/* Scan for ~[1, 4294967294] >> 4 in function foo.  */
+/* { dg-final { scan-tree-dump-times "0 : 268435455" 1  "vrp1" } } */
+/* { dg-final { scan-tree-dump-times "268435455" 0  "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr70919.c b/gcc/testsuite/gcc.dg/tree-ssa/pr70919.c
new file mode 100644
index 00000000000..bed0ab37a20
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr70919.c
@@ -0,0 +1,46 @@
+/* { dg-do run } */
+/* { dg-options "-O" } */
+
+#pragma pack(1)
+struct S0
+{
+  int f0:24;
+};
+
+struct S1
+{
+  int f1;
+} a;
+
+int b, c;
+
+char
+fn1 (struct S1 p1)
+{
+  return 0;
+}
+
+int
+main ()
+{
+  c = fn1 (a);
+  if (b)
+    {
+      struct S0 f[3][9] =
+	{ { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } },
+	  { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } },
+	  { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } }
+	};
+      b = f[1][8].f0;
+    }
+  struct S0 g[3][9] =
+	{ { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } },
+	  { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } },
+	  { { 0 }, { 0 }, { 1 }, { 1 }, { 0 }, { 0 }, { 0 }, { 1 }, { 1 } }
+	};
+
+  if (g[1][8].f0 != 1)
+    __builtin_abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-11.c b/gcc/testsuite/gcc.dg/tree-ssa/scev-11.c
new file mode 100644
index 00000000000..a7181b2208b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-11.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
+
+int a[128];
+extern int b[];
+
+int bar (int *);
+
+int
+foo (int n)
+{
+  int i;
+
+  for (i = 0; i < n; i++)
+    {
+      unsigned char uc = (unsigned char)i;
+      a[i] = i;
+      b[uc] = 0;
+    }
+
+  bar (a);
+  return 0;
+}
+
+/* Address of array reference to b is scev.  */
+/* { dg-final { scan-tree-dump-times "use \[0-9\]\n  address" 2 "ivopts" } } */
+
+
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-12.c b/gcc/testsuite/gcc.dg/tree-ssa/scev-12.c
new file mode 100644
index 00000000000..6915ba8b31d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-12.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
+
+int a[128];
+extern int b[];
+
+int bar (int *);
+
+int
+foo (int x, int n)
+{
+  int i;
+
+  for (i = 0; i < n; i++)
+    {
+      unsigned char uc = (unsigned char)i;
+      if (x)
+	a[i] = i;
+      b[uc] = 0;
+    }
+
+  bar (a);
+  return 0;
+}
+
+/* Address of array reference to b is not scev.  */
+/* { dg-final { scan-tree-dump-times "use \[0-9\]\n  address" 1 "ivopts" } } */
+
+
+
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp100.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp100.c
new file mode 100644
index 00000000000..c0fe4b50963
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp100.c
@@ -0,0 +1,32 @@
+/* PR tree-optimization/71031 */
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+
+int zj;
+int **yr;
+
+void
+nn (void)
+{
+  unsigned int od = 4;
+
+  for (;;)
+    {
+      int lk;
+
+      for (lk = 0; lk < 2; ++lk)
+        {
+          static int cm;
+
+          zj = 0;
+          if (od == 0)
+            return;
+          ++od;
+          for (cm = 0; cm < 2; ++cm)
+            {
+              --od;
+              **yr = 0;
+            }
+        }
+    }
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c
new file mode 100644
index 00000000000..cfca5396e63
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+
+int x = 1;
+
+int main ()
+{
+  int t = (1/(1>=x))>>1;
+  if (t != 0) __builtin_abort();
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump "<bb 2>:\[\n\r \]*return 0;" "optimized" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-70.c b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-70.c
new file mode 100644
index 00000000000..7010a52b58d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-70.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target section_anchors } */
+/* { dg-require-effective-target vect_int } */
+
+#define N 32
+
+/* Increase alignment of struct if an array's offset is multiple of alignment of
+   vector type corresponding to it's scalar type.
+   For the below test-case:
+   offsetof(e) == 8 bytes. 
+   i) For arm: let x = alignment of vector type corresponding to int,
+   x == 8 bytes.
+   Since offsetof(e) % x == 0, set DECL_ALIGN(a, b, c) to x.
+   ii) For aarch64, ppc: x == 16 bytes.
+   Since offsetof(e) % x != 0, don't increase alignment of a, b, c.
+*/
+
+static struct A {
+  int p1, p2;
+  int e[N];
+} a, b, c;
+
+int foo(void)
+{
+  for (int i = 0; i < N; i++)
+    a.e[i] = b.e[i] + c.e[i];
+
+   return a.e[0];
+}
+
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target aarch64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target powerpc64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 3 "increase_alignment" { target arm*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-71.c b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-71.c
new file mode 100644
index 00000000000..7cbd1dcf304
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-71.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target section_anchors } */
+/* { dg-require-effective-target vect_int } */
+
+/* Should not increase alignment of the struct because
+   sizeof (A.e) < sizeof(corresponding vector type).  */
+
+#define N 3
+
+static struct A {
+  int p1, p2;
+  int e[N];
+} a, b, c;
+
+int foo(void)
+{
+  for (int i = 0; i < N; i++)
+    a.e[i] = b.e[i] + c.e[i];
+
+   return a.e[0];
+}
+
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target aarch64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target powerpc64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target arm*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-72.c b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-72.c
new file mode 100644
index 00000000000..873fabe9f52
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-vect-72.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target section_anchors } */
+/* { dg-require-effective-target vect_int } */
+
+#define N 32
+
+/* Clone of section-anchors-vect-70.c having nested struct.  */
+
+struct S
+{
+  int e[N];
+};
+
+static struct A {
+  int p1, p2;
+  struct S s; 
+} a, b, c;
+
+int foo(void)
+{
+  for (int i = 0; i < N; i++)
+    a.s.e[i] = b.s.e[i] + c.s.e[i];
+
+   return a.s.e[0];
+}
+
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target aarch64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 0 "increase_alignment" { target powerpc64*-*-* } } } */
+/* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 3 "increase_alignment" { target arm*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr57206.c b/gcc/testsuite/gcc.dg/vect/pr57206.c
new file mode 100644
index 00000000000..009688e93b0
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr57206.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_float } */
+
+void bad0(float * d, unsigned int n)
+{
+  unsigned int i;
+  for (i=n; i>0; --i) 
+    d[n-i] = 0.0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr65951.c b/gcc/testsuite/gcc.dg/vect/pr65951.c
new file mode 100644
index 00000000000..cfd32373181
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr65951.c
@@ -0,0 +1,63 @@
+/* { dg-require-effective-target vect_int } */
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 512
+
+/* These multiplications should be vectorizable with additions when
+   no vector shift is available.  */
+
+__attribute__ ((noinline)) void
+foo (int *arr)
+{
+  for (int i = 0; i < N; i++)
+    arr[i] *= 2;
+}
+
+__attribute__ ((noinline)) void
+foo2 (int *arr)
+{
+  for (int i = 0; i < N; i++)
+    arr[i] *= 4;
+}
+
+int
+main (void)
+{
+  check_vect ();
+  int data[N];
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      data[i] = i;
+      __asm__ volatile ("");
+    }
+
+  foo (data);
+  for (i = 0; i < N; i++)
+    {
+      if (data[i] / 2 != i)
+      __builtin_abort ();
+      __asm__ volatile ("");
+    }
+
+  for (i = 0; i < N; i++)
+    {
+      data[i] = i;
+      __asm__ volatile ("");
+    }
+
+  foo2 (data);
+  for (i = 0; i < N; i++)
+    {
+      if (data[i] / 4 != i)
+      __builtin_abort ();
+      __asm__ volatile ("");
+    }
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr71259.c b/gcc/testsuite/gcc.dg/vect/pr71259.c
new file mode 100644
index 00000000000..eefa2433225
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr71259.c
@@ -0,0 +1,28 @@
+/* PR tree-optimization/71259 */
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+/* { dg-additional-options "-mavx" { target avx_runtime } } */
+
+#include "tree-vect.h"
+
+long a, b[1][44][2];
+long long c[44][17][2];
+
+int
+main ()
+{
+  int i, j, k;
+  check_vect ();
+  asm volatile ("" : : : "memory");
+  for (i = 0; i < 44; i++)
+    for (j = 0; j < 17; j++)
+      for (k = 0; k < 2; k++)
+	c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684;
+  asm volatile ("" : : : "memory");
+  for (i = 0; i < 44; i++) 
+    for (j = 0; j < 17; j++)
+      for (k = 0; k < 2; k++)
+	if (c[i][j][k] != -5105075050047261684)
+	  __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/pr71264.c b/gcc/testsuite/gcc.dg/vect/pr71264.c
new file mode 100644
index 00000000000..4f6381e323a
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr71264.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+
+typedef unsigned char uint8_t;
+typedef uint8_t footype __attribute__((vector_size(4)));
+
+void test(uint8_t *ptr, uint8_t *mask)
+{
+  footype mv;
+  __builtin_memcpy(&mv, mask, sizeof(mv));
+  for (unsigned i = 0; i < 16; i += 4)
+    {
+      footype temp;
+      __builtin_memcpy(&temp, &ptr[i], sizeof(temp));
+      temp ^= mv;
+      __builtin_memcpy(&ptr[i], &temp, sizeof(temp));
+    }
+}
+
+/* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/pr71818.c b/gcc/testsuite/gcc.dg/vect/pr71818.c
new file mode 100644
index 00000000000..2946551f8bb
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr71818.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+
+char a;
+short b;
+int c, d;
+void fn1() {
+  char e = 75, g;
+  unsigned char *f = &e;
+  a = 21;
+  for (; a <= 48; a++) {
+    for (; e <= 6;)
+      ;
+    g -= e -= b || g <= c;
+  }
+  d = *f;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/pr71823.c b/gcc/testsuite/gcc.dg/vect/pr71823.c
new file mode 100644
index 00000000000..079cde41ce4
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr71823.c
@@ -0,0 +1,14 @@
+/* PR tree-optimization/71823 */
+/* { dg-do compile } */
+/* { dg-additional-options "-mfma" { target i?86-*-* x86_64-*-* } } */
+
+float a[4], b[4];
+
+int
+main ()
+{
+  int i;
+  for (i = 0; i < 4; ++i)
+    b[i] = __builtin_fma (1024.0f, 1024.0f, a[i]);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/vect-load-lanes-peeling-1.c b/gcc/testsuite/gcc.dg/vect/vect-load-lanes-peeling-1.c
new file mode 100644
index 00000000000..c9cd104e8e5
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-load-lanes-peeling-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-require-effective-target vect_load_lanes } */
+
+void
+f (int *__restrict a, int *__restrict b)
+{
+  for (int i = 0; i < 96; ++i)
+    a[i] = b[i * 3] + b[i * 3 + 1] + b[i * 3 + 2];
+}
+
+/* { dg-final { scan-tree-dump-not "Data access with gaps" "vect" } } */
+/* { dg-final { scan-tree-dump-not "epilog loop required" "vect" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-1.c b/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-1.c
new file mode 100644
index 00000000000..e5dba82d7fa
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-1.c
@@ -0,0 +1,41 @@
+/* { dg-require-effective-target vect_int } */
+/* { dg-require-effective-target vect_shift } */
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 256
+
+__attribute__ ((noinline)) void
+foo (long long *arr)
+{
+  for (int i = 0; i < N; i++)
+    arr[i] *= 123;
+}
+
+int
+main (void)
+{
+  check_vect ();
+  long long data[N];
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      data[i] = i;
+      __asm__ volatile ("");
+    }
+
+  foo (data);
+  for (i = 0; i < N; i++)
+    {
+      if (data[i] / 123 != i)
+      __builtin_abort ();
+      __asm__ volatile ("");
+    }
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vect_recog_mult_pattern: detected" 2 "vect"  { target aarch64*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target aarch64*-*-* } } } */
diff --git a/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-2.c b/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-2.c
new file mode 100644
index 00000000000..c5beabaa974
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/vect-mult-const-pattern-2.c
@@ -0,0 +1,40 @@
+/* { dg-require-effective-target vect_int } */
+
+#include <stdarg.h>
+#include "tree-vect.h"
+
+#define N 256
+
+__attribute__ ((noinline)) void
+foo (long long *arr)
+{
+  for (int i = 0; i < N; i++)
+    arr[i] *= -19594LL;
+}
+
+int
+main (void)
+{
+  check_vect ();
+  long long data[N];
+  int i;
+
+  for (i = 0; i < N; i++)
+    {
+      data[i] = i;
+      __asm__ volatile ("");
+    }
+
+  foo (data);
+  for (i = 0; i < N; i++)
+    {
+      if (data[i] / -19594LL != i)
+      __builtin_abort ();
+      __asm__ volatile ("");
+    }
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vect_recog_mult_pattern: detected" 2 "vect"  { target aarch64*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target aarch64*-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c
new file mode 100644
index 00000000000..7bc79f5fcaf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/test_27.c
@@ -0,0 +1,46 @@
+/* Test AAPCS64 layout
+
+   Test named homogeneous floating-point aggregates of __fp16 data,
+   which should be passed in SIMD/FP registers or via the stack.  */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "test_27.c"
+
+struct x0
+{
+  __fp16 v[1];
+} f16x1;
+
+struct x1
+{
+  __fp16 v[2];
+} f16x2;
+
+struct x2
+{
+  __fp16 v[3];
+} f16x3;
+
+#define HAS_DATA_INIT_FUNC
+void init_data ()
+{
+  f16x1.v[0] = 2.0f;
+  f16x2.v[0] = 4.0f;
+  f16x2.v[1] = 8.0f;
+  f16x3.v[0] = 16.0f;
+  f16x3.v[1] = 32.0f;
+  f16x3.v[2] = 64.0f;
+}
+
+#include "abitest.h"
+#else
+ARG (struct x0, f16x1, H0)
+ARG (struct x1, f16x2, H1)
+ARG (struct x2, f16x3, H3)
+ARG (struct x1, f16x2, H6)
+ARG (struct x0, f16x1, STACK)
+ARG (int, 0xdeadbeef, W0)
+LAST_ARG (double, 456.789, STACK+8)
+#endif
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c
new file mode 100644
index 00000000000..73f8f1c7bef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-16.c
@@ -0,0 +1,28 @@
+/* Test AAPCS64 layout and __builtin_va_arg.
+
+   This test is focused particularly on __fp16 unnamed homogeneous
+   floating-point aggregate types which should be passed in fp/simd
+   registers until we run out of those, then the stack.  */
+
+/* { dg-do run { target aarch64*-*-* } } */
+
+#ifndef IN_FRAMEWORK
+#define AAPCS64_TEST_STDARG
+#define TESTFILE "va_arg-16.c"
+#include "type-def.h"
+
+struct hfa_f16x1_t hfa_f16x1 = {2.0f};
+struct hfa_f16x2_t hfa_f16x2 = {4.0f, 8.0f};
+struct hfa_f16x3_t hfa_f16x3 = {16.0f, 32.0f, 64.0f};
+
+#include "abitest.h"
+#else
+  ARG      (int, 1, W0, LAST_NAMED_ARG_ID)
+  DOTS
+  ANON     (struct hfa_f16x1_t, hfa_f16x1, H0     , 0)
+  ANON     (struct hfa_f16x2_t, hfa_f16x2, H1     , 1)
+  ANON     (struct hfa_f16x3_t, hfa_f16x3, H3     , 2)
+  ANON     (struct hfa_f16x2_t, hfa_f16x2, H6     , 3)
+  ANON     (struct hfa_f16x1_t, hfa_f16x1, STACK  , 4)
+  LAST_ANON(double            , 1.0      , STACK+8, 5)
+#endif
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
new file mode 100644
index 00000000000..519cffb0125
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
@@ -0,0 +1,663 @@
+/* This file contains tests for all the *p64 intrinsics, except for
+   vreinterpret which have their own testcase.  */
+
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results: vbsl.  */
+VECT_VAR_DECL(vbsl_expected,poly,64,1) [] = { 0xfffffff1 };
+VECT_VAR_DECL(vbsl_expected,poly,64,2) [] = { 0xfffffff1,
+					      0xfffffff1 };
+
+/* Expected results: vceq.  */
+VECT_VAR_DECL(vceq_expected,uint,64,1) [] = { 0x0 };
+
+/* Expected results: vcombine.  */
+VECT_VAR_DECL(vcombine_expected,poly,64,2) [] = { 0xfffffffffffffff0, 0x88 };
+
+/* Expected results: vcreate.  */
+VECT_VAR_DECL(vcreate_expected,poly,64,1) [] = { 0x123456789abcdef0 };
+
+/* Expected results: vdup_lane.  */
+VECT_VAR_DECL(vdup_lane_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vdup_lane_expected,poly,64,2) [] = { 0xfffffffffffffff0,
+						   0xfffffffffffffff0 };
+
+/* Expected results: vdup_n.  */
+VECT_VAR_DECL(vdup_n_expected0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vdup_n_expected0,poly,64,2) [] = { 0xfffffffffffffff0,
+						 0xfffffffffffffff0 };
+VECT_VAR_DECL(vdup_n_expected1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vdup_n_expected1,poly,64,2) [] = { 0xfffffffffffffff1,
+						 0xfffffffffffffff1 };
+VECT_VAR_DECL(vdup_n_expected2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vdup_n_expected2,poly,64,2) [] = { 0xfffffffffffffff2,
+						 0xfffffffffffffff2 };
+
+/* Expected results: vext.  */
+VECT_VAR_DECL(vext_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vext_expected,poly,64,2) [] = { 0xfffffffffffffff1, 0x88 };
+
+/* Expected results: vget_low.  */
+VECT_VAR_DECL(vget_low_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+
+/* Expected results: vld1.  */
+VECT_VAR_DECL(vld1_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld1_expected,poly,64,2) [] = { 0xfffffffffffffff0,
+					      0xfffffffffffffff1 };
+
+/* Expected results: vld1_dup.  */
+VECT_VAR_DECL(vld1_dup_expected0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld1_dup_expected0,poly,64,2) [] = { 0xfffffffffffffff0,
+						   0xfffffffffffffff0 };
+VECT_VAR_DECL(vld1_dup_expected1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld1_dup_expected1,poly,64,2) [] = { 0xfffffffffffffff1,
+						   0xfffffffffffffff1 };
+VECT_VAR_DECL(vld1_dup_expected2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vld1_dup_expected2,poly,64,2) [] = { 0xfffffffffffffff2,
+						   0xfffffffffffffff2 };
+
+/* Expected results: vld1_lane.  */
+VECT_VAR_DECL(vld1_lane_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld1_lane_expected,poly,64,2) [] = { 0xfffffffffffffff0,
+						   0xaaaaaaaaaaaaaaaa };
+
+/* Expected results: vldX.  */
+VECT_VAR_DECL(vld2_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld2_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld3_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld3_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld3_expected_2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vld4_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld4_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld4_expected_2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vld4_expected_3,poly,64,1) [] = { 0xfffffffffffffff3 };
+
+/* Expected results: vldX_dup.  */
+VECT_VAR_DECL(vld2_dup_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld2_dup_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld3_dup_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld3_dup_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld3_dup_expected_2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vld4_dup_expected_0,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vld4_dup_expected_1,poly,64,1) [] = { 0xfffffffffffffff1 };
+VECT_VAR_DECL(vld4_dup_expected_2,poly,64,1) [] = { 0xfffffffffffffff2 };
+VECT_VAR_DECL(vld4_dup_expected_3,poly,64,1) [] = { 0xfffffffffffffff3 };
+
+/* Expected results: vsli.  */
+VECT_VAR_DECL(vsli_expected,poly,64,1) [] = { 0x10 };
+VECT_VAR_DECL(vsli_expected,poly,64,2) [] = { 0x7ffffffffffff0,
+					      0x7ffffffffffff1 };
+VECT_VAR_DECL(vsli_expected_max_shift,poly,64,1) [] = { 0x7ffffffffffffff0 };
+VECT_VAR_DECL(vsli_expected_max_shift,poly,64,2) [] = { 0xfffffffffffffff0,
+							0xfffffffffffffff1 };
+
+/* Expected results: vsri.  */
+VECT_VAR_DECL(vsri_expected,poly,64,1) [] = { 0xe000000000000000 };
+VECT_VAR_DECL(vsri_expected,poly,64,2) [] = { 0xfffffffffffff800,
+					      0xfffffffffffff800 };
+VECT_VAR_DECL(vsri_expected_max_shift,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vsri_expected_max_shift,poly,64,2) [] = { 0xfffffffffffffff0,
+							0xfffffffffffffff1 };
+
+/* Expected results: vst1_lane.  */
+VECT_VAR_DECL(vst1_lane_expected,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vst1_lane_expected,poly,64,2) [] = { 0xfffffffffffffff0,
+						   0x3333333333333333 };
+
+int main (void)
+{
+  int i;
+
+  /* vbsl_p64 tests.  */
+#define TEST_MSG "VBSL/VBSLQ"
+
+#define TEST_VBSL(T3, Q, T1, T2, W, N)					\
+  VECT_VAR(vbsl_vector_res, T1, W, N) =					\
+    vbsl##Q##_##T2##W(VECT_VAR(vbsl_vector_first, T3, W, N),		\
+		      VECT_VAR(vbsl_vector, T1, W, N),			\
+		      VECT_VAR(vbsl_vector2, T1, W, N));		\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vbsl_vector_res, T1, W, N))
+
+  DECL_VARIABLE(vbsl_vector, poly, 64, 1);
+  DECL_VARIABLE(vbsl_vector, poly, 64, 2);
+  DECL_VARIABLE(vbsl_vector2, poly, 64, 1);
+  DECL_VARIABLE(vbsl_vector2, poly, 64, 2);
+  DECL_VARIABLE(vbsl_vector_res, poly, 64, 1);
+  DECL_VARIABLE(vbsl_vector_res, poly, 64, 2);
+
+  DECL_VARIABLE(vbsl_vector_first, uint, 64, 1);
+  DECL_VARIABLE(vbsl_vector_first, uint, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vbsl_vector, buffer, , poly, p, 64, 1);
+  VLOAD(vbsl_vector, buffer, q, poly, p, 64, 2);
+
+  VDUP(vbsl_vector2, , poly, p, 64, 1, 0xFFFFFFF3);
+  VDUP(vbsl_vector2, q, poly, p, 64, 2, 0xFFFFFFF3);
+
+  VDUP(vbsl_vector_first, , uint, u, 64, 1, 0xFFFFFFF2);
+  VDUP(vbsl_vector_first, q, uint, u, 64, 2, 0xFFFFFFF2);
+
+  TEST_VBSL(uint, , poly, p, 64, 1);
+  TEST_VBSL(uint, q, poly, p, 64, 2);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vbsl_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vbsl_expected, "");
+
+  /* vceq_p64 tests. */
+#undef TEST_MSG
+#define TEST_MSG "VCEQ"
+
+#define TEST_VCOMP1(INSN, Q, T1, T2, T3, W, N)				\
+  VECT_VAR(vceq_vector_res, T3, W, N) =					\
+    INSN##Q##_##T2##W(VECT_VAR(vceq_vector, T1, W, N),			\
+		      VECT_VAR(vceq_vector2, T1, W, N));		\
+  vst1##Q##_u##W(VECT_VAR(result, T3, W, N), VECT_VAR(vceq_vector_res, T3, W, N))
+
+#define TEST_VCOMP(INSN, Q, T1, T2, T3, W, N)				\
+  TEST_VCOMP1(INSN, Q, T1, T2, T3, W, N)
+
+  DECL_VARIABLE(vceq_vector, poly, 64, 1);
+  DECL_VARIABLE(vceq_vector2, poly, 64, 1);
+  DECL_VARIABLE(vceq_vector_res, uint, 64, 1);
+
+  CLEAN(result, uint, 64, 1);
+
+  VLOAD(vceq_vector, buffer, , poly, p, 64, 1);
+
+  VDUP(vceq_vector2, , poly, p, 64, 1, 0x88);
+
+  TEST_VCOMP(vceq, , poly, p, uint, 64, 1);
+
+  CHECK(TEST_MSG, uint, 64, 1, PRIx64, vceq_expected, "");
+
+  /* vcombine_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VCOMBINE"
+
+#define TEST_VCOMBINE(T1, T2, W, N, N2)					\
+  VECT_VAR(vcombine_vector128, T1, W, N2) =				\
+    vcombine_##T2##W(VECT_VAR(vcombine_vector64_a, T1, W, N),		\
+		     VECT_VAR(vcombine_vector64_b, T1, W, N));		\
+  vst1q_##T2##W(VECT_VAR(result, T1, W, N2), VECT_VAR(vcombine_vector128, T1, W, N2))
+
+  DECL_VARIABLE(vcombine_vector64_a, poly, 64, 1);
+  DECL_VARIABLE(vcombine_vector64_b, poly, 64, 1);
+  DECL_VARIABLE(vcombine_vector128, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vcombine_vector64_a, buffer, , poly, p, 64, 1);
+
+  VDUP(vcombine_vector64_b, , poly, p, 64, 1, 0x88);
+
+  TEST_VCOMBINE(poly, p, 64, 1, 2);
+
+  CHECK(TEST_MSG, poly, 64, 2, PRIx16, vcombine_expected, "");
+
+  /* vcreate_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VCREATE"
+
+#define TEST_VCREATE(T1, T2, W, N)					\
+  VECT_VAR(vcreate_vector_res, T1, W, N) =				\
+    vcreate_##T2##W(VECT_VAR(vcreate_val, T1, W, N));			\
+  vst1_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vcreate_vector_res, T1, W, N))
+
+#define DECL_VAL(VAR, T1, W, N)			\
+  uint64_t VECT_VAR(VAR, T1, W, N)
+
+  DECL_VAL(vcreate_val, poly, 64, 1);
+  DECL_VARIABLE(vcreate_vector_res, poly, 64, 1);
+
+  CLEAN(result, poly, 64, 2);
+
+  VECT_VAR(vcreate_val, poly, 64, 1) = 0x123456789abcdef0ULL;
+
+  TEST_VCREATE(poly, p, 64, 1);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vcreate_expected, "");
+
+  /* vdup_lane_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VDUP_LANE/VDUP_LANEQ"
+
+#define TEST_VDUP_LANE(Q, T1, T2, W, N, N2, L)				\
+  VECT_VAR(vdup_lane_vector_res, T1, W, N) =				\
+    vdup##Q##_lane_##T2##W(VECT_VAR(vdup_lane_vector, T1, W, N2), L);	\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vdup_lane_vector_res, T1, W, N))
+
+  DECL_VARIABLE(vdup_lane_vector, poly, 64, 1);
+  DECL_VARIABLE(vdup_lane_vector, poly, 64, 2);
+  DECL_VARIABLE(vdup_lane_vector_res, poly, 64, 1);
+  DECL_VARIABLE(vdup_lane_vector_res, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vdup_lane_vector, buffer, , poly, p, 64, 1);
+
+  TEST_VDUP_LANE(, poly, p, 64, 1, 1, 0);
+  TEST_VDUP_LANE(q, poly, p, 64, 2, 1, 0);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_lane_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_lane_expected, "");
+
+  /* vdup_n_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VDUP/VDUPQ"
+
+#define TEST_VDUP(Q, T1, T2, W, N)					\
+  VECT_VAR(vdup_n_vector, T1, W, N) =					\
+    vdup##Q##_n_##T2##W(VECT_VAR(buffer_dup, T1, W, N)[i]);		\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vdup_n_vector, T1, W, N))
+
+  DECL_VARIABLE(vdup_n_vector, poly, 64, 1);
+  DECL_VARIABLE(vdup_n_vector, poly, 64, 2);
+
+  /* Try to read different places from the input buffer.  */
+  for (i=0; i< 3; i++) {
+    CLEAN(result, poly, 64, 1);
+    CLEAN(result, poly, 64, 2);
+
+    TEST_VDUP(, poly, p, 64, 1);
+    TEST_VDUP(q, poly, p, 64, 2);
+
+    switch (i) {
+    case 0:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected0, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected0, "");
+      break;
+    case 1:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected1, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected1, "");
+      break;
+    case 2:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vdup_n_expected2, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vdup_n_expected2, "");
+      break;
+    default:
+      abort();
+    }
+  }
+
+  /* vexit_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VEXT/VEXTQ"
+
+#define TEST_VEXT(Q, T1, T2, W, N, V)					\
+  VECT_VAR(vext_vector_res, T1, W, N) =					\
+    vext##Q##_##T2##W(VECT_VAR(vext_vector1, T1, W, N),			\
+		      VECT_VAR(vext_vector2, T1, W, N),			\
+		      V);						\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vext_vector_res, T1, W, N))
+
+  DECL_VARIABLE(vext_vector1, poly, 64, 1);
+  DECL_VARIABLE(vext_vector1, poly, 64, 2);
+  DECL_VARIABLE(vext_vector2, poly, 64, 1);
+  DECL_VARIABLE(vext_vector2, poly, 64, 2);
+  DECL_VARIABLE(vext_vector_res, poly, 64, 1);
+  DECL_VARIABLE(vext_vector_res, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vext_vector1, buffer, , poly, p, 64, 1);
+  VLOAD(vext_vector1, buffer, q, poly, p, 64, 2);
+
+  VDUP(vext_vector2, , poly, p, 64, 1, 0x88);
+  VDUP(vext_vector2, q, poly, p, 64, 2, 0x88);
+
+  TEST_VEXT(, poly, p, 64, 1, 0);
+  TEST_VEXT(q, poly, p, 64, 2, 1);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vext_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vext_expected, "");
+
+  /* vget_low_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VGET_LOW"
+
+#define TEST_VGET_LOW(T1, T2, W, N, N2)					\
+  VECT_VAR(vget_low_vector64, T1, W, N) =				\
+    vget_low_##T2##W(VECT_VAR(vget_low_vector128, T1, W, N2));		\
+  vst1_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vget_low_vector64, T1, W, N))
+
+  DECL_VARIABLE(vget_low_vector64, poly, 64, 1);
+  DECL_VARIABLE(vget_low_vector128, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+
+  VLOAD(vget_low_vector128, buffer, q, poly, p, 64, 2);
+
+  TEST_VGET_LOW(poly, p, 64, 1, 2);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vget_low_expected, "");
+
+  /* vld1_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VLD1/VLD1Q"
+
+#define TEST_VLD1(VAR, BUF, Q, T1, T2, W, N)				\
+  VECT_VAR(VAR, T1, W, N) = vld1##Q##_##T2##W(VECT_VAR(BUF, T1, W, N)); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(VAR, T1, W, N))
+
+  DECL_VARIABLE(vld1_vector, poly, 64, 1);
+  DECL_VARIABLE(vld1_vector, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vld1_vector, buffer, , poly, p, 64, 1);
+  VLOAD(vld1_vector, buffer, q, poly, p, 64, 2);
+
+  TEST_VLD1(vld1_vector, buffer, , poly, p, 64, 1);
+  TEST_VLD1(vld1_vector, buffer, q, poly, p, 64, 2);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_expected, "");
+
+  /* vld1_dup_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VLD1_DUP/VLD1_DUPQ"
+
+#define TEST_VLD1_DUP(VAR, BUF, Q, T1, T2, W, N)			\
+  VECT_VAR(VAR, T1, W, N) =						\
+    vld1##Q##_dup_##T2##W(&VECT_VAR(BUF, T1, W, N)[i]);			\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(VAR, T1, W, N))
+
+  DECL_VARIABLE(vld1_dup_vector, poly, 64, 1);
+  DECL_VARIABLE(vld1_dup_vector, poly, 64, 2);
+
+  /* Try to read different places from the input buffer.  */
+  for (i=0; i<3; i++) {
+    CLEAN(result, poly, 64, 1);
+    CLEAN(result, poly, 64, 2);
+
+    TEST_VLD1_DUP(vld1_dup_vector, buffer_dup, , poly, p, 64, 1);
+    TEST_VLD1_DUP(vld1_dup_vector, buffer_dup, q, poly, p, 64, 2);
+
+    switch (i) {
+    case 0:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected0, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected0, "");
+      break;
+    case 1:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected1, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected1, "");
+      break;
+    case 2:
+      CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_dup_expected2, "");
+      CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_dup_expected2, "");
+      break;
+    default:
+      abort();
+    }
+  }
+
+  /* vld1_lane_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VLD1_LANE/VLD1_LANEQ"
+
+#define TEST_VLD1_LANE(Q, T1, T2, W, N, L)				\
+  memset (VECT_VAR(vld1_lane_buffer_src, T1, W, N), 0xAA, W/8*N);	\
+  VECT_VAR(vld1_lane_vector_src, T1, W, N) =				\
+    vld1##Q##_##T2##W(VECT_VAR(vld1_lane_buffer_src, T1, W, N));	\
+  VECT_VAR(vld1_lane_vector, T1, W, N) =				\
+    vld1##Q##_lane_##T2##W(VECT_VAR(buffer, T1, W, N),			\
+			   VECT_VAR(vld1_lane_vector_src, T1, W, N), L); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vld1_lane_vector, T1, W, N))
+
+  DECL_VARIABLE(vld1_lane_vector, poly, 64, 1);
+  DECL_VARIABLE(vld1_lane_vector, poly, 64, 2);
+  DECL_VARIABLE(vld1_lane_vector_src, poly, 64, 1);
+  DECL_VARIABLE(vld1_lane_vector_src, poly, 64, 2);
+
+  ARRAY(vld1_lane_buffer_src, poly, 64, 1);
+  ARRAY(vld1_lane_buffer_src, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  TEST_VLD1_LANE(, poly, p, 64, 1, 0);
+  TEST_VLD1_LANE(q, poly, p, 64, 2, 0);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld1_lane_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vld1_lane_expected, "");
+
+  /* vldX_p64 tests.  */
+#define DECL_VLDX(T1, W, N, X)						\
+  VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vldX_vector, T1, W, N, X); \
+  VECT_VAR_DECL(vldX_result_bis_##X, T1, W, N)[X * N]
+
+#define TEST_VLDX(Q, T1, T2, W, N, X)					\
+  VECT_ARRAY_VAR(vldX_vector, T1, W, N, X) =				\
+    /* Use dedicated init buffer, of size X */				\
+    vld##X##Q##_##T2##W(VECT_ARRAY_VAR(buffer_vld##X, T1, W, N, X));	\
+  vst##X##Q##_##T2##W(VECT_VAR(vldX_result_bis_##X, T1, W, N),		\
+		      VECT_ARRAY_VAR(vldX_vector, T1, W, N, X));	\
+  memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(vldX_result_bis_##X, T1, W, N), \
+	 sizeof(VECT_VAR(result, T1, W, N)));
+
+  /* Overwrite "result" with the contents of "result_bis"[Y].  */
+#define TEST_EXTRA_CHUNK(T1, W, N, X,Y)				\
+  memcpy(VECT_VAR(result, T1, W, N),				\
+	 &(VECT_VAR(vldX_result_bis_##X, T1, W, N)[Y*N]),	\
+	 sizeof(VECT_VAR(result, T1, W, N)));
+
+  DECL_VLDX(poly, 64, 1, 2);
+  DECL_VLDX(poly, 64, 1, 3);
+  DECL_VLDX(poly, 64, 1, 4);
+
+  VECT_ARRAY_INIT2(buffer_vld2, poly, 64, 1);
+  PAD(buffer_vld2_pad, poly, 64, 1);
+  VECT_ARRAY_INIT3(buffer_vld3, poly, 64, 1);
+  PAD(buffer_vld3_pad, poly, 64, 1);
+  VECT_ARRAY_INIT4(buffer_vld4, poly, 64, 1);
+  PAD(buffer_vld4_pad, poly, 64, 1);
+
+#undef TEST_MSG
+#define TEST_MSG "VLD2/VLD2Q"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX(, poly, p, 64, 1, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 2, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_expected_1, "chunk 1");
+
+#undef TEST_MSG
+#define TEST_MSG "VLD3/VLD3Q"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX(, poly, p, 64, 1, 3);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 3, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_1, "chunk 1");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 3, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_expected_2, "chunk 2");
+
+#undef TEST_MSG
+#define TEST_MSG "VLD4/VLD4Q"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX(, poly, p, 64, 1, 4);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 4, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_1, "chunk 1");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 4, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_2, "chunk 2");
+  CLEAN(result, poly, 64, 1);
+  TEST_EXTRA_CHUNK(poly, 64, 1, 4, 3);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_expected_3, "chunk 3");
+
+  /* vldX_dup_p64 tests.  */
+#define DECL_VLDX_DUP(T1, W, N, X)					\
+  VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vldX_dup_vector, T1, W, N, X); \
+  VECT_VAR_DECL(vldX_dup_result_bis_##X, T1, W, N)[X * N]
+
+#define TEST_VLDX_DUP(Q, T1, T2, W, N, X)				\
+  VECT_ARRAY_VAR(vldX_dup_vector, T1, W, N, X) =			\
+    vld##X##Q##_dup_##T2##W(&VECT_VAR(buffer_dup, T1, W, N)[0]);	\
+    									\
+  vst##X##Q##_##T2##W(VECT_VAR(vldX_dup_result_bis_##X, T1, W, N),	\
+		      VECT_ARRAY_VAR(vldX_dup_vector, T1, W, N, X));	\
+  memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(vldX_dup_result_bis_##X, T1, W, N), \
+	 sizeof(VECT_VAR(result, T1, W, N)));
+
+  /* Overwrite "result" with the contents of "result_bis"[Y].  */
+#define TEST_VLDX_DUP_EXTRA_CHUNK(T1, W, N, X,Y)		\
+  memcpy(VECT_VAR(result, T1, W, N),				\
+	 &(VECT_VAR(vldX_dup_result_bis_##X, T1, W, N)[Y*N]),	\
+	 sizeof(VECT_VAR(result, T1, W, N)));
+
+  DECL_VLDX_DUP(poly, 64, 1, 2);
+  DECL_VLDX_DUP(poly, 64, 1, 3);
+  DECL_VLDX_DUP(poly, 64, 1, 4);
+
+
+#undef TEST_MSG
+#define TEST_MSG "VLD2_DUP/VLD2Q_DUP"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP(, poly, p, 64, 1, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 2, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld2_dup_expected_1, "chunk 1");
+
+#undef TEST_MSG
+#define TEST_MSG "VLD3_DUP/VLD3Q_DUP"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP(, poly, p, 64, 1, 3);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_1, "chunk 1");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 3, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld3_dup_expected_2, "chunk 2");
+
+#undef TEST_MSG
+#define TEST_MSG "VLD4_DUP/VLD4Q_DUP"
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP(, poly, p, 64, 1, 4);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_0, "chunk 0");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 1);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_1, "chunk 1");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 2);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_2, "chunk 2");
+  CLEAN(result, poly, 64, 1);
+  TEST_VLDX_DUP_EXTRA_CHUNK(poly, 64, 1, 4, 3);
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vld4_dup_expected_3, "chunk 3");
+
+  /* vsli_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VSLI"
+
+#define TEST_VSXI1(INSN, Q, T1, T2, W, N, V)				\
+  VECT_VAR(vsXi_vector_res, T1, W, N) =					\
+    INSN##Q##_n_##T2##W(VECT_VAR(vsXi_vector, T1, W, N),		\
+		      VECT_VAR(vsXi_vector2, T1, W, N),			\
+		      V);						\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vsXi_vector_res, T1, W, N))
+
+#define TEST_VSXI(INSN, Q, T1, T2, W, N, V)	\
+  TEST_VSXI1(INSN, Q, T1, T2, W, N, V)
+
+  DECL_VARIABLE(vsXi_vector, poly, 64, 1);
+  DECL_VARIABLE(vsXi_vector, poly, 64, 2);
+  DECL_VARIABLE(vsXi_vector2, poly, 64, 1);
+  DECL_VARIABLE(vsXi_vector2, poly, 64, 2);
+  DECL_VARIABLE(vsXi_vector_res, poly, 64, 1);
+  DECL_VARIABLE(vsXi_vector_res, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vsXi_vector, buffer, , poly, p, 64, 1);
+  VLOAD(vsXi_vector, buffer, q, poly, p, 64, 2);
+
+  VDUP(vsXi_vector2, , poly, p, 64, 1, 2);
+  VDUP(vsXi_vector2, q, poly, p, 64, 2, 3);
+
+  TEST_VSXI(vsli, , poly, p, 64, 1, 3);
+  TEST_VSXI(vsli, q, poly, p, 64, 2, 53);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected, "");
+
+  /* Test cases with maximum shift amount.  */
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  TEST_VSXI(vsli, , poly, p, 64, 1, 63);
+  TEST_VSXI(vsli, q, poly, p, 64, 2, 63);
+
+#define COMMENT "(max shift amount)"
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsli_expected_max_shift, COMMENT);
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsli_expected_max_shift, COMMENT);
+
+  /* vsri_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VSRI"
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  VLOAD(vsXi_vector, buffer, , poly, p, 64, 1);
+  VLOAD(vsXi_vector, buffer, q, poly, p, 64, 2);
+
+  VDUP(vsXi_vector2, , poly, p, 64, 1, 2);
+  VDUP(vsXi_vector2, q, poly, p, 64, 2, 3);
+
+  TEST_VSXI(vsri, , poly, p, 64, 1, 3);
+  TEST_VSXI(vsri, q, poly, p, 64, 2, 53);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected, "");
+
+  /* Test cases with maximum shift amount.  */
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  TEST_VSXI(vsri, , poly, p, 64, 1, 64);
+  TEST_VSXI(vsri, q, poly, p, 64, 2, 64);
+
+#define COMMENT "(max shift amount)"
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vsri_expected_max_shift, COMMENT);
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vsri_expected_max_shift, COMMENT);
+
+  /* vst1_lane_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VST1_LANE/VST1_LANEQ"
+
+#define TEST_VST1_LANE(Q, T1, T2, W, N, L)				\
+  VECT_VAR(vst1_lane_vector, T1, W, N) =				\
+    vld1##Q##_##T2##W(VECT_VAR(buffer, T1, W, N));			\
+  vst1##Q##_lane_##T2##W(VECT_VAR(result, T1, W, N),			\
+			 VECT_VAR(vst1_lane_vector, T1, W, N), L)
+
+  DECL_VARIABLE(vst1_lane_vector, poly, 64, 1);
+  DECL_VARIABLE(vst1_lane_vector, poly, 64, 2);
+
+  CLEAN(result, poly, 64, 1);
+  CLEAN(result, poly, 64, 2);
+
+  TEST_VST1_LANE(, poly, p, 64, 1, 0);
+  TEST_VST1_LANE(q, poly, p, 64, 2, 0);
+
+  CHECK(TEST_MSG, poly, 64, 1, PRIx64, vst1_lane_expected, "");
+  CHECK(TEST_MSG, poly, 64, 2, PRIx64, vst1_lane_expected, "");
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c
new file mode 100644
index 00000000000..efa9b5f2ece
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms_vfma_n.c
@@ -0,0 +1,490 @@
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+#if defined(__aarch64__) && defined(__ARM_FEATURE_FMA)
+
+#define A0 123.4f
+#define A1 -3.8f
+#define A2 -29.4f
+#define A3 (__builtin_inff ())
+#define A4 0.0f
+#define A5 24.0f
+#define A6 124.0f
+#define A7 1024.0f
+
+#define B0 -5.8f
+#define B1 -0.0f
+#define B2 -10.8f
+#define B3 10.0f
+#define B4 23.4f
+#define B5 -1234.8f
+#define B6 8.9f
+#define B7 4.0f
+
+#define E0 9.8f
+#define E1 -1024.0f
+#define E2 (-__builtin_inff ())
+#define E3 479.0f
+float32_t elem0 = E0;
+float32_t elem1 = E1;
+float32_t elem2 = E2;
+float32_t elem3 = E3;
+
+#define DA0 1231234.4
+#define DA1 -3.8
+#define DA2 -2980.4
+#define DA3 -5.8
+#define DA4 0.01123
+#define DA5 24.0
+#define DA6 124.12345
+#define DA7 1024.0
+
+#define DB0 -5.8
+#define DB1 (__builtin_inf ())
+#define DB2 -105.8
+#define DB3 10.0
+#define DB4 (-__builtin_inf ())
+#define DB5 -1234.8
+#define DB6 848.9
+#define DB7 44444.0
+
+#define DE0 9.8
+#define DE1 -1024.0
+#define DE2 105.8
+#define DE3 479.0
+float64_t delem0 = DE0;
+float64_t delem1 = DE1;
+float64_t delem2 = DE2;
+float64_t delem3 = DE3;
+
+/* Expected results for vfms_n.  */
+
+VECT_VAR_DECL(expectedfms0, float, 32, 2) [] = {A0 + -B0 * E0, A1 + -B1 * E0};
+VECT_VAR_DECL(expectedfms1, float, 32, 2) [] = {A2 + -B2 * E1, A3 + -B3 * E1};
+VECT_VAR_DECL(expectedfms2, float, 32, 2) [] = {A4 + -B4 * E2, A5 + -B5 * E2};
+VECT_VAR_DECL(expectedfms3, float, 32, 2) [] = {A6 + -B6 * E3, A7 + -B7 * E3};
+VECT_VAR_DECL(expectedfma0, float, 32, 2) [] = {A0 + B0 * E0, A1 + B1 * E0};
+VECT_VAR_DECL(expectedfma1, float, 32, 2) [] = {A2 + B2 * E1, A3 + B3 * E1};
+VECT_VAR_DECL(expectedfma2, float, 32, 2) [] = {A4 + B4 * E2, A5 + B5 * E2};
+VECT_VAR_DECL(expectedfma3, float, 32, 2) [] = {A6 + B6 * E3, A7 + B7 * E3};
+
+hfloat32_t * VECT_VAR (expectedfms0_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfms0, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfms1_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfms1, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfms2_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfms2, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfms3_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfms3, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfma0_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfma0, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfma1_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfma1, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfma2_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfma2, float, 32, 2);
+hfloat32_t * VECT_VAR (expectedfma3_static, hfloat, 32, 2) =
+  (hfloat32_t *) VECT_VAR (expectedfma3, float, 32, 2);
+
+
+VECT_VAR_DECL(expectedfms0, float, 32, 4) [] = {A0 + -B0 * E0, A1 + -B1 * E0,
+						A2 + -B2 * E0, A3 + -B3 * E0};
+VECT_VAR_DECL(expectedfms1, float, 32, 4) [] = {A4 + -B4 * E1, A5 + -B5 * E1,
+						A6 + -B6 * E1, A7 + -B7 * E1};
+VECT_VAR_DECL(expectedfms2, float, 32, 4) [] = {A0 + -B0 * E2, A2 + -B2 * E2,
+						A4 + -B4 * E2, A6 + -B6 * E2};
+VECT_VAR_DECL(expectedfms3, float, 32, 4) [] = {A1 + -B1 * E3, A3 + -B3 * E3,
+						A5 + -B5 * E3, A7 + -B7 * E3};
+VECT_VAR_DECL(expectedfma0, float, 32, 4) [] = {A0 + B0 * E0, A1 + B1 * E0,
+						A2 + B2 * E0, A3 + B3 * E0};
+VECT_VAR_DECL(expectedfma1, float, 32, 4) [] = {A4 + B4 * E1, A5 + B5 * E1,
+						A6 + B6 * E1, A7 + B7 * E1};
+VECT_VAR_DECL(expectedfma2, float, 32, 4) [] = {A0 + B0 * E2, A2 + B2 * E2,
+						A4 + B4 * E2, A6 + B6 * E2};
+VECT_VAR_DECL(expectedfma3, float, 32, 4) [] = {A1 + B1 * E3, A3 + B3 * E3,
+						A5 + B5 * E3, A7 + B7 * E3};
+
+hfloat32_t * VECT_VAR (expectedfms0_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfms0, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfms1_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfms1, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfms2_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfms2, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfms3_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfms3, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfma0_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfma0, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfma1_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfma1, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfma2_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfma2, float, 32, 4);
+hfloat32_t * VECT_VAR (expectedfma3_static, hfloat, 32, 4) =
+  (hfloat32_t *) VECT_VAR (expectedfma3, float, 32, 4);
+
+VECT_VAR_DECL(expectedfms0, float, 64, 2) [] = {DA0 + -DB0 * DE0,
+						DA1 + -DB1 * DE0};
+VECT_VAR_DECL(expectedfms1, float, 64, 2) [] = {DA2 + -DB2 * DE1,
+						DA3 + -DB3 * DE1};
+VECT_VAR_DECL(expectedfms2, float, 64, 2) [] = {DA4 + -DB4 * DE2,
+						DA5 + -DB5 * DE2};
+VECT_VAR_DECL(expectedfms3, float, 64, 2) [] = {DA6 + -DB6 * DE3,
+						DA7 + -DB7 * DE3};
+VECT_VAR_DECL(expectedfma0, float, 64, 2) [] = {DA0 + DB0 * DE0,
+						DA1 + DB1 * DE0};
+VECT_VAR_DECL(expectedfma1, float, 64, 2) [] = {DA2 + DB2 * DE1,
+						DA3 + DB3 * DE1};
+VECT_VAR_DECL(expectedfma2, float, 64, 2) [] = {DA4 + DB4 * DE2,
+						DA5 + DB5 * DE2};
+VECT_VAR_DECL(expectedfma3, float, 64, 2) [] = {DA6 + DB6 * DE3,
+						DA7 + DB7 * DE3};
+hfloat64_t * VECT_VAR (expectedfms0_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfms0, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfms1_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfms1, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfms2_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfms2, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfms3_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfms3, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfma0_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfma0, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfma1_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfma1, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfma2_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfma2, float, 64, 2);
+hfloat64_t * VECT_VAR (expectedfma3_static, hfloat, 64, 2) =
+  (hfloat64_t *) VECT_VAR (expectedfma3, float, 64, 2);
+
+VECT_VAR_DECL(expectedfms0, float, 64, 1) [] = {DA0 + -DB0 * DE0};
+VECT_VAR_DECL(expectedfms1, float, 64, 1) [] = {DA2 + -DB2 * DE1};
+VECT_VAR_DECL(expectedfms2, float, 64, 1) [] = {DA4 + -DB4 * DE2};
+VECT_VAR_DECL(expectedfms3, float, 64, 1) [] = {DA6 + -DB6 * DE3};
+VECT_VAR_DECL(expectedfma0, float, 64, 1) [] = {DA0 + DB0 * DE0};
+VECT_VAR_DECL(expectedfma1, float, 64, 1) [] = {DA2 + DB2 * DE1};
+VECT_VAR_DECL(expectedfma2, float, 64, 1) [] = {DA4 + DB4 * DE2};
+VECT_VAR_DECL(expectedfma3, float, 64, 1) [] = {DA6 + DB6 * DE3};
+
+hfloat64_t * VECT_VAR (expectedfms0_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfms0, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfms1_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfms1, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfms2_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfms2, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfms3_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfms3, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfma0_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfma0, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfma1_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfma1, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfma2_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfma2, float, 64, 1);
+hfloat64_t * VECT_VAR (expectedfma3_static, hfloat, 64, 1) =
+  (hfloat64_t *) VECT_VAR (expectedfma3, float, 64, 1);
+
+void exec_vfma_vfms_n (void)
+{
+#undef TEST_MSG
+#define TEST_MSG "VFMS_VFMA_N (FP32)"
+  clean_results ();
+
+  DECL_VARIABLE(vsrc_1, float, 32, 2);
+  DECL_VARIABLE(vsrc_2, float, 32, 2);
+  VECT_VAR_DECL (buf_src_1, float, 32, 2) [] = {A0, A1};
+  VECT_VAR_DECL (buf_src_2, float, 32, 2) [] = {B0, B1};
+  VLOAD (vsrc_1, buf_src_1, , float, f, 32, 2);
+  VLOAD (vsrc_2, buf_src_2, , float, f, 32, 2);
+  DECL_VARIABLE (vector_res, float, 32, 2) =
+    vfms_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem0);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfms0_static, "");
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfma_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem0);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfma0_static, "");
+
+  VECT_VAR_DECL (buf_src_3, float, 32, 2) [] = {A2, A3};
+  VECT_VAR_DECL (buf_src_4, float, 32, 2) [] = {B2, B3};
+  VLOAD (vsrc_1, buf_src_3, , float, f, 32, 2);
+  VLOAD (vsrc_2, buf_src_4, , float, f, 32, 2);
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfms_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem1);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfms1_static, "");
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfma_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem1);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfma1_static, "");
+
+  VECT_VAR_DECL (buf_src_5, float, 32, 2) [] = {A4, A5};
+  VECT_VAR_DECL (buf_src_6, float, 32, 2) [] = {B4, B5};
+  VLOAD (vsrc_1, buf_src_5, , float, f, 32, 2);
+  VLOAD (vsrc_2, buf_src_6, , float, f, 32, 2);
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfms_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem2);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfms2_static, "");
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfma_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem2);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfma2_static, "");
+
+  VECT_VAR_DECL (buf_src_7, float, 32, 2) [] = {A6, A7};
+  VECT_VAR_DECL (buf_src_8, float, 32, 2) [] = {B6, B7};
+  VLOAD (vsrc_1, buf_src_7, , float, f, 32, 2);
+  VLOAD (vsrc_2, buf_src_8, , float, f, 32, 2);
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfms_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem3);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfms3_static, "");
+  VECT_VAR (vector_res, float, 32, 2) =
+    vfma_n_f32 (VECT_VAR (vsrc_1, float, 32, 2),
+		VECT_VAR (vsrc_2, float, 32, 2), elem3);
+  vst1_f32 (VECT_VAR (result, float, 32, 2),
+	    VECT_VAR (vector_res, float, 32, 2));
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx16, expectedfma3_static, "");
+
+#undef TEST_MSG
+#define TEST_MSG "VFMSQ_VFMAQ_N (FP32)"
+  clean_results ();
+
+  DECL_VARIABLE(vsrc_1, float, 32, 4);
+  DECL_VARIABLE(vsrc_2, float, 32, 4);
+  VECT_VAR_DECL (buf_src_1, float, 32, 4) [] = {A0, A1, A2, A3};
+  VECT_VAR_DECL (buf_src_2, float, 32, 4) [] = {B0, B1, B2, B3};
+  VLOAD (vsrc_1, buf_src_1, q, float, f, 32, 4);
+  VLOAD (vsrc_2, buf_src_2, q, float, f, 32, 4);
+  DECL_VARIABLE (vector_res, float, 32, 4) =
+    vfmsq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem0);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfms0_static, "");
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmaq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem0);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfma0_static, "");
+
+  VECT_VAR_DECL (buf_src_3, float, 32, 4) [] = {A4, A5, A6, A7};
+  VECT_VAR_DECL (buf_src_4, float, 32, 4) [] = {B4, B5, B6, B7};
+  VLOAD (vsrc_1, buf_src_3, q, float, f, 32, 4);
+  VLOAD (vsrc_2, buf_src_4, q, float, f, 32, 4);
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmsq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem1);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfms1_static, "");
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmaq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem1);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfma1_static, "");
+
+  VECT_VAR_DECL (buf_src_5, float, 32, 4) [] = {A0, A2, A4, A6};
+  VECT_VAR_DECL (buf_src_6, float, 32, 4) [] = {B0, B2, B4, B6};
+  VLOAD (vsrc_1, buf_src_5, q, float, f, 32, 4);
+  VLOAD (vsrc_2, buf_src_6, q, float, f, 32, 4);
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmsq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem2);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfms2_static, "");
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmaq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem2);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfma2_static, "");
+
+  VECT_VAR_DECL (buf_src_7, float, 32, 4) [] = {A1, A3, A5, A7};
+  VECT_VAR_DECL (buf_src_8, float, 32, 4) [] = {B1, B3, B5, B7};
+  VLOAD (vsrc_1, buf_src_7, q, float, f, 32, 4);
+  VLOAD (vsrc_2, buf_src_8, q, float, f, 32, 4);
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmsq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem3);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfms3_static, "");
+  VECT_VAR (vector_res, float, 32, 4) =
+    vfmaq_n_f32 (VECT_VAR (vsrc_1, float, 32, 4),
+		 VECT_VAR (vsrc_2, float, 32, 4), elem3);
+  vst1q_f32 (VECT_VAR (result, float, 32, 4),
+	     VECT_VAR (vector_res, float, 32, 4));
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx16, expectedfma3_static, "");
+
+#undef TEST_MSG
+#define TEST_MSG "VFMSQ_VFMAQ_N (FP64)"
+  clean_results ();
+
+  DECL_VARIABLE(vsrc_1, float, 64, 2);
+  DECL_VARIABLE(vsrc_2, float, 64, 2);
+  VECT_VAR_DECL (buf_src_1, float, 64, 2) [] = {DA0, DA1};
+  VECT_VAR_DECL (buf_src_2, float, 64, 2) [] = {DB0, DB1};
+  VLOAD (vsrc_1, buf_src_1, q, float, f, 64, 2);
+  VLOAD (vsrc_2, buf_src_2, q, float, f, 64, 2);
+  DECL_VARIABLE (vector_res, float, 64, 2) =
+    vfmsq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem0);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms0_static, "");
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem0);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma0_static, "");
+
+  VECT_VAR_DECL (buf_src_3, float, 64, 2) [] = {DA2, DA3};
+  VECT_VAR_DECL (buf_src_4, float, 64, 2) [] = {DB2, DB3};
+  VLOAD (vsrc_1, buf_src_3, q, float, f, 64, 2);
+  VLOAD (vsrc_2, buf_src_4, q, float, f, 64, 2);
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmsq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem1);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms1_static, "");
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem1);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma1_static, "");
+
+  VECT_VAR_DECL (buf_src_5, float, 64, 2) [] = {DA4, DA5};
+  VECT_VAR_DECL (buf_src_6, float, 64, 2) [] = {DB4, DB5};
+  VLOAD (vsrc_1, buf_src_5, q, float, f, 64, 2);
+  VLOAD (vsrc_2, buf_src_6, q, float, f, 64, 2);
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmsq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem2);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms2_static, "");
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem2);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma2_static, "");
+
+  VECT_VAR_DECL (buf_src_7, float, 64, 2) [] = {DA6, DA7};
+  VECT_VAR_DECL (buf_src_8, float, 64, 2) [] = {DB6, DB7};
+  VLOAD (vsrc_1, buf_src_7, q, float, f, 64, 2);
+  VLOAD (vsrc_2, buf_src_8, q, float, f, 64, 2);
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmsq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem3);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfms3_static, "");
+  VECT_VAR (vector_res, float, 64, 2) =
+    vfmaq_n_f64 (VECT_VAR (vsrc_1, float, 64, 2),
+		 VECT_VAR (vsrc_2, float, 64, 2), delem3);
+  vst1q_f64 (VECT_VAR (result, float, 64, 2),
+	     VECT_VAR (vector_res, float, 64, 2));
+  CHECK_FP (TEST_MSG, float, 64, 2, PRIx16, expectedfma3_static, "");
+
+#undef TEST_MSG
+#define TEST_MSG "VFMS_VFMA_N (FP64)"
+  clean_results ();
+
+  DECL_VARIABLE(vsrc_1, float, 64, 1);
+  DECL_VARIABLE(vsrc_2, float, 64, 1);
+  VECT_VAR_DECL (buf_src_1, float, 64, 1) [] = {DA0};
+  VECT_VAR_DECL (buf_src_2, float, 64, 1) [] = {DB0};
+  VLOAD (vsrc_1, buf_src_1, , float, f, 64, 1);
+  VLOAD (vsrc_2, buf_src_2, , float, f, 64, 1);
+  DECL_VARIABLE (vector_res, float, 64, 1) =
+    vfms_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem0);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms0_static, "");
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem0);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma0_static, "");
+
+  VECT_VAR_DECL (buf_src_3, float, 64, 1) [] = {DA2};
+  VECT_VAR_DECL (buf_src_4, float, 64, 1) [] = {DB2};
+  VLOAD (vsrc_1, buf_src_3, , float, f, 64, 1);
+  VLOAD (vsrc_2, buf_src_4, , float, f, 64, 1);
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfms_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem1);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms1_static, "");
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem1);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma1_static, "");
+
+  VECT_VAR_DECL (buf_src_5, float, 64, 1) [] = {DA4};
+  VECT_VAR_DECL (buf_src_6, float, 64, 1) [] = {DB4};
+  VLOAD (vsrc_1, buf_src_5, , float, f, 64, 1);
+  VLOAD (vsrc_2, buf_src_6, , float, f, 64, 1);
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfms_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem2);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms2_static, "");
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem2);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma2_static, "");
+
+  VECT_VAR_DECL (buf_src_7, float, 64, 1) [] = {DA6};
+  VECT_VAR_DECL (buf_src_8, float, 64, 1) [] = {DB6};
+  VLOAD (vsrc_1, buf_src_7, , float, f, 64, 1);
+  VLOAD (vsrc_2, buf_src_8, , float, f, 64, 1);
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfms_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem3);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfms3_static, "");
+  VECT_VAR (vector_res, float, 64, 1) =
+    vfma_n_f64 (VECT_VAR (vsrc_1, float, 64, 1),
+		VECT_VAR (vsrc_2, float, 64, 1), delem3);
+  vst1_f64 (VECT_VAR (result, float, 64, 1),
+	     VECT_VAR (vector_res, float, 64, 1));
+  CHECK_FP (TEST_MSG, float, 64, 1, PRIx16, expectedfma3_static, "");
+}
+#endif
+
+int
+main (void)
+{
+#if defined(__aarch64__) && defined(__ARM_FEATURE_FMA)
+  exec_vfma_vfms_n ();
+#endif
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c
new file mode 100644
index 00000000000..808641524c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c
@@ -0,0 +1,166 @@
+/* This file contains tests for the vreinterpret *p128 intrinsics.  */
+
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results: vreinterpretq_p128_*.  */
+VECT_VAR_DECL(vreint_expected_q_p128_s8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							  0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p128_s16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							   0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p128_s32,poly,64,2) [] = { 0xfffffff1fffffff0,
+							   0xfffffff3fffffff2 };
+VECT_VAR_DECL(vreint_expected_q_p128_s64,poly,64,2) [] = { 0xfffffffffffffff0,
+							   0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p128_u8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							  0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p128_u16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							   0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p128_u32,poly,64,2) [] = { 0xfffffff1fffffff0,
+							   0xfffffff3fffffff2 };
+VECT_VAR_DECL(vreint_expected_q_p128_u64,poly,64,2) [] = { 0xfffffffffffffff0,
+							   0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p128_p8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							  0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p128_p16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							   0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p128_f32,poly,64,2) [] = { 0xc1700000c1800000,
+							   0xc1500000c1600000 };
+VECT_VAR_DECL(vreint_expected_q_p128_f16,poly,64,2) [] = { 0xca80cb00cb80cc00,
+							   0xc880c900c980ca00 };
+
+/* Expected results: vreinterpretq_*_p128.  */
+VECT_VAR_DECL(vreint_expected_q_s8_p128,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff,
+							 0xf1, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_s16_p128,int,16,8) [] = { 0xfff0, 0xffff,
+							  0xffff, 0xffff,
+							  0xfff1, 0xffff,
+							  0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_s32_p128,int,32,4) [] = { 0xfffffff0, 0xffffffff,
+							  0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_s64_p128,int,64,2) [] = { 0xfffffffffffffff0,
+							  0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_u8_p128,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							  0xff, 0xff, 0xff, 0xff,
+							  0xf1, 0xff, 0xff, 0xff,
+							  0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_u16_p128,uint,16,8) [] = { 0xfff0, 0xffff,
+							   0xffff, 0xffff,
+							   0xfff1, 0xffff,
+							   0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_u32_p128,uint,32,4) [] = { 0xfffffff0, 0xffffffff,
+							   0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_u64_p128,uint,64,2) [] = { 0xfffffffffffffff0,
+							   0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p8_p128,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							  0xff, 0xff, 0xff, 0xff,
+							  0xf1, 0xff, 0xff, 0xff,
+							  0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_p16_p128,poly,16,8) [] = { 0xfff0, 0xffff,
+							   0xffff, 0xffff,
+							   0xfff1, 0xffff,
+							   0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_p64_p128,uint,64,2) [] = { 0xfffffffffffffff0,
+							   0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_f32_p128,hfloat,32,4) [] = { 0xfffffff0, 0xffffffff,
+							     0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_f16_p128,hfloat,16,8) [] = { 0xfff0, 0xffff,
+							     0xffff, 0xffff,
+							     0xfff1, 0xffff,
+							     0xffff, 0xffff };
+
+int main (void)
+{
+  DECL_VARIABLE_128BITS_VARIANTS(vreint_vector);
+  DECL_VARIABLE(vreint_vector, poly, 64, 2);
+  DECL_VARIABLE_128BITS_VARIANTS(vreint_vector_res);
+  DECL_VARIABLE(vreint_vector_res, poly, 64, 2);
+
+  clean_results ();
+
+  TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vreint_vector, buffer);
+  VLOAD(vreint_vector, buffer, q, poly, p, 64, 2);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  VLOAD(vreint_vector, buffer, q, float, f, 16, 8);
+#endif
+  VLOAD(vreint_vector, buffer, q, float, f, 32, 4);
+
+  /* vreinterpretq_p128_* tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VREINTERPRETQ_P128_*"
+
+  /* Since there is no way to store a poly128_t value, convert to
+     poly64x2_t before storing. This means that we are not able to
+     test vreinterpretq_p128* alone, and that errors in
+     vreinterpretq_p64_p128 could compensate for errors in
+     vreinterpretq_p128*.  */
+#define TEST_VREINTERPRET128(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
+  VECT_VAR(vreint_vector_res, poly, 64, 2) =  vreinterpretq_p64_p128(	\
+    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS))); \
+  vst1##Q##_##T2##64(VECT_VAR(result, poly, 64, 2),			\
+                     VECT_VAR(vreint_vector_res, poly, 64, 2));		\
+  CHECK(TEST_MSG, T1, 64, 2, PRIx##64, EXPECTED, "");
+
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 8, 16, vreint_expected_q_p128_s8);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 16, 8, vreint_expected_q_p128_s16);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 32, 4, vreint_expected_q_p128_s32);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, int, s, 64, 2, vreint_expected_q_p128_s64);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, uint, u, 8, 16, vreint_expected_q_p128_u8);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, uint, u, 16, 8, vreint_expected_q_p128_u16);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, uint, u, 32, 4, vreint_expected_q_p128_u32);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, uint, u, 64, 2, vreint_expected_q_p128_u64);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, poly, p, 8, 16, vreint_expected_q_p128_p8);
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, poly, p, 16, 8, vreint_expected_q_p128_p16);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, float, f, 16, 8, vreint_expected_q_p128_f16);
+#endif
+  TEST_VREINTERPRET128(q, poly, p, 128, 1, float, f, 32, 4, vreint_expected_q_p128_f32);
+
+  /* vreinterpretq_*_p128 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VREINTERPRETQ_*_P128"
+
+  /* Since there is no way to load a poly128_t value, load a
+     poly64x2_t and convert it to poly128_t. This means that we are
+     not able to test vreinterpretq_*_p128 alone, and that errors in
+     vreinterpretq_p128_p64 could compensate for errors in
+     vreinterpretq_*_p128*.  */
+#define TEST_VREINTERPRET_FROM_P128(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
+  VECT_VAR(vreint_vector_res, T1, W, N) =				\
+    vreinterpret##Q##_##T2##W##_##TS2##WS(				\
+  vreinterpretq_p128_p64(VECT_VAR(vreint_vector, TS1, 64, 2)));		\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
+		    VECT_VAR(vreint_vector_res, T1, W, N));		\
+  CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
+
+#define TEST_VREINTERPRET_FP_FROM_P128(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
+  VECT_VAR(vreint_vector_res, T1, W, N) =				\
+    vreinterpret##Q##_##T2##W##_##TS2##WS(				\
+  vreinterpretq_p128_p64(VECT_VAR(vreint_vector, TS1, 64, 2)));		\
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
+		    VECT_VAR(vreint_vector_res, T1, W, N));		\
+  CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
+
+  TEST_VREINTERPRET_FROM_P128(q, int, s, 8, 16, poly, p, 128, 1, vreint_expected_q_s8_p128);
+  TEST_VREINTERPRET_FROM_P128(q, int, s, 16, 8, poly, p, 128, 1, vreint_expected_q_s16_p128);
+  TEST_VREINTERPRET_FROM_P128(q, int, s, 32, 4, poly, p, 128, 1, vreint_expected_q_s32_p128);
+  TEST_VREINTERPRET_FROM_P128(q, int, s, 64, 2, poly, p, 128, 1, vreint_expected_q_s64_p128);
+  TEST_VREINTERPRET_FROM_P128(q, uint, u, 8, 16, poly, p, 128, 1, vreint_expected_q_u8_p128);
+  TEST_VREINTERPRET_FROM_P128(q, uint, u, 16, 8, poly, p, 128, 1, vreint_expected_q_u16_p128);
+  TEST_VREINTERPRET_FROM_P128(q, uint, u, 32, 4, poly, p, 128, 1, vreint_expected_q_u32_p128);
+  TEST_VREINTERPRET_FROM_P128(q, uint, u, 64, 2, poly, p, 128, 1, vreint_expected_q_u64_p128);
+  TEST_VREINTERPRET_FROM_P128(q, poly, p, 8, 16, poly, p, 128, 1, vreint_expected_q_p8_p128);
+  TEST_VREINTERPRET_FROM_P128(q, poly, p, 16, 8, poly, p, 128, 1, vreint_expected_q_p16_p128);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET_FP_FROM_P128(q, float, f, 16, 8, poly, p, 128, 1, vreint_expected_q_f16_p128);
+#endif
+  TEST_VREINTERPRET_FP_FROM_P128(q, float, f, 32, 4, poly, p, 128, 1, vreint_expected_q_f32_p128);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
new file mode 100644
index 00000000000..1d8cf9aa69f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c
@@ -0,0 +1,212 @@
+/* This file contains tests for the vreinterpret *p64 intrinsics.  */
+
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-add-options arm_crypto } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results: vreinterpret_p64_*.  */
+VECT_VAR_DECL(vreint_expected_p64_s8,poly,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
+VECT_VAR_DECL(vreint_expected_p64_s16,poly,64,1) [] = { 0xfff3fff2fff1fff0 };
+VECT_VAR_DECL(vreint_expected_p64_s32,poly,64,1) [] = { 0xfffffff1fffffff0 };
+VECT_VAR_DECL(vreint_expected_p64_s64,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vreint_expected_p64_u8,poly,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
+VECT_VAR_DECL(vreint_expected_p64_u16,poly,64,1) [] = { 0xfff3fff2fff1fff0 };
+VECT_VAR_DECL(vreint_expected_p64_u32,poly,64,1) [] = { 0xfffffff1fffffff0 };
+VECT_VAR_DECL(vreint_expected_p64_u64,poly,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vreint_expected_p64_p8,poly,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
+VECT_VAR_DECL(vreint_expected_p64_p16,poly,64,1) [] = { 0xfff3fff2fff1fff0 };
+VECT_VAR_DECL(vreint_expected_p64_f32,poly,64,1) [] = { 0xc1700000c1800000 };
+VECT_VAR_DECL(vreint_expected_p64_f16,poly,64,1) [] = { 0xca80cb00cb80cc00 };
+
+/* Expected results: vreinterpretq_p64_*.  */
+VECT_VAR_DECL(vreint_expected_q_p64_s8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							 0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p64_s16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							  0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p64_s32,poly,64,2) [] = { 0xfffffff1fffffff0,
+							  0xfffffff3fffffff2 };
+VECT_VAR_DECL(vreint_expected_q_p64_s64,poly,64,2) [] = { 0xfffffffffffffff0,
+							  0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p64_u8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							 0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p64_u16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							  0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p64_u32,poly,64,2) [] = { 0xfffffff1fffffff0,
+							  0xfffffff3fffffff2 };
+VECT_VAR_DECL(vreint_expected_q_p64_u64,poly,64,2) [] = { 0xfffffffffffffff0,
+							  0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p64_p8,poly,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
+							 0xfffefdfcfbfaf9f8 };
+VECT_VAR_DECL(vreint_expected_q_p64_p16,poly,64,2) [] = { 0xfff3fff2fff1fff0,
+							  0xfff7fff6fff5fff4 };
+VECT_VAR_DECL(vreint_expected_q_p64_f32,poly,64,2) [] = { 0xc1700000c1800000,
+							  0xc1500000c1600000 };
+VECT_VAR_DECL(vreint_expected_q_p64_f16,poly,64,2) [] = { 0xca80cb00cb80cc00,
+							  0xc880c900c980ca00 };
+
+/* Expected results: vreinterpret_*_p64.  */
+VECT_VAR_DECL(vreint_expected_s8_p64,int,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
+						     0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_s16_p64,int,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_s32_p64,int,32,2) [] = { 0xfffffff0, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_s64_p64,int,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vreint_expected_u8_p64,uint,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
+						      0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_u16_p64,uint,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_u32_p64,uint,32,2) [] = { 0xfffffff0, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_u64_p64,uint,64,1) [] = { 0xfffffffffffffff0 };
+VECT_VAR_DECL(vreint_expected_p8_p64,poly,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
+						      0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_p16_p64,poly,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_f32_p64,hfloat,32,2) [] = { 0xfffffff0, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_f16_p64,hfloat,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
+
+/* Expected results: vreinterpretq_*_p64.  */
+VECT_VAR_DECL(vreint_expected_q_s8_p64,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							0xff, 0xff, 0xff, 0xff,
+							0xf1, 0xff, 0xff, 0xff,
+							0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_s16_p64,int,16,8) [] = { 0xfff0, 0xffff,
+							 0xffff, 0xffff,
+							 0xfff1, 0xffff,
+							 0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_s32_p64,int,32,4) [] = { 0xfffffff0, 0xffffffff,
+							 0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_s64_p64,int,64,2) [] = { 0xfffffffffffffff0,
+							 0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_u8_p64,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff,
+							 0xf1, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_u16_p64,uint,16,8) [] = { 0xfff0, 0xffff,
+							  0xffff, 0xffff,
+							  0xfff1, 0xffff,
+							  0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_u32_p64,uint,32,4) [] = { 0xfffffff0, 0xffffffff,
+							  0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_u64_p64,uint,64,2) [] = { 0xfffffffffffffff0,
+							  0xfffffffffffffff1 };
+VECT_VAR_DECL(vreint_expected_q_p8_p64,poly,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff,
+							 0xf1, 0xff, 0xff, 0xff,
+							 0xff, 0xff, 0xff, 0xff };
+VECT_VAR_DECL(vreint_expected_q_p16_p64,poly,16,8) [] = { 0xfff0, 0xffff,
+							  0xffff, 0xffff,
+							  0xfff1, 0xffff,
+							  0xffff, 0xffff };
+VECT_VAR_DECL(vreint_expected_q_f32_p64,hfloat,32,4) [] = { 0xfffffff0, 0xffffffff,
+							    0xfffffff1, 0xffffffff };
+VECT_VAR_DECL(vreint_expected_q_f16_p64,hfloat,16,8) [] = { 0xfff0, 0xffff,
+							    0xffff, 0xffff,
+							    0xfff1, 0xffff,
+							    0xffff, 0xffff };
+
+int main (void)
+{
+#define TEST_VREINTERPRET(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED)	\
+  VECT_VAR(vreint_vector_res, T1, W, N) =				\
+    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
+		    VECT_VAR(vreint_vector_res, T1, W, N));		\
+  CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
+
+#define TEST_VREINTERPRET_FP(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
+  VECT_VAR(vreint_vector_res, T1, W, N) =				\
+    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vreint_vector, TS1, WS, NS)); \
+  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
+		    VECT_VAR(vreint_vector_res, T1, W, N));		\
+  CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
+
+  DECL_VARIABLE_ALL_VARIANTS(vreint_vector);
+  DECL_VARIABLE(vreint_vector, poly, 64, 1);
+  DECL_VARIABLE(vreint_vector, poly, 64, 2);
+  DECL_VARIABLE_ALL_VARIANTS(vreint_vector_res);
+  DECL_VARIABLE(vreint_vector_res, poly, 64, 1);
+  DECL_VARIABLE(vreint_vector_res, poly, 64, 2);
+
+  clean_results ();
+
+  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vreint_vector, buffer);
+  VLOAD(vreint_vector, buffer, , poly, p, 64, 1);
+  VLOAD(vreint_vector, buffer, q, poly, p, 64, 2);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  VLOAD(vreint_vector, buffer, , float, f, 16, 4);
+  VLOAD(vreint_vector, buffer, q, float, f, 16, 8);
+#endif
+  VLOAD(vreint_vector, buffer, , float, f, 32, 2);
+  VLOAD(vreint_vector, buffer, q, float, f, 32, 4);
+
+  /* vreinterpret_p64_* tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VREINTERPRET_P64_*"
+  TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 8, 8, vreint_expected_p64_s8);
+  TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 16, 4, vreint_expected_p64_s16);
+  TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 32, 2, vreint_expected_p64_s32);
+  TEST_VREINTERPRET(, poly, p, 64, 1, int, s, 64, 1, vreint_expected_p64_s64);
+  TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 8, 8, vreint_expected_p64_u8);
+  TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 16, 4, vreint_expected_p64_u16);
+  TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 32, 2, vreint_expected_p64_u32);
+  TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 64, 1, vreint_expected_p64_u64);
+  TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 8, 8, vreint_expected_p64_p8);
+  TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 16, 4, vreint_expected_p64_p16);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 16, 4, vreint_expected_p64_f16);
+#endif
+  TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 32, 2, vreint_expected_p64_f32);
+
+  /* vreinterpretq_p64_* tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VREINTERPRETQ_P64_*"
+  TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 8, 16, vreint_expected_q_p64_s8);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 16, 8, vreint_expected_q_p64_s16);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 32, 4, vreint_expected_q_p64_s32);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, int, s, 64, 2, vreint_expected_q_p64_s64);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 8, 16, vreint_expected_q_p64_u8);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 16, 8, vreint_expected_q_p64_u16);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 32, 4, vreint_expected_q_p64_u32);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 64, 2, vreint_expected_q_p64_u64);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 8, 16, vreint_expected_q_p64_p8);
+  TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 16, 8, vreint_expected_q_p64_p16);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 16, 8, vreint_expected_q_p64_f16);
+#endif
+  TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 32, 4, vreint_expected_q_p64_f32);
+
+  /* vreinterpret_*_p64 tests.  */
+#undef TEST_MSG
+#define TEST_MSG "VREINTERPRET_*_P64"
+
+  TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 64, 1, vreint_expected_s8_p64);
+  TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 64, 1, vreint_expected_s16_p64);
+  TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 64, 1, vreint_expected_s32_p64);
+  TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 64, 1, vreint_expected_s64_p64);
+  TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 64, 1, vreint_expected_u8_p64);
+  TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 64, 1, vreint_expected_u16_p64);
+  TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 64, 1, vreint_expected_u32_p64);
+  TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 64, 1, vreint_expected_u64_p64);
+  TEST_VREINTERPRET(, poly, p, 8, 8, poly, p, 64, 1, vreint_expected_p8_p64);
+  TEST_VREINTERPRET(, poly, p, 16, 4, poly, p, 64, 1, vreint_expected_p16_p64);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET_FP(, float, f, 16, 4, poly, p, 64, 1, vreint_expected_f16_p64);
+#endif
+  TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 64, 1, vreint_expected_f32_p64);
+  TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 64, 2, vreint_expected_q_s8_p64);
+  TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 64, 2, vreint_expected_q_s16_p64);
+  TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 64, 2, vreint_expected_q_s32_p64);
+  TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 64, 2, vreint_expected_q_s64_p64);
+  TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 64, 2, vreint_expected_q_u8_p64);
+  TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 64, 2, vreint_expected_q_u16_p64);
+  TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 64, 2, vreint_expected_q_u32_p64);
+  TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 64, 2, vreint_expected_q_u64_p64);
+  TEST_VREINTERPRET(q, poly, p, 8, 16, poly, p, 64, 2, vreint_expected_q_p8_p64);
+  TEST_VREINTERPRET(q, poly, p, 16, 8, poly, p, 64, 2, vreint_expected_q_p16_p64);
+#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+  TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 64, 2, vreint_expected_q_f16_p64);
+#endif
+  TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 64, 2, vreint_expected_q_f32_p64);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
new file mode 100644
index 00000000000..d97a3a25ee5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrnd
+#define TEST_MSG "VRND"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc
new file mode 100644
index 00000000000..629240d3a23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndX.inc
@@ -0,0 +1,43 @@
+#define FNNAME1(NAME) exec_ ## NAME
+#define FNNAME(NAME) FNNAME1 (NAME)
+
+void FNNAME (INSN) (void)
+{
+  /* vector_res = vrndX (vector), then store the result.  */
+#define TEST_VRND2(INSN, Q, T1, T2, W, N)				\
+  VECT_VAR (vector_res, T1, W, N) =					\
+    INSN##Q##_##T2##W (VECT_VAR (vector, T1, W, N));			\
+    vst1##Q##_##T2##W (VECT_VAR (result, T1, W, N),			\
+		       VECT_VAR (vector_res, T1, W, N))
+
+  /* Two auxliary macros are necessary to expand INSN.  */
+#define TEST_VRND1(INSN, Q, T1, T2, W, N)	\
+  TEST_VRND2 (INSN, Q, T1, T2, W, N)
+
+#define TEST_VRND(Q, T1, T2, W, N)		\
+  TEST_VRND1 (INSN, Q, T1, T2, W, N)
+
+  DECL_VARIABLE (vector, float, 32, 2);
+  DECL_VARIABLE (vector, float, 32, 4);
+
+  DECL_VARIABLE (vector_res, float, 32, 2);
+  DECL_VARIABLE (vector_res, float, 32, 4);
+
+  clean_results ();
+
+  VLOAD (vector, buffer, , float, f, 32, 2);
+  VLOAD (vector, buffer, q, float, f, 32, 4);
+
+  TEST_VRND ( , float, f, 32, 2);
+  TEST_VRND (q, float, f, 32, 4);
+
+  CHECK_FP (TEST_MSG, float, 32, 2, PRIx32, expected, "");
+  CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected, "");
+}
+
+int
+main (void)
+{
+  FNNAME (INSN) ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
new file mode 100644
index 00000000000..ff2bdc0563f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnda.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrnda
+#define TEST_MSG "VRNDA"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
new file mode 100644
index 00000000000..eae9f61c585
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndm.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrndm
+#define TEST_MSG "VRNDM"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
new file mode 100644
index 00000000000..c6c707d6765
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndn.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrndn
+#define TEST_MSG "VRNDN"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
new file mode 100644
index 00000000000..e94eb6b7622
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndp.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrndp
+#define TEST_MSG "VRNDP"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
new file mode 100644
index 00000000000..0d2a63ef26c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndx.c
@@ -0,0 +1,16 @@
+/* { dg-require-effective-target arm_v8_neon_hw } */
+/* { dg-add-options arm_v8_neon } */
+
+#include <arm_neon.h>
+#include "arm-neon-ref.h"
+#include "compute-ref-data.h"
+
+/* Expected results.  */
+VECT_VAR_DECL (expected, hfloat, 32, 2) [] = { 0xc1800000, 0xc1700000 };
+VECT_VAR_DECL (expected, hfloat, 32, 4) [] = { 0xc1800000, 0xc1700000,
+					       0xc1600000, 0xc1500000 };
+
+#define INSN vrndx
+#define TEST_MSG "VRNDX"
+
+#include "vrndX.inc"
diff --git a/gcc/testsuite/gcc.target/aarch64/ands_3.c b/gcc/testsuite/gcc.target/aarch64/ands_3.c
new file mode 100644
index 00000000000..42cb7f0f0bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ands_3.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+f9 (unsigned char x, int y)
+{
+  if (y > 1 && x == 0)
+    return 10;
+  return x;
+}
+
+/* { dg-final { scan-assembler "ands\t(x|w)\[0-9\]+,\[ \t\]*(x|w)\[0-9\]+,\[ \t\]*255" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
new file mode 100644
index 00000000000..ac6ffdcf8de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-ce1" } */
+
+/* Check that the inner if is transformed into CSELs.  */
+
+int
+foo (int *x, int *z, int a)
+{
+  int b = 0;
+  int c = 0;
+  int d = 0;
+  int i;
+
+  for (i = 0; i < a; i++)
+    {
+      if (x[i] < c)
+	{
+	  b = z[i];
+	  if (c < b)
+	    {
+	      c = b;
+	      d = i;
+	    }
+	}
+    }
+
+  return c + d;
+}
+
+/* { dg-final { scan-rtl-dump "if-conversion succeeded through noce_convert_multiple_sets" "ce1" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_1.c b/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_1.c
new file mode 100644
index 00000000000..a70f92100fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/ldp_stp_unaligned_1.c
@@ -0,0 +1,20 @@
+/* { dg-options "-O2" } */
+
+/* Check that we can use a REG + IMM addressing mode when moving an unaligned
+   TImode value to and from memory.  */
+
+struct foo
+{
+  long long b;
+  __int128 a;
+} __attribute__ ((packed));
+
+void
+bar (struct foo *p, struct foo *q)
+{
+  p->a = q->a;
+}
+
+/* { dg-final { scan-assembler-not "add\tx\[0-9\]+, x\[0-9\]+" } } */
+/* { dg-final { scan-assembler-times "ldp\tx\[0-9\]+, x\[0-9\], .*8" 1 } } */
+/* { dg-final { scan-assembler-times "stp\tx\[0-9\]+, x\[0-9\], .*8" 1 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr37780_1.c b/gcc/testsuite/gcc.target/aarch64/pr37780_1.c
new file mode 100644
index 00000000000..97027e7479c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr37780_1.c
@@ -0,0 +1,46 @@
+/* Test that we can remove the conditional move due to CLZ
+   and CTZ being defined at zero.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+fooctz (int i)
+{
+  return (i == 0) ? 32 : __builtin_ctz (i);
+}
+
+int
+fooctz2 (int i)
+{
+  return (i != 0) ? __builtin_ctz (i) : 32;
+}
+
+unsigned int
+fooctz3 (unsigned int i)
+{
+  return (i > 0) ?  __builtin_ctz (i) : 32;
+}
+
+/* { dg-final { scan-assembler-times "rbit\t*" 3 } } */
+
+int
+fooclz (int i)
+{
+  return (i == 0) ? 32 : __builtin_clz (i);
+}
+
+int
+fooclz2 (int i)
+{
+  return (i != 0) ? __builtin_clz (i) : 32;
+}
+
+unsigned int
+fooclz3 (unsigned int i)
+{
+  return (i > 0) ? __builtin_clz (i) : 32;
+}
+
+/* { dg-final { scan-assembler-times "clz\t" 6 } } */
+/* { dg-final { scan-assembler-not "cmp\t.*0" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr63874.c b/gcc/testsuite/gcc.target/aarch64/pr63874.c
new file mode 100644
index 00000000000..1a745a038a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr63874.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-skip-if "Not applicable for mcmodel=large" { aarch64*-*-* }  { "-mcmodel=large" } { "" } } */
+
+extern void __attribute__((weak)) foo_weakref (void);
+void __attribute__((weak, noinline)) bar (void)
+{
+ return;
+}
+void (*f) (void);
+void (*g) (void);
+
+int
+main (void)
+{
+ f = &foo_weakref;
+ g = &bar;
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not "adr*foo_weakref" } } */
+/* { dg-final { scan-assembler-not "\\.(word|xword)\tbar" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pr70809_1.c b/gcc/testsuite/gcc.target/aarch64/pr70809_1.c
new file mode 100644
index 00000000000..df88c71c42a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr70809_1.c
@@ -0,0 +1,18 @@
+/* PR target/70809.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -ffp-contract=off -mtune=xgene1" } */
+
+/* Check that vector FMLS is not generated when contraction is disabled.  */
+
+void
+foo (float *__restrict__ __attribute__ ((aligned (16))) a,
+     float *__restrict__ __attribute__ ((aligned (16))) x,
+     float *__restrict__ __attribute__ ((aligned (16))) y,
+     float *__restrict__ __attribute__ ((aligned (16))) z)
+{
+  unsigned i = 0;
+  for (i = 0; i < 256; i++)
+    a[i] = x[i] - (y[i] * z[i]);
+}
+
+/* { dg-final { scan-assembler-not "fmls\tv.*" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c
new file mode 100644
index 00000000000..192bad9879b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c
@@ -0,0 +1,127 @@
+/* Test the `v[min|max]{nm}{q}_f*' AArch64 SIMD intrinsic.  */
+
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#include "arm_neon.h"
+
+extern void abort ();
+
+#define CHECK(T, N, R, E) \
+  {\
+    int i = 0;\
+    for (; i < N; i++)\
+      if (* (T *) &R[i] != * (T *) &E[i])\
+	abort ();\
+  }
+
+int
+main (int argc, char **argv)
+{
+  /* v{min|max}nm_f32 normal.  */
+  float32x2_t f32x2_input1 = vdup_n_f32 (-1.0);
+  float32x2_t f32x2_input2 = vdup_n_f32 (0.0);
+  float32x2_t f32x2_exp_minnm  = vdup_n_f32 (-1.0);
+  float32x2_t f32x2_exp_maxnm  = vdup_n_f32 (0.0);
+  float32x2_t f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
+  float32x2_t f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
+
+  CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm);
+  CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm);
+
+  /* v{min|max}nm_f32 NaN.  */
+  f32x2_input1 = vdup_n_f32 (__builtin_nanf (""));
+  f32x2_input2 = vdup_n_f32 (1.0);
+  f32x2_exp_minnm  = vdup_n_f32 (1.0);
+  f32x2_exp_maxnm  = vdup_n_f32 (1.0);
+  f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
+  f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
+
+  CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm);
+  CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm);
+
+  /* v{min|max}nmq_f32 normal.  */
+  float32x4_t f32x4_input1 = vdupq_n_f32 (-1024.0);
+  float32x4_t f32x4_input2 = vdupq_n_f32 (77.0);
+  float32x4_t f32x4_exp_minnm  = vdupq_n_f32 (-1024.0);
+  float32x4_t f32x4_exp_maxnm  = vdupq_n_f32 (77.0);
+  float32x4_t f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
+  float32x4_t f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
+
+  CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm);
+  CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm);
+
+  /* v{min|max}nmq_f32 NaN.  */
+  f32x4_input1 = vdupq_n_f32 (-__builtin_nanf (""));
+  f32x4_input2 = vdupq_n_f32 (-1.0);
+  f32x4_exp_minnm  = vdupq_n_f32 (-1.0);
+  f32x4_exp_maxnm  = vdupq_n_f32 (-1.0);
+  f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
+  f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
+
+  CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm);
+  CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm);
+
+  /* v{min|max}nm_f64 normal.  */
+  float64x1_t f64x1_input1 = vdup_n_f64 (1.23);
+  float64x1_t f64x1_input2 = vdup_n_f64 (4.56);
+  float64x1_t f64x1_exp_minnm  = vdup_n_f64 (1.23);
+  float64x1_t f64x1_exp_maxnm  = vdup_n_f64 (4.56);
+  float64x1_t f64x1_ret_minnm  = vminnm_f64 (f64x1_input1, f64x1_input2);
+  float64x1_t f64x1_ret_maxnm  = vmaxnm_f64 (f64x1_input1, f64x1_input2);
+  CHECK (uint64_t, 1, f64x1_ret_minnm, f64x1_exp_minnm);
+  CHECK (uint64_t, 1, f64x1_ret_maxnm, f64x1_exp_maxnm);
+
+  /* v{min|max}_f64 normal.  */
+  float64x1_t f64x1_exp_min  = vdup_n_f64 (1.23);
+  float64x1_t f64x1_exp_max  = vdup_n_f64 (4.56);
+  float64x1_t f64x1_ret_min  = vmin_f64 (f64x1_input1, f64x1_input2);
+  float64x1_t f64x1_ret_max  = vmax_f64 (f64x1_input1, f64x1_input2);
+  CHECK (uint64_t, 1, f64x1_ret_min, f64x1_exp_min);
+  CHECK (uint64_t, 1, f64x1_ret_max, f64x1_exp_max);
+
+  /* v{min|max}nmq_f64 normal.  */
+  float64x2_t f64x2_input1 = vdupq_n_f64 (1.23);
+  float64x2_t f64x2_input2 = vdupq_n_f64 (4.56);
+  float64x2_t f64x2_exp_minnm  = vdupq_n_f64 (1.23);
+  float64x2_t f64x2_exp_maxnm  = vdupq_n_f64 (4.56);
+  float64x2_t f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
+  float64x2_t f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
+  CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm);
+  CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm);
+
+  /* v{min|max}nm_f64 NaN.  */
+  f64x1_input1 = vdup_n_f64 (-__builtin_nanf (""));
+  f64x1_input2 = vdup_n_f64 (1.0);
+  f64x1_exp_minnm  = vdup_n_f64 (1.0);
+  f64x1_exp_maxnm  = vdup_n_f64 (1.0);
+  f64x1_ret_minnm  = vminnm_f64 (f64x1_input1, f64x1_input2);
+  f64x1_ret_maxnm  = vmaxnm_f64 (f64x1_input1, f64x1_input2);
+
+  CHECK (uint64_t, 1, f64x1_ret_minnm, f64x1_exp_minnm);
+  CHECK (uint64_t, 1, f64x1_ret_maxnm, f64x1_exp_maxnm);
+
+  /* v{min|max}_f64 NaN.  */
+  f64x1_input1 = vdup_n_f64 (-__builtin_nanf (""));
+  f64x1_input2 = vdup_n_f64 (1.0);
+  f64x1_exp_minnm  = vdup_n_f64 (-__builtin_nanf (""));
+  f64x1_exp_maxnm  = vdup_n_f64 (-__builtin_nanf (""));
+  f64x1_ret_minnm  = vmin_f64 (f64x1_input1, f64x1_input2);
+  f64x1_ret_maxnm  = vmax_f64 (f64x1_input1, f64x1_input2);
+
+  CHECK (uint64_t, 1, f64x1_ret_minnm, f64x1_exp_minnm);
+  CHECK (uint64_t, 1, f64x1_ret_maxnm, f64x1_exp_maxnm);
+
+  /* v{min|max}nmq_f64 NaN.  */
+  f64x2_input1 = vdupq_n_f64 (-__builtin_nan (""));
+  f64x2_input2 = vdupq_n_f64 (1.0);
+  f64x2_exp_minnm  = vdupq_n_f64 (1.0);
+  f64x2_exp_maxnm  = vdupq_n_f64 (1.0);
+  f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
+  f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
+
+  CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm);
+  CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vmul_elem_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vmul_elem_1.c
new file mode 100644
index 00000000000..a1faefd88ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vmul_elem_1.c
@@ -0,0 +1,541 @@
+/* Test the vmul_n_f64 AArch64 SIMD intrinsic.  */
+
+/* { dg-do run } */
+/* { dg-options "-O2 --save-temps" } */
+
+#include "arm_neon.h"
+
+extern void abort (void);
+
+#define A (132.4f)
+#define B (-0.0f)
+#define C (-34.8f)
+#define D (289.34f)
+float32_t expected2_1[2] = {A * A, B * A};
+float32_t expected2_2[2] = {A * B, B * B};
+float32_t expected4_1[4] = {A * A, B * A, C * A, D * A};
+float32_t expected4_2[4] = {A * B, B * B, C * B, D * B};
+float32_t expected4_3[4] = {A * C, B * C, C * C, D * C};
+float32_t expected4_4[4] = {A * D, B * D, C * D, D * D};
+float32_t _elemA = A;
+float32_t _elemB = B;
+float32_t _elemC = C;
+float32_t _elemD = D;
+
+#define AD (1234.5)
+#define BD (-0.0)
+#define CD (71.3)
+#define DD (-1024.4)
+float64_t expectedd2_1[2] = {AD * CD, BD * CD};
+float64_t expectedd2_2[2] = {AD * DD, BD * DD};
+float64_t _elemdC = CD;
+float64_t _elemdD = DD;
+
+
+#define AS (1024)
+#define BS (-31)
+#define CS (0)
+#define DS (655)
+int32_t expecteds2_1[2] = {AS * AS, BS * AS};
+int32_t expecteds2_2[2] = {AS * BS, BS * BS};
+int32_t expecteds4_1[4] = {AS * AS, BS * AS, CS * AS, DS * AS};
+int32_t expecteds4_2[4] = {AS * BS, BS * BS, CS * BS, DS * BS};
+int32_t expecteds4_3[4] = {AS * CS, BS * CS, CS * CS, DS * CS};
+int32_t expecteds4_4[4] = {AS * DS, BS * DS, CS * DS, DS * DS};
+int32_t _elemsA = AS;
+int32_t _elemsB = BS;
+int32_t _elemsC = CS;
+int32_t _elemsD = DS;
+
+#define AH ((int16_t) 0)
+#define BH ((int16_t) -32)
+#define CH ((int16_t) 102)
+#define DH ((int16_t) -51)
+#define EH ((int16_t) 71)
+#define FH ((int16_t) -91)
+#define GH ((int16_t) 48)
+#define HH ((int16_t) 255)
+int16_t expectedh4_1[4] = {AH * AH, BH * AH, CH * AH, DH * AH};
+int16_t expectedh4_2[4] = {AH * BH, BH * BH, CH * BH, DH * BH};
+int16_t expectedh4_3[4] = {AH * CH, BH * CH, CH * CH, DH * CH};
+int16_t expectedh4_4[4] = {AH * DH, BH * DH, CH * DH, DH * DH};
+int16_t expectedh8_1[8] = {AH * AH, BH * AH, CH * AH, DH * AH,
+			   EH * AH, FH * AH, GH * AH, HH * AH};
+int16_t expectedh8_2[8] = {AH * BH, BH * BH, CH * BH, DH * BH,
+			   EH * BH, FH * BH, GH * BH, HH * BH};
+int16_t expectedh8_3[8] = {AH * CH, BH * CH, CH * CH, DH * CH,
+			   EH * CH, FH * CH, GH * CH, HH * CH};
+int16_t expectedh8_4[8] = {AH * DH, BH * DH, CH * DH, DH * DH,
+			   EH * DH, FH * DH, GH * DH, HH * DH};
+int16_t expectedh8_5[8] = {AH * EH, BH * EH, CH * EH, DH * EH,
+			   EH * EH, FH * EH, GH * EH, HH * EH};
+int16_t expectedh8_6[8] = {AH * FH, BH * FH, CH * FH, DH * FH,
+			   EH * FH, FH * FH, GH * FH, HH * FH};
+int16_t expectedh8_7[8] = {AH * GH, BH * GH, CH * GH, DH * GH,
+			   EH * GH, FH * GH, GH * GH, HH * GH};
+int16_t expectedh8_8[8] = {AH * HH, BH * HH, CH * HH, DH * HH,
+			   EH * HH, FH * HH, GH * HH, HH * HH};
+int16_t _elemhA = AH;
+int16_t _elemhB = BH;
+int16_t _elemhC = CH;
+int16_t _elemhD = DH;
+int16_t _elemhE = EH;
+int16_t _elemhF = FH;
+int16_t _elemhG = GH;
+int16_t _elemhH = HH;
+
+#define AUS (1024)
+#define BUS (31)
+#define CUS (0)
+#define DUS (655)
+uint32_t expectedus2_1[2] = {AUS * AUS, BUS * AUS};
+uint32_t expectedus2_2[2] = {AUS * BUS, BUS * BUS};
+uint32_t expectedus4_1[4] = {AUS * AUS, BUS * AUS, CUS * AUS, DUS * AUS};
+uint32_t expectedus4_2[4] = {AUS * BUS, BUS * BUS, CUS * BUS, DUS * BUS};
+uint32_t expectedus4_3[4] = {AUS * CUS, BUS * CUS, CUS * CUS, DUS * CUS};
+uint32_t expectedus4_4[4] = {AUS * DUS, BUS * DUS, CUS * DUS, DUS * DUS};
+uint32_t _elemusA = AUS;
+uint32_t _elemusB = BUS;
+uint32_t _elemusC = CUS;
+uint32_t _elemusD = DUS;
+
+#define AUH ((uint16_t) 0)
+#define BUH ((uint16_t) 32)
+#define CUH ((uint16_t) 102)
+#define DUH ((uint16_t) 51)
+#define EUH ((uint16_t) 71)
+#define FUH ((uint16_t) 91)
+#define GUH ((uint16_t) 48)
+#define HUH ((uint16_t) 255)
+uint16_t expecteduh4_1[4] = {AUH * AUH, BUH * AUH, CUH * AUH, DUH * AUH};
+uint16_t expecteduh4_2[4] = {AUH * BUH, BUH * BUH, CUH * BUH, DUH * BUH};
+uint16_t expecteduh4_3[4] = {AUH * CUH, BUH * CUH, CUH * CUH, DUH * CUH};
+uint16_t expecteduh4_4[4] = {AUH * DUH, BUH * DUH, CUH * DUH, DUH * DUH};
+uint16_t expecteduh8_1[8] = {AUH * AUH, BUH * AUH, CUH * AUH, DUH * AUH,
+			     EUH * AUH, FUH * AUH, GUH * AUH, HUH * AUH};
+uint16_t expecteduh8_2[8] = {AUH * BUH, BUH * BUH, CUH * BUH, DUH * BUH,
+			     EUH * BUH, FUH * BUH, GUH * BUH, HUH * BUH};
+uint16_t expecteduh8_3[8] = {AUH * CUH, BUH * CUH, CUH * CUH, DUH * CUH,
+			     EUH * CUH, FUH * CUH, GUH * CUH, HUH * CUH};
+uint16_t expecteduh8_4[8] = {AUH * DUH, BUH * DUH, CUH * DUH, DUH * DUH,
+			     EUH * DUH, FUH * DUH, GUH * DUH, HUH * DUH};
+uint16_t expecteduh8_5[8] = {AUH * EUH, BUH * EUH, CUH * EUH, DUH * EUH,
+			     EUH * EUH, FUH * EUH, GUH * EUH, HUH * EUH};
+uint16_t expecteduh8_6[8] = {AUH * FUH, BUH * FUH, CUH * FUH, DUH * FUH,
+			     EUH * FUH, FUH * FUH, GUH * FUH, HUH * FUH};
+uint16_t expecteduh8_7[8] = {AUH * GUH, BUH * GUH, CUH * GUH, DUH * GUH,
+			     EUH * GUH, FUH * GUH, GUH * GUH, HUH * GUH};
+uint16_t expecteduh8_8[8] = {AUH * HUH, BUH * HUH, CUH * HUH, DUH * HUH,
+			     EUH * HUH, FUH * HUH, GUH * HUH, HUH * HUH};
+uint16_t _elemuhA = AUH;
+uint16_t _elemuhB = BUH;
+uint16_t _elemuhC = CUH;
+uint16_t _elemuhD = DUH;
+uint16_t _elemuhE = EUH;
+uint16_t _elemuhF = FUH;
+uint16_t _elemuhG = GUH;
+uint16_t _elemuhH = HUH;
+
+void
+check_v2sf (float32_t elemA, float32_t elemB)
+{
+  int32_t indx;
+  const float32_t vec32x2_buf[2] = {A, B};
+  float32x2_t vec32x2_src = vld1_f32 (vec32x2_buf);
+  float32_t vec32x2_res[2];
+
+  vst1_f32 (vec32x2_res, vmul_n_f32 (vec32x2_src, elemA));
+
+  for (indx = 0; indx < 2; indx++)
+    if (* (uint32_t *) &vec32x2_res[indx] != * (uint32_t *) &expected2_1[indx])
+      abort ();
+
+  vst1_f32 (vec32x2_res, vmul_n_f32 (vec32x2_src, elemB));
+
+  for (indx = 0; indx < 2; indx++)
+    if (* (uint32_t *) &vec32x2_res[indx] != * (uint32_t *) &expected2_2[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "fmul\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.s\\\[0\\\]" 2 } } */
+}
+
+void
+check_v4sf (float32_t elemA, float32_t elemB, float32_t elemC, float32_t elemD)
+{
+  int32_t indx;
+  const float32_t vec32x4_buf[4] = {A, B, C, D};
+  float32x4_t vec32x4_src = vld1q_f32 (vec32x4_buf);
+  float32_t vec32x4_res[4];
+
+  vst1q_f32 (vec32x4_res, vmulq_n_f32 (vec32x4_src, elemA));
+
+  for (indx = 0; indx < 4; indx++)
+    if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_1[indx])
+      abort ();
+
+  vst1q_f32 (vec32x4_res, vmulq_n_f32 (vec32x4_src, elemB));
+
+  for (indx = 0; indx < 4; indx++)
+    if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_2[indx])
+      abort ();
+
+  vst1q_f32 (vec32x4_res, vmulq_n_f32 (vec32x4_src, elemC));
+
+  for (indx = 0; indx < 4; indx++)
+    if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_3[indx])
+      abort ();
+
+  vst1q_f32 (vec32x4_res, vmulq_n_f32 (vec32x4_src, elemD));
+
+  for (indx = 0; indx < 4; indx++)
+    if (* (uint32_t *) &vec32x4_res[indx] != * (uint32_t *) &expected4_4[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "fmul\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.s\\\[0\\\]" 4 } } */
+}
+
+void
+check_v2df (float64_t elemdC, float64_t elemdD)
+{
+  int32_t indx;
+  const float64_t vec64x2_buf[2] = {AD, BD};
+  float64x2_t vec64x2_src = vld1q_f64 (vec64x2_buf);
+  float64_t vec64x2_res[2];
+
+  vst1q_f64 (vec64x2_res, vmulq_n_f64 (vec64x2_src, elemdC));
+
+  for (indx = 0; indx < 2; indx++)
+    if (* (uint64_t *) &vec64x2_res[indx] != * (uint64_t *) &expectedd2_1[indx])
+      abort ();
+
+  vst1q_f64 (vec64x2_res, vmulq_n_f64 (vec64x2_src, elemdD));
+
+  for (indx = 0; indx < 2; indx++)
+    if (* (uint64_t *) &vec64x2_res[indx] != * (uint64_t *) &expectedd2_2[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "fmul\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.d\\\[0\\\]" 2 } } */
+}
+
+void
+check_v2si (int32_t elemsA, int32_t elemsB)
+{
+  int32_t indx;
+  const int32_t vecs32x2_buf[2] = {AS, BS};
+  int32x2_t vecs32x2_src = vld1_s32 (vecs32x2_buf);
+  int32_t vecs32x2_res[2];
+
+  vst1_s32 (vecs32x2_res, vmul_n_s32 (vecs32x2_src, elemsA));
+
+  for (indx = 0; indx < 2; indx++)
+    if (vecs32x2_res[indx] != expecteds2_1[indx])
+      abort ();
+
+  vst1_s32 (vecs32x2_res, vmul_n_s32 (vecs32x2_src, elemsB));
+
+  for (indx = 0; indx < 2; indx++)
+    if (vecs32x2_res[indx] != expecteds2_2[indx])
+      abort ();
+}
+
+void
+check_v2si_unsigned (uint32_t elemusA, uint32_t elemusB)
+{
+  int indx;
+  const uint32_t vecus32x2_buf[2] = {AUS, BUS};
+  uint32x2_t vecus32x2_src = vld1_u32 (vecus32x2_buf);
+  uint32_t vecus32x2_res[2];
+
+  vst1_u32 (vecus32x2_res, vmul_n_u32 (vecus32x2_src, elemusA));
+
+  for (indx = 0; indx < 2; indx++)
+    if (vecus32x2_res[indx] != expectedus2_1[indx])
+      abort ();
+
+  vst1_u32 (vecus32x2_res, vmul_n_u32 (vecus32x2_src, elemusB));
+
+  for (indx = 0; indx < 2; indx++)
+    if (vecus32x2_res[indx] != expectedus2_2[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "\tmul\tv\[0-9\]+\.2s, v\[0-9\]+\.2s, v\[0-9\]+\.s\\\[0\\\]" 4 } } */
+}
+
+void
+check_v4si (int32_t elemsA, int32_t elemsB, int32_t elemsC, int32_t elemsD)
+{
+  int32_t indx;
+  const int32_t vecs32x4_buf[4] = {AS, BS, CS, DS};
+  int32x4_t vecs32x4_src = vld1q_s32 (vecs32x4_buf);
+  int32_t vecs32x4_res[4];
+
+  vst1q_s32 (vecs32x4_res, vmulq_n_s32 (vecs32x4_src, elemsA));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecs32x4_res[indx] != expecteds4_1[indx])
+      abort ();
+
+  vst1q_s32 (vecs32x4_res, vmulq_n_s32 (vecs32x4_src, elemsB));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecs32x4_res[indx] != expecteds4_2[indx])
+      abort ();
+
+  vst1q_s32 (vecs32x4_res, vmulq_n_s32 (vecs32x4_src, elemsC));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecs32x4_res[indx] != expecteds4_3[indx])
+      abort ();
+
+  vst1q_s32 (vecs32x4_res, vmulq_n_s32 (vecs32x4_src, elemsD));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecs32x4_res[indx] != expecteds4_4[indx])
+      abort ();
+}
+
+void
+check_v4si_unsigned (uint32_t elemusA, uint32_t elemusB, uint32_t elemusC,
+		     uint32_t elemusD)
+{
+  int indx;
+  const uint32_t vecus32x4_buf[4] = {AUS, BUS, CUS, DUS};
+  uint32x4_t vecus32x4_src = vld1q_u32 (vecus32x4_buf);
+  uint32_t vecus32x4_res[4];
+
+  vst1q_u32 (vecus32x4_res, vmulq_n_u32 (vecus32x4_src, elemusA));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecus32x4_res[indx] != expectedus4_1[indx])
+      abort ();
+
+  vst1q_u32 (vecus32x4_res, vmulq_n_u32 (vecus32x4_src, elemusB));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecus32x4_res[indx] != expectedus4_2[indx])
+      abort ();
+
+  vst1q_u32 (vecus32x4_res, vmulq_n_u32 (vecus32x4_src, elemusC));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecus32x4_res[indx] != expectedus4_3[indx])
+      abort ();
+
+  vst1q_u32 (vecus32x4_res, vmulq_n_u32 (vecus32x4_src, elemusD));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecus32x4_res[indx] != expectedus4_4[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "\tmul\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.s\\\[0\\\]" 8 } } */
+}
+
+
+void
+check_v4hi (int16_t elemhA, int16_t elemhB, int16_t elemhC, int16_t elemhD)
+{
+  int32_t indx;
+  const int16_t vech16x4_buf[4] = {AH, BH, CH, DH};
+  int16x4_t vech16x4_src = vld1_s16 (vech16x4_buf);
+  int16_t vech16x4_res[4];
+
+  vst1_s16 (vech16x4_res, vmul_n_s16 (vech16x4_src, elemhA));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vech16x4_res[indx] != expectedh4_1[indx])
+      abort ();
+
+  vst1_s16 (vech16x4_res, vmul_n_s16 (vech16x4_src, elemhB));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vech16x4_res[indx] != expectedh4_2[indx])
+      abort ();
+
+  vst1_s16 (vech16x4_res, vmul_n_s16 (vech16x4_src, elemhC));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vech16x4_res[indx] != expectedh4_3[indx])
+      abort ();
+
+  vst1_s16 (vech16x4_res, vmul_n_s16 (vech16x4_src, elemhD));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vech16x4_res[indx] != expectedh4_4[indx])
+      abort ();
+}
+
+void
+check_v4hi_unsigned (uint16_t elemuhA, uint16_t elemuhB, uint16_t elemuhC,
+		     uint16_t elemuhD)
+{
+  int indx;
+  const uint16_t vecuh16x4_buf[4] = {AUH, BUH, CUH, DUH};
+  uint16x4_t vecuh16x4_src = vld1_u16 (vecuh16x4_buf);
+  uint16_t vecuh16x4_res[4];
+
+  vst1_u16 (vecuh16x4_res, vmul_n_u16 (vecuh16x4_src, elemuhA));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecuh16x4_res[indx] != expecteduh4_1[indx])
+      abort ();
+
+  vst1_u16 (vecuh16x4_res, vmul_n_u16 (vecuh16x4_src, elemuhB));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecuh16x4_res[indx] != expecteduh4_2[indx])
+      abort ();
+
+  vst1_u16 (vecuh16x4_res, vmul_n_u16 (vecuh16x4_src, elemuhC));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecuh16x4_res[indx] != expecteduh4_3[indx])
+      abort ();
+
+  vst1_u16 (vecuh16x4_res, vmul_n_u16 (vecuh16x4_src, elemuhD));
+
+  for (indx = 0; indx < 4; indx++)
+    if (vecuh16x4_res[indx] != expecteduh4_4[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "mul\tv\[0-9\]+\.4h, v\[0-9\]+\.4h, v\[0-9\]+\.h\\\[0\\\]" 8 } } */
+}
+
+void
+check_v8hi (int16_t elemhA, int16_t elemhB, int16_t elemhC, int16_t elemhD,
+	    int16_t elemhE, int16_t elemhF, int16_t elemhG, int16_t elemhH)
+{
+  int32_t indx;
+  const int16_t vech16x8_buf[8] = {AH, BH, CH, DH, EH, FH, GH, HH};
+  int16x8_t vech16x8_src = vld1q_s16 (vech16x8_buf);
+  int16_t vech16x8_res[8];
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhA));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_1[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhB));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_2[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhC));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_3[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhD));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_4[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhE));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_5[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhF));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_6[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhG));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_7[indx])
+      abort ();
+
+  vst1q_s16 (vech16x8_res, vmulq_n_s16 (vech16x8_src, elemhH));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vech16x8_res[indx] != expectedh8_8[indx])
+      abort ();
+}
+
+void
+check_v8hi_unsigned (uint16_t elemuhA, uint16_t elemuhB, uint16_t elemuhC,
+		     uint16_t elemuhD, uint16_t elemuhE, uint16_t elemuhF,
+		     uint16_t elemuhG, uint16_t elemuhH)
+{
+  int indx;
+  const uint16_t vecuh16x8_buf[8] = {AUH, BUH, CUH, DUH, EUH, FUH, GUH, HUH};
+  uint16x8_t vecuh16x8_src = vld1q_u16 (vecuh16x8_buf);
+  uint16_t vecuh16x8_res[8];
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhA));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_1[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhB));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_2[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhC));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_3[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhD));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_4[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhE));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_5[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhF));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_6[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhG));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_7[indx])
+      abort ();
+
+  vst1q_u16 (vecuh16x8_res, vmulq_n_u16 (vecuh16x8_src, elemuhH));
+
+  for (indx = 0; indx < 8; indx++)
+    if (vecuh16x8_res[indx] != expecteduh8_8[indx])
+      abort ();
+
+/* { dg-final { scan-assembler-times "mul\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.h\\\[0\\\]" 16 } } */
+}
+
+int
+main (void)
+{
+  check_v2sf (_elemA, _elemB);
+  check_v4sf (_elemA, _elemB, _elemC, _elemD);
+  check_v2df (_elemdC, _elemdD);
+  check_v2si (_elemsA, _elemsB);
+  check_v4si (_elemsA, _elemsB, _elemsC, _elemsD);
+  check_v4hi (_elemhA, _elemhB, _elemhC, _elemhD);
+  check_v8hi (_elemhA, _elemhB, _elemhC, _elemhD,
+	      _elemhE, _elemhF, _elemhG, _elemhH);
+  check_v2si_unsigned (_elemusA, _elemusB);
+  check_v4si_unsigned (_elemusA, _elemusB, _elemusC, _elemusD);
+  check_v4hi_unsigned (_elemuhA, _elemuhB, _elemuhC, _elemuhD);
+  check_v8hi_unsigned (_elemuhA, _elemuhB, _elemuhC, _elemuhD,
+		       _elemuhE, _elemuhF, _elemuhG, _elemuhH);
+
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/aarch64/struct_return.c b/gcc/testsuite/gcc.target/aarch64/struct_return.c
new file mode 100644
index 00000000000..6d90b7e5953
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/struct_return.c
@@ -0,0 +1,31 @@
+/* Test the absence of a spurious move from x8 to x0 for functions
+   return structures.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+struct s
+{
+  long x;
+  long y;
+  long z;
+};
+
+struct s __attribute__((noinline))
+foo (long a, long d, long c)
+{
+  struct s b;
+  b.x = a;
+  b.y = d;
+  b.z = c;
+  return b;
+}
+
+int
+main (void)
+{
+  struct s x;
+  x = foo ( 10, 20, 30);
+  return x.x + x.y + x.z;
+}
+
+/* { dg-final { scan-assembler-not "mov\tx0, x8" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/test_frame_16.c b/gcc/testsuite/gcc.target/aarch64/test_frame_16.c
new file mode 100644
index 00000000000..28f3826adad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/test_frame_16.c
@@ -0,0 +1,25 @@
+/* Verify:
+     * with outgoing.
+     * single int register push.
+     * varargs and callee-save size >= 256
+     * Use 2 stack adjustments.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O2 -fomit-frame-pointer --save-temps" } */
+
+#define REP8(X) X,X,X,X,X,X,X,X
+#define REP64(X) REP8(REP8(X))
+
+void outgoing (__builtin_va_list, ...);
+
+double vararg_outgoing (int x1, ...)
+{
+  double a1 = x1, a2 = x1 * 2, a3 = x1 * 3, a4 = x1 * 4, a5 = x1 * 5, a6 = x1 * 6;
+  __builtin_va_list vl;
+  __builtin_va_start (vl, x1);
+  outgoing (vl, a1, a2, a3, a4, a5, a6, REP64 (1));
+  __builtin_va_end (vl);
+  return a1 + a2 + a3 + a4 + a5 + a6;
+}
+
+/* { dg-final { scan-assembler-times "sub\tsp, sp, #\[0-9\]+" 2 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/thunderxloadpair.c b/gcc/testsuite/gcc.target/aarch64/thunderxloadpair.c
new file mode 100644
index 00000000000..14b1f736093
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/thunderxloadpair.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=thunderx" } */
+
+struct ldp
+{
+  long long c;
+  int a, b;
+};
+
+
+int f(struct ldp *a)
+{
+  return a->a + a->b;
+}
+
+
+/* We know the alignement of a->a to be 8 byte aligned so it is profitable
+   to do ldp. */
+/* { dg-final { scan-assembler-times "ldp\tw\[0-9\]+, w\[0-9\]" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/aarch64/thunderxnoloadpair.c b/gcc/testsuite/gcc.target/aarch64/thunderxnoloadpair.c
new file mode 100644
index 00000000000..3093ad0e1f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/thunderxnoloadpair.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=thunderx" } */
+
+struct noldp
+{
+  int a, b;
+};
+
+
+int f(struct noldp *a)
+{
+  return a->a + a->b;
+}
+
+/* We know the alignement of a->a to be 4 byte aligned so it is not profitable
+   to do ldp. */
+/* { dg-final { scan-assembler-not "ldp\tw\[0-9\]+, w\[0-9\]" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/va_arg_1.c b/gcc/testsuite/gcc.target/aarch64/va_arg_1.c
new file mode 100644
index 00000000000..e8e3cdac513
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/va_arg_1.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+int
+f (int a, ...)
+{
+  /* { dg-final { scan-assembler-not "str" } } */
+  return a;
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/va_arg_2.c b/gcc/testsuite/gcc.target/aarch64/va_arg_2.c
new file mode 100644
index 00000000000..f5c46cbd67f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/va_arg_2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+int
+foo (char *fmt, ...)
+{
+  int d;
+  __builtin_va_list ap;
+
+  __builtin_va_start (ap, fmt);
+  d = __builtin_va_arg (ap, int);
+  __builtin_va_end (ap);
+
+  /* { dg-final { scan-assembler-not "x7" } } */
+  return d;
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/va_arg_3.c b/gcc/testsuite/gcc.target/aarch64/va_arg_3.c
new file mode 100644
index 00000000000..7f7601a8070
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/va_arg_3.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+int d2i (double a);
+
+int
+foo (char *fmt, ...)
+{
+  int d, e;
+  double f, g;
+  __builtin_va_list ap;
+
+  __builtin_va_start (ap, fmt);
+  d = __builtin_va_arg (ap, int);
+  f = __builtin_va_arg (ap, double);
+  g = __builtin_va_arg (ap, double);
+  d += d2i (f);
+  d += d2i (g);
+  __builtin_va_end (ap);
+
+  /* { dg-final { scan-assembler-not "x7" } } */
+  /* { dg-final { scan-assembler-not "q7" } } */
+  return d;
+}
+
+/* { dg-final { cleanup-saved-temps } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c
new file mode 100644
index 00000000000..e144def8386
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c
@@ -0,0 +1,86 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "arm_neon.h"
+
+#define BUILD_TEST(TYPE1, TYPE2, Q1, Q2, SUFFIX, INDEX1, INDEX2)	\
+TYPE1 __attribute__((noinline,noclone))					\
+test_copy##Q1##_lane##Q2##_##SUFFIX (TYPE1 a, TYPE2 b)			\
+{									\
+  return vcopy##Q1##_lane##Q2##_##SUFFIX (a, INDEX1, b, INDEX2);	\
+}
+
+/* vcopy_lane.  */
+BUILD_TEST (poly8x8_t, poly8x8_t, , , p8, 7, 6)
+BUILD_TEST (int8x8_t,  int8x8_t,  , , s8, 7, 6)
+BUILD_TEST (uint8x8_t, uint8x8_t, , , u8, 7, 6)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[6\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x4_t, , , p16, 3, 2)
+BUILD_TEST (int16x4_t,  int16x4_t,  , , s16, 3, 2)
+BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[2\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0)
+BUILD_TEST (int32x2_t,   int32x2_t,   , , s32, 1, 0)
+BUILD_TEST (uint32x2_t,  uint32x2_t,  , , u32, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */
+BUILD_TEST (int64x1_t,   int64x1_t,   , , s64, 0, 0)
+BUILD_TEST (uint64x1_t,  uint64x1_t,  , , u64, 0, 0)
+BUILD_TEST (float64x1_t, float64x1_t, , , f64, 0, 0)
+/* { dg-final { scan-assembler-times "fmov\\td0, d1" 3 } } */
+
+/* vcopy_laneq.  */
+
+BUILD_TEST (poly8x8_t, poly8x16_t, , q, p8, 7, 15)
+BUILD_TEST (int8x8_t,  int8x16_t,  , q, s8, 7, 15)
+BUILD_TEST (uint8x8_t, uint8x16_t, , q, u8, 7, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x8_t, , q, p16, 3, 7)
+BUILD_TEST (int16x4_t,  int16x8_t,  , q, s16, 3, 7)
+BUILD_TEST (uint16x4_t, uint16x8_t, , q, u16, 3, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x4_t, , q, f32, 1, 3)
+BUILD_TEST (int32x2_t,   int32x4_t,   , q, s32, 1, 3)
+BUILD_TEST (uint32x2_t,  uint32x4_t,  , q, u32, 1, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x1_t, float64x2_t, , q, f64, 0, 1)
+BUILD_TEST (int64x1_t,  int64x2_t,    , q, s64, 0, 1)
+BUILD_TEST (uint64x1_t, uint64x2_t,   , q, u64, 0, 1)
+/* XFAIL due to PR 71307.  */
+/* { dg-final { scan-assembler-times "dup\\td0, v1.d\\\[1\\\]" 3 { xfail *-*-* } } } */
+
+/* vcopyq_lane.  */
+BUILD_TEST (poly8x16_t, poly8x8_t, q, , p8, 15, 7)
+BUILD_TEST (int8x16_t,  int8x8_t,  q, , s8, 15, 7)
+BUILD_TEST (uint8x16_t, uint8x8_t, q, , u8, 15, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[15\\\], v1.b\\\[7\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x4_t, q, , p16, 7, 3)
+BUILD_TEST (int16x8_t,  int16x4_t,  q, , s16, 7, 3)
+BUILD_TEST (uint16x8_t, uint16x4_t, q, , u16, 7, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[7\\\], v1.h\\\[3\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x2_t, q, , f32, 3, 1)
+BUILD_TEST (int32x4_t,   int32x2_t,   q, , s32, 3, 1)
+BUILD_TEST (uint32x4_t,  uint32x2_t,  q, , u32, 3, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[3\\\], v1.s\\\[1\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x1_t, q, , f64, 1, 0)
+BUILD_TEST (int64x2_t,   int64x1_t,   q, , s64, 1, 0)
+BUILD_TEST (uint64x2_t,  uint64x1_t,  q, , u64, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[0\\\]" 3 } } */
+
+/* vcopyq_laneq.  */
+
+BUILD_TEST (poly8x16_t, poly8x16_t, q, q, p8, 14, 15)
+BUILD_TEST (int8x16_t,  int8x16_t,  q, q, s8, 14, 15)
+BUILD_TEST (uint8x16_t, uint8x16_t, q, q, u8, 14, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[14\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x8_t, q, q, p16, 6, 7)
+BUILD_TEST (int16x8_t,  int16x8_t,  q, q, s16, 6, 7)
+BUILD_TEST (uint16x8_t, uint16x8_t, q, q, u16, 6, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[6\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x4_t, q, q, f32, 2, 3)
+BUILD_TEST (int32x4_t,   int32x4_t,   q, q, s32, 2, 3)
+BUILD_TEST (uint32x4_t,  uint32x4_t,  q, q, u32, 2, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[2\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x2_t, q, q, f64, 1, 1)
+BUILD_TEST (int64x2_t,   int64x2_t,   q,  q, s64, 1, 1)
+BUILD_TEST (uint64x2_t,  uint64x2_t,  q, q, u64, 1, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[1\\\]" 3 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c
new file mode 100644
index 00000000000..07a77de3192
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c
@@ -0,0 +1,72 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "arm_neon.h"
+
+#define BUILD_TEST(TYPE1, TYPE2, Q1, Q2, SUFFIX, INDEX1, INDEX2)	\
+TYPE1 __attribute__((noinline,noclone))				\
+test_copy##Q1##_lane##Q2##_##SUFFIX (TYPE1 a, TYPE2 b)			\
+{									\
+  return vset##Q1##_lane_##SUFFIX (vget##Q2##_lane_##SUFFIX (b, INDEX2),\
+				    a, INDEX1);				\
+}
+
+BUILD_TEST (poly8x8_t, poly8x8_t, , , p8, 7, 6)
+BUILD_TEST (int8x8_t,  int8x8_t,  , , s8, 7, 6)
+BUILD_TEST (uint8x8_t, uint8x8_t, , , u8, 7, 6)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[6\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x4_t, , , p16, 3, 2)
+BUILD_TEST (int16x4_t,  int16x4_t,  , , s16, 3, 2)
+BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[2\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0)
+BUILD_TEST (int32x2_t,   int32x2_t,   , , s32, 1, 0)
+BUILD_TEST (uint32x2_t,  uint32x2_t,  , , u32, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */
+
+BUILD_TEST (poly8x8_t, poly8x16_t, , q, p8, 7, 15)
+BUILD_TEST (int8x8_t,  int8x16_t,  , q, s8, 7, 15)
+BUILD_TEST (uint8x8_t, uint8x16_t, , q, u8, 7, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x8_t, , q, p16, 3, 7)
+BUILD_TEST (int16x4_t,  int16x8_t,  , q, s16, 3, 7)
+BUILD_TEST (uint16x4_t, uint16x8_t, , q, u16, 3, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x4_t, , q, f32, 1, 3)
+BUILD_TEST (int32x2_t,   int32x4_t,   , q, s32, 1, 3)
+BUILD_TEST (uint32x2_t,  uint32x4_t,  , q, u32, 1, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[3\\\]" 3 } } */
+
+BUILD_TEST (poly8x16_t, poly8x8_t, q, , p8, 15, 7)
+BUILD_TEST (int8x16_t,  int8x8_t,  q, , s8, 15, 7)
+BUILD_TEST (uint8x16_t, uint8x8_t, q, , u8, 15, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[15\\\], v1.b\\\[7\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x4_t, q, , p16, 7, 3)
+BUILD_TEST (int16x8_t,  int16x4_t,  q, , s16, 7, 3)
+BUILD_TEST (uint16x8_t, uint16x4_t, q, , u16, 7, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[7\\\], v1.h\\\[3\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x2_t, q, , f32, 3, 1)
+BUILD_TEST (int32x4_t,   int32x2_t,   q, , s32, 3, 1)
+BUILD_TEST (uint32x4_t,  uint32x2_t,  q, , u32, 3, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[3\\\], v1.s\\\[1\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x1_t, q, , f64, 1, 0)
+BUILD_TEST (int64x2_t,   int64x1_t,   q, , s64, 1, 0)
+BUILD_TEST (uint64x2_t,  uint64x1_t,  q, , u64, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[0\\\]" 3 } } */
+
+BUILD_TEST (poly8x16_t, poly8x16_t, q, q, p8, 14, 15)
+BUILD_TEST (int8x16_t,  int8x16_t,  q, q, s8, 14, 15)
+BUILD_TEST (uint8x16_t, uint8x16_t, q, q, u8, 14, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[14\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x8_t, q, q, p16, 6, 7)
+BUILD_TEST (int16x8_t,  int16x8_t,  q, q, s16, 6, 7)
+BUILD_TEST (uint16x8_t, uint16x8_t, q, q, u16, 6, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[6\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x4_t, q, q, f32, 2, 3)
+BUILD_TEST (int32x4_t,   int32x4_t,   q, q, s32, 2, 3)
+BUILD_TEST (uint32x4_t,  uint32x4_t,  q, q, u32, 2, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[2\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x2_t, q, q, f64, 1, 1)
+BUILD_TEST (int64x2_t,   int64x2_t,   q,  q, s64, 1, 1)
+BUILD_TEST (uint64x2_t,  uint64x2_t,  q, q, u64, 1, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[1\\\]" 3 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vminmaxnm.c b/gcc/testsuite/gcc.target/aarch64/vminmaxnm.c
new file mode 100644
index 00000000000..bdaa5649971
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vminmaxnm.c
@@ -0,0 +1,37 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "arm_neon.h"
+
+/* For each of these intrinsics, we map directly to an unspec in RTL.
+   We're just using the argument directly and returning the result, so we
+   can precisely specify the exact instruction pattern and register
+   allocations we expect.  */
+
+float64x1_t
+test_vmaxnm_f64 (float64x1_t a, float64x1_t b)
+{
+  /* { dg-final { scan-assembler-times "fmaxnm\td0, d0, d1" 1 } } */
+  return vmaxnm_f64 (a, b);
+}
+
+float64x1_t
+test_vminnm_f64 (float64x1_t a, float64x1_t b)
+{
+  /* { dg-final { scan-assembler-times "fminnm\td0, d0, d1" 1 } } */
+  return vminnm_f64 (a, b);
+}
+
+float64x1_t
+test_vmax_f64 (float64x1_t a, float64x1_t b)
+{
+  /* { dg-final { scan-assembler-times "fmax\td0, d0, d1" 1 } } */
+  return vmax_f64 (a, b);
+}
+
+float64x1_t
+test_vmin_f64 (float64x1_t a, float64x1_t b)
+{
+  /* { dg-final { scan-assembler-times "fmin\td0, d0, d1" 1 } } */
+  return vmin_f64 (a, b);
+}
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
new file mode 100644
index 00000000000..788079bc104
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
@@ -0,0 +1,32 @@
+/* Test AAPCS layout (VFP variant for Neon types) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
+/* { dg-add-options arm_neon_fp16 } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define NEON
+#define TESTFILE "neon-vect10.c"
+#include "neon-constants.h"
+
+#include "abitest.h"
+#else
+
+ARG (int32x4_t, i32x4_constvec2, Q0) /* D0, D1.  */
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 3.0f, S4 + 2) /* D2, Q1.  */
+#else
+ARG (__fp16, 3.0f, S4) /* D2, Q1.  */
+#endif
+ARG (int32x4x2_t, i32x4x2_constvec1, Q2) /* Q2, Q3 - D4-D6 , s5-s12.  */
+ARG (double, 12.0, D3) /* Backfill this particular argument.  */
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 5.0f, S5 + 2) /* Backfill in S5.  */
+#else
+ARG (__fp16, 5.0f, S5) /* Backfill in S5.  */
+#endif
+ARG (int32x4x2_t, i32x4x2_constvec2, STACK)
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
new file mode 100644
index 00000000000..b42fdd23926
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
@@ -0,0 +1,24 @@
+/* Test AAPCS layout (VFP variant for Neon types) */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
+/* { dg-add-options arm_neon_fp16 } */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define NEON
+#define TESTFILE "neon-vect9.c"
+#include "neon-constants.h"
+
+#include "abitest.h"
+#else
+
+ARG (int32x4_t, i32x4_constvec2, Q0) /* D0, D1.  */
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 3.0f, S4 + 2) /* D2, Q1 occupied.  */
+#else
+ARG (__fp16, 3.0f, S4) /* D2, Q1 occupied.  */
+#endif
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
new file mode 100644
index 00000000000..0745a82f5e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
@@ -0,0 +1,28 @@
+/* Test AAPCS layout (VFP variant)  */
+
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp18.c"
+#include "abitest.h"
+
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S0 + 2)
+#else
+ARG (__fp16, 1.0f, S0)
+#endif
+ARG (float, 2.0f, S1)
+ARG (double, 4.0, D1)
+ARG (float, 2.0f, S4)
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S5 + 2)
+#else
+ARG (__fp16, 1.0f, S5)
+#endif
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
new file mode 100644
index 00000000000..950c1f6a6d4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
@@ -0,0 +1,30 @@
+/* Test AAPCS layout (VFP variant)  */
+
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp19.c"
+
+__complex__ x = 1.0+2.0i;
+
+#include "abitest.h"
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, S0 + 2)
+#else
+ARG (__fp16, 1.0f, S0)
+#endif
+ARG (float, 2.0f, S1)
+ARG (__complex__ double, x, D1)
+ARG (float, 3.0f, S6)
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 2.0f, S7 + 2)
+#else
+ARG (__fp16, 2.0f, S7)
+#endif
+LAST_ARG (int, 3, R0)
+#endif
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
new file mode 100644
index 00000000000..f898d4cebd7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
@@ -0,0 +1,22 @@
+/* Test AAPCS layout (VFP variant)  */
+
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp20.c"
+
+#define PCSATTR __attribute__((pcs("aapcs")))
+
+#include "abitest.h"
+#else
+ARG (float, 1.0f, R0)
+ARG (double, 2.0, R2)
+ARG (float, 3.0f, STACK)
+ARG (__fp16, 2.0f, STACK+4)
+LAST_ARG (double, 4.0, STACK+8)
+#endif
+
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
new file mode 100644
index 00000000000..48bb59856e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (VFP variant)  */
+
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
+
+#ifndef IN_FRAMEWORK
+#define VFP
+#define TESTFILE "vfp21.c"
+
+#define PCSATTR __attribute__((pcs("aapcs")))
+
+#include "abitest.h"
+#else
+#if defined (__ARM_BIG_ENDIAN)
+ARG (__fp16, 1.0f, R0 + 2)
+#else
+ARG (__fp16, 1.0f, R0)
+#endif
+ARG (double, 2.0, R2)
+ARG (__fp16, 3.0f, STACK)
+ARG (float, 2.0f, STACK+4)
+LAST_ARG (double, 4.0, STACK+8)
+#endif
+
diff --git a/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c
new file mode 100644
index 00000000000..80a00aec978
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c
@@ -0,0 +1,8 @@
+/* { dg-require-effective-target arm_arch_v5_ok } */
+/* { dg-add-options arm_arch_v5 } */
+
+#if __ARM_ARCH_ISA_THUMB
+#error "__ARM_ARCH_ISA_THUMB defined for ARMv5"
+#endif
+
+int foo;
diff --git a/gcc/testsuite/gcc.target/arm/builtin_saddl.c b/gcc/testsuite/gcc.target/arm/builtin_saddl.c
new file mode 100644
index 00000000000..af85594b9d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_saddl.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+long overflow_add (long x, long y)
+{
+  long r;
+
+  int ovr = __builtin_saddl_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "adds" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_saddll.c b/gcc/testsuite/gcc.target/arm/builtin_saddll.c
new file mode 100644
index 00000000000..62fe6eff01f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_saddll.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+long long overflow_add (long long x, long long y)
+{
+  long long r;
+
+  int ovr = __builtin_saddll_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "adds" } } */
+/* { dg-final { scan-assembler "adcs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_ssubl.c b/gcc/testsuite/gcc.target/arm/builtin_ssubl.c
new file mode 100644
index 00000000000..8c5a4c92168
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_ssubl.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+long overflow_sub (long x, long y)
+{
+  long r;
+
+  int ovr = __builtin_ssubl_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "subs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_ssubll.c b/gcc/testsuite/gcc.target/arm/builtin_ssubll.c
new file mode 100644
index 00000000000..2048d7915ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_ssubll.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+long long overflow_sub (long long x, long long y)
+{
+  long long r;
+
+  int ovr = __builtin_ssubll_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "subs" } } */
+/* { dg-final { scan-assembler "sbcs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_uaddl.c b/gcc/testsuite/gcc.target/arm/builtin_uaddl.c
new file mode 100644
index 00000000000..ac25766c157
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_uaddl.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+unsigned long overflow_add (unsigned long x, unsigned long y)
+{
+  unsigned long r;
+
+  int ovr = __builtin_uaddl_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "adds" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_uaddll.c b/gcc/testsuite/gcc.target/arm/builtin_uaddll.c
new file mode 100644
index 00000000000..ec3188e9067
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_uaddll.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+unsigned long long overflow_add (unsigned long long x, unsigned long long y)
+{
+  unsigned long long r;
+
+  int ovr = __builtin_uaddll_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "adds" } } */
+/* { dg-final { scan-assembler "adcs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_usubl.c b/gcc/testsuite/gcc.target/arm/builtin_usubl.c
new file mode 100644
index 00000000000..99782083d45
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_usubl.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+unsigned long overflow_sub (unsigned long x, unsigned long y)
+{
+  unsigned long r;
+
+  int ovr = __builtin_usubl_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "subs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/builtin_usubll.c b/gcc/testsuite/gcc.target/arm/builtin_usubll.c
new file mode 100644
index 00000000000..8d64660a813
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin_usubll.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" }  */
+/* { dg-require-effective-target arm32 } */
+extern void overflow_handler ();
+
+unsigned long long overflow_sub (unsigned long long x, unsigned long long y)
+{
+  unsigned long long r;
+
+  int ovr = __builtin_usubll_overflow (x, y, &r);
+  if (ovr)
+    overflow_handler ();
+
+  return r;
+}
+
+/* { dg-final { scan-assembler "subs" } } */
+/* { dg-final { scan-assembler "sbcs" } } */
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-1.c b/gcc/testsuite/gcc.target/arm/data-rel-1.c
new file mode 100644
index 00000000000..d9d88f2e8db
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/data-rel-1.c
@@ -0,0 +1,12 @@
+/* { dg-options "-fPIC -mno-pic-data-is-text-relative" } */
+/* { dg-final { scan-assembler-not "j-\\(.LPIC"  } } */
+/* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
+/* { dg-final { scan-assembler "j\\(GOT\\)" } } */
+/* { dg-final { scan-assembler "(ldr|mov)\tr\[0-9\]+, \\\[?r9" } } */
+
+static int j;
+
+int *Foo ()
+{
+  return &j;
+}
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-2.c b/gcc/testsuite/gcc.target/arm/data-rel-2.c
new file mode 100644
index 00000000000..6ba47d677a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/data-rel-2.c
@@ -0,0 +1,11 @@
+/* { dg-options "-fPIC -mno-pic-data-is-text-relative -mno-single-pic-base" } */
+/* { dg-final { scan-assembler-not "j-\\(.LPIC"  } } */
+/* { dg-final { scan-assembler "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
+/* { dg-final { scan-assembler "j\\(GOT\\)" } } */
+
+static int j;
+
+int *Foo ()
+{
+  return &j;
+}
diff --git a/gcc/testsuite/gcc.target/arm/data-rel-3.c b/gcc/testsuite/gcc.target/arm/data-rel-3.c
new file mode 100644
index 00000000000..2ce1e6607c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/data-rel-3.c
@@ -0,0 +1,11 @@
+/* { dg-options "-fPIC -mpic-data-is-text-relative" } */
+/* { dg-final { scan-assembler "j-\\(.LPIC"  } } */
+/* { dg-final { scan-assembler-not "_GLOBAL_OFFSET_TABLE_-\\(.LPIC" } } */
+/* { dg-final { scan-assembler-not "j\\(GOT\\)" } } */
+
+static int j;
+
+int *Foo ()
+{
+  return &j;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
new file mode 100644
index 00000000000..9bf3fc07e7f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-O2" }  */
+/* { dg-add-options arm_fp16_ieee } */
+
+/* Test __fp16 arguments and return value in registers (hard-float).  */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+  swap (b, a);
+  return c;
+}
+
+/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } }  */
+/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } }  */
+/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
new file mode 100644
index 00000000000..4753e364a22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile }  */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-mfloat-abi=softfp -O2" }  */
+/* { dg-add-options arm_fp16_ieee } */
+/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
+
+/* Test __fp16 arguments and return value in registers (softfp).  */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+  swap (b, a);
+  return c;
+}
+
+/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } }  */
+/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } }  */
+/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddws16.c b/gcc/testsuite/gcc.target/arm/neon-vaddws16.c
new file mode 100644
index 00000000000..82811343e49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vaddws16.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+
+
+int
+t6 (int len, void * dummy, short * __restrict x)
+{
+  len = len & ~31;
+  int result = 0;
+  __asm volatile ("");
+  for (int i = 0; i < len; i++)
+    result += x[i];
+  return result;
+}
+
+/* { dg-final { scan-assembler "vaddw\.s16" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddws32.c b/gcc/testsuite/gcc.target/arm/neon-vaddws32.c
new file mode 100644
index 00000000000..8c186918012
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vaddws32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+
+int
+t6 (int len, void * dummy, int * __restrict x)
+{
+  len = len & ~31;
+  long long result = 0;
+  __asm volatile ("");
+  for (int i = 0; i < len; i++)
+    result += x[i];
+  return result;
+}
+
+/* { dg-final { scan-assembler "vaddw\.s32" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddwu16.c b/gcc/testsuite/gcc.target/arm/neon-vaddwu16.c
new file mode 100644
index 00000000000..580bb061006
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vaddwu16.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+
+int
+t6 (int len, void * dummy, unsigned short * __restrict x)
+{
+  len = len & ~31;
+  unsigned int result = 0;
+  __asm volatile ("");
+  for (int i = 0; i < len; i++)
+    result += x[i];
+  return result;
+}
+
+/* { dg-final { scan-assembler "vaddw.u16" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddwu32.c b/gcc/testsuite/gcc.target/arm/neon-vaddwu32.c
new file mode 100644
index 00000000000..21b063342dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vaddwu32.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+
+int
+t6 (int len, void * dummy, unsigned int * __restrict x)
+{
+  len = len & ~31;
+  unsigned long long result = 0;
+  __asm volatile ("");
+  for (int i = 0; i < len; i++)
+    result += x[i];
+  return result;
+}
+
+/* { dg-final { scan-assembler "vaddw\.u32" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddwu8.c b/gcc/testsuite/gcc.target/arm/neon-vaddwu8.c
new file mode 100644
index 00000000000..d350ed537e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/neon-vaddwu8.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+
+
+int
+t6 (int len, void * dummy, char * __restrict x)
+{
+  len = len & ~31;
+  unsigned short result = 0;
+  __asm volatile ("");
+  for (int i = 0; i < len; i++)
+    result += x[i];
+  return result;
+}
+
+/* { dg-final { scan-assembler "vaddw\.u8" } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr37780_1.c b/gcc/testsuite/gcc.target/arm/pr37780_1.c
new file mode 100644
index 00000000000..8e069200e9f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr37780_1.c
@@ -0,0 +1,48 @@
+/* Test that we can remove the conditional move due to CLZ
+   being defined at zero.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v6t2_ok } */
+/* { dg-options "-O2" } */
+/* { dg-add-options arm_arch_v6t2 } */
+
+int
+fooctz (int i)
+{
+  return (i == 0) ? 32 : __builtin_ctz (i);
+}
+
+int
+fooctz2 (int i)
+{
+  return (i != 0) ? __builtin_ctz (i) : 32;
+}
+
+unsigned int
+fooctz3 (unsigned int i)
+{
+  return (i > 0) ?  __builtin_ctz (i) : 32;
+}
+
+/* { dg-final { scan-assembler-times "rbit\t*" 3 } } */
+
+int
+fooclz (int i)
+{
+  return (i == 0) ? 32 : __builtin_clz (i);
+}
+
+int
+fooclz2 (int i)
+{
+  return (i != 0) ? __builtin_clz (i) : 32;
+}
+
+unsigned int
+fooclz3 (unsigned int i)
+{
+  return (i > 0) ? __builtin_clz (i) : 32;
+}
+
+/* { dg-final { scan-assembler-times "clz\t" 6 } } */
+/* { dg-final { scan-assembler-not "cmp\t.*0" } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr70830.c b/gcc/testsuite/gcc.target/arm/pr70830.c
new file mode 100644
index 00000000000..cad903b0cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr70830.c
@@ -0,0 +1,14 @@
+/* PR target/70830.  */
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_arm_ok } */
+/* { dg-options "-Os -marm -save-temps" } */
+
+/* This test is not valid when -mthumb.  */
+
+extern void prints (char *);
+
+void __attribute__ ((interrupt ("IRQ"))) dm3730_IRQHandler(void)
+{
+    prints("IRQ" );
+}
+/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, ip, pc}\\^" } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr71056.c b/gcc/testsuite/gcc.target/arm/pr71056.c
new file mode 100644
index 00000000000..136754eb13c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr71056.c
@@ -0,0 +1,32 @@
+/* PR target/71056.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_vfp3_ok } */
+/* { dg-options "-O3 -mfpu=vfpv3" } */
+
+/* Check that compiling for a non-NEON target doesn't try to introduce
+   a NEON vectorized builtin.  */
+
+extern char *buff;
+int f2 ();
+struct T1
+{
+  int reserved[2];
+  unsigned int ip;
+  unsigned short cs;
+  unsigned short rsrv2;
+};
+void
+f3 (const char *p)
+{
+  struct T1 x;
+  __builtin_memcpy (&x, p, sizeof (struct T1));
+  x.reserved[0] = __builtin_bswap32 (x.reserved[0]);
+  x.reserved[1] = __builtin_bswap32 (x.reserved[1]);
+  x.ip = __builtin_bswap32 (x.ip);
+  x.cs = x.cs << 8 | x.cs >> 8;
+  x.rsrv2 = x.rsrv2 << 8 | x.rsrv2 >> 8;
+  if (f2 ())
+    {
+      __builtin_memcpy (buff, "\n", 1);
+    }
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr50739.c b/gcc/testsuite/gcc.target/avr/pr50739.c
new file mode 100644
index 00000000000..a6850b73c3e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr50739.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-fmerge-all-constants" } */
+
+char *ca = "123";
+
+const char a[] __attribute__((__progmem__))= "a";
+const char b[] __attribute__((__progmem__))= "b";
diff --git a/gcc/testsuite/gcc.target/avr/pr71103.c b/gcc/testsuite/gcc.target/avr/pr71103.c
new file mode 100644
index 00000000000..43244d15e97
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71103.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+struct ResponseStruct{                                                                                            
+    unsigned char responseLength;
+    char *response;
+};
+
+static char response[5];
+struct ResponseStruct something(){
+    struct ResponseStruct returnValue;
+    returnValue.responseLength = 5;
+    returnValue.response = response;
+    return returnValue;
+}
+
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-1.c b/gcc/testsuite/gcc.target/avr/pr71151-1.c
new file mode 100644
index 00000000000..615dce86026
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-Os -ffunction-sections -fdata-sections" } */
+
+/* { dg-final { scan-assembler-not ".section	.progmem.gcc_sw_table.foo.str1.1" } } */
+/* { dg-final { scan-assembler ".section	.rodata.foo.str1.1,\"aMS\"" } } */
+
+
+extern void bar(const char*);
+void foo(void)
+{
+  bar("BBBBBBBBBB");
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-2.c b/gcc/testsuite/gcc.target/avr/pr71151-2.c
new file mode 100644
index 00000000000..f745841df8a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-2.c
@@ -0,0 +1,26 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections" } */
+
+/* Make sure jumptables work properly if placed below 64 KB i.e. 2 byte
+   flash address for loading jump table entry, 2 byte entry, after
+   removing the special section placement hook. */
+
+#define SECTION_NAME ".foo"
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-3.c b/gcc/testsuite/gcc.target/avr/pr71151-3.c
new file mode 100644
index 00000000000..a8fa6b63e0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-3.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -mno-relax -fdata-sections -Wl,--section-start=.foo=0x10000" } */
+
+#ifdef __AVR_HAVE_ELPM__
+/* Make sure jumptables work properly if placed above 64 KB and below 128 KB,
+   i.e. 3 byte flash address for loading jump table entry and 2 byte jump table
+   entry, with relaxation disabled, after removing the special section
+   placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega64.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-4.c b/gcc/testsuite/gcc.target/avr/pr71151-4.c
new file mode 100644
index 00000000000..659aff07510
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-4.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x10000" } */
+
+#ifdef __AVR_HAVE_ELPM__
+/* Make sure jumptables work properly if placed above 64 KB and below 128 KB,
+   i.e. 3 byte flash address for loading jump table entry and 2 byte jump
+   table entry, with relaxation enabled, after removing the special section
+   placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega64.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-5.c b/gcc/testsuite/gcc.target/avr/pr71151-5.c
new file mode 100644
index 00000000000..f9b09e82083
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-5.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mno-relax -Wl,--section-start=.foo=0x20000" } */
+
+#ifdef __AVR_3_BYTE_PC__
+/* Make sure jumptables work properly if placed above 128 KB, i.e. 3 byte
+   flash address for loading jump table entry and a jump table entry
+   that is a stub, with relaxation disabled, after removing the special
+   section placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-6.c b/gcc/testsuite/gcc.target/avr/pr71151-6.c
new file mode 100644
index 00000000000..dedeffaa425
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-6.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x20000" } */
+
+#ifdef __AVR_3_BYTE_PC__
+/* Make sure jumptables work properly if placed above 128 KB, i.e. 3 byte
+   flash address for loading jump table entry and a jump table entry
+   that is a stub, with relaxation enabled, after removing the special
+   section placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-7.c b/gcc/testsuite/gcc.target/avr/pr71151-7.c
new file mode 100644
index 00000000000..2a440960301
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-7.c
@@ -0,0 +1,30 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mno-relax -Wl,--section-start=.foo=0x1fffa" } */
+
+#ifdef __AVR_3_BYTE_PC__
+/* Make sure jumptables work properly if placed straddling 128 KB i.e
+   some entries below 128 KB and some above it, with relaxation disabled. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-8.c b/gcc/testsuite/gcc.target/avr/pr71151-8.c
new file mode 100644
index 00000000000..aa3015b0455
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-8.c
@@ -0,0 +1,29 @@
+/* { dg-do run } */
+/* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x1fffa" } */
+
+#ifdef __AVR_3_BYTE_PC__
+/* Make sure jumptables work properly if placed straddling 128 KB i.e
+   some entries below 128 KB and some above it, with relaxation disabled. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort.  */
+#define SECTION_NAME ".text.foo"
+#endif
+
+#include "exit-abort.h"
+#include "pr71151-common.h"
+
+int main()
+{
+	foo(5);
+	if (y != 37)
+		abort();
+
+	foo(0);
+	if (y != 67)
+		abort();
+
+	foo(7);
+	if (y != 98)
+		abort();
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-common.h b/gcc/testsuite/gcc.target/avr/pr71151-common.h
new file mode 100644
index 00000000000..43379be5d2c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr71151-common.h
@@ -0,0 +1,27 @@
+volatile char y;
+volatile char g;
+
+__attribute__((section(SECTION_NAME)))
+void foo(char x) 
+{
+	switch (x)
+	{
+		case 0:
+			y = 67; break;
+		case 1:
+			y = 20; break;
+		case 2:
+			y = 109; break;
+		case 3:
+			y = 33; break;
+		case 4:
+			y = 44; break;
+		case 5:
+			y = 37; break;
+		case 6:
+			y = 10; break;
+		case 7:
+			y = 98; break;
+	}
+	y = y + g;
+}
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c
new file mode 100644
index 00000000000..480ad05acab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c
@@ -0,0 +1,118 @@
+/* Use -g0 so that this test case doesn't just fail because
+   of PR52472.  */
+
+/* { dg-do compile } */
+/* { dg-options "-std=gnu99 -g0" } */
+
+struct S12
+{
+  char c;
+  const char *p;
+};
+
+struct S12f
+{
+  char c;
+  struct S12f (*f)(void);
+};
+
+struct S12labl
+{
+  char c;
+  void **labl;
+};
+
+struct S121
+{
+  char c;
+  const char *p;
+  char d;
+};
+
+const char str[5] = "abcd";
+
+struct S12 test_S12_0 (void)
+{
+  struct S12 s;
+  s.c = 'A';
+  s.p = str;
+  return s;
+}
+
+struct S12 test_S12_4 (void)
+{
+  struct S12 s;
+  s.c = 'A';
+  s.p = str + 4;
+  return s;
+}
+
+struct S12f test_S12f (void)
+{
+  struct S12f s;
+  s.c = 'A';
+  s.f = test_S12f;
+  return s;
+}
+
+struct S121 test_S121 (void)
+{
+  struct S121 s;
+  s.c = 'c';
+  s.p = str + 4;
+  s.d = 'd';
+  return s;
+}
+
+extern void use_S12lab (struct S12labl*);
+
+struct S12labl test_S12lab (void)
+{
+  struct S12labl s;
+labl:;
+  s.c = 'A';
+  s.labl = &&labl;
+  return s;
+}
+
+#ifdef __MEMX
+
+struct S13
+{
+  char c;
+  const __memx char *p;
+};
+
+const __memx char str_x[] = "abcd";
+
+struct S13 test_S13_0 (void)
+{
+  struct S13 s;
+  s.c = 'A';
+  s.p = str_x;
+  return s;
+}
+
+struct S13 test_S13_4a (void)
+{
+  struct S13 s;
+  s.c = 'A';
+  s.p = str_x + 4;
+  return s;
+}
+
+#ifdef __FLASH1
+
+const __flash1 char str_1[] = "abcd";
+
+struct S13 test_13_4b (void)
+{
+  struct S13 s;
+  s.c = 'A';
+  s.p = str_1 + 4;
+  return s;
+}
+
+#endif /* have __flash1 */
+#endif /* have __memx */
+
diff --git a/gcc/testsuite/gcc.target/i386/avx-pr71559.c b/gcc/testsuite/gcc.target/i386/avx-pr71559.c
new file mode 100644
index 00000000000..af16d56d785
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx-pr71559.c
@@ -0,0 +1,8 @@
+/* PR target/71559 */
+/* { dg-do run { target avx } } */
+/* { dg-options "-O2 -ftree-vectorize -mavx" } */
+
+#include "avx-check.h"
+#define PR71559_TEST avx_test
+
+#include "sse2-pr71559.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c
new file mode 100644
index 00000000000..fc48b1572b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  double r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = ceil (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != ceil (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c
new file mode 100644
index 00000000000..bf8af064cfe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-ceil-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c
new file mode 100644
index 00000000000..c6d53d89fc6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) ceilf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) ceilf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c
new file mode 100644
index 00000000000..80e594dbfa4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-ceilf-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c
new file mode 100644
index 00000000000..4788825fc3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  float r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = ceilf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != ceilf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c
new file mode 100644
index 00000000000..95a79e29d12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-ceilf-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c
new file mode 100644
index 00000000000..b7cbed005dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  double r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = floor (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != floor (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c
new file mode 100644
index 00000000000..0d401f78d63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-floor-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c
new file mode 100644
index 00000000000..6a25f438a8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) floorf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) floorf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c
new file mode 100644
index 00000000000..f4bfec5385e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-floorf-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c
new file mode 100644
index 00000000000..69fc73d78ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  float r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = floorf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != floorf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c
new file mode 100644
index 00000000000..90c6c0fade5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-floorf-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
new file mode 100644
index 00000000000..d78d86ac2f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c
@@ -0,0 +1,8 @@
+/* PR target/71559 */
+/* { dg-do run { target avx512f } } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-check.h"
+#define PR71559_TEST avx512f_test
+
+#include "sse2-pr71559.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c
new file mode 100644
index 00000000000..8e1745aa13a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) rint (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) rint (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c
new file mode 100644
index 00000000000..c3f78ac3f25
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-rint-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vcvtpd2dq\[^\n\]+ymm\[0-9\](?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vinserti64x4\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c
new file mode 100644
index 00000000000..ac3e9a25973
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) rintf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) rintf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c
new file mode 100644
index 00000000000..c172e61f84a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-rintf-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vcvtps2dq\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c
new file mode 100644
index 00000000000..61bea578e18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) round (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) round (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c
new file mode 100644
index 00000000000..5982c65d1e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-round-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vcvttpd2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 2 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c
new file mode 100644
index 00000000000..c5ec9e7ec00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  int r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = (int) roundf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != (int) roundf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c
new file mode 100644
index 00000000000..0d8abb892d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-roundf-sfix-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c
new file mode 100644
index 00000000000..dfb93d72324
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (double *src)
+{
+  int i, sign = 1;
+  double f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  double a[NUM];
+  double r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = trunc (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != trunc (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c
new file mode 100644
index 00000000000..e8ec0227653
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-trunc-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c
new file mode 100644
index 00000000000..db13e712829
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-skip-if "no M_PI" { vxworks_kernel } } */
+
+#define __NO_MATH_INLINES
+#include <math.h>
+#include "avx512f-check.h"
+
+#define NUM 64
+
+static void
+__attribute__((__target__("fpmath=sse")))
+init_src (float *src)
+{
+  int i, sign = 1;
+  float f = rand ();
+
+  for (i = 0; i < NUM; i++)
+    {
+      src[i] = (i + 1) * f * M_PI * sign;
+      if (i < (NUM / 2))
+	{
+          if ((i % 6) == 0)
+	    f = f * src[i];
+        }
+      else if (i == (NUM / 2))
+	f = rand ();
+      else if ((i % 6) == 0)
+	f = 1 / (f * (i + 1) * src[i] * M_PI * sign);
+      sign = -sign;
+    }
+}
+
+static void
+__attribute__((__target__("fpmath=387")))
+avx512f_test (void)
+{
+  float a[NUM];
+  float r[NUM];
+  int i;
+
+  init_src (a);
+
+  for (i = 0; i < NUM; i++)
+    r[i] = truncf (a[i]);
+
+  /* check results:  */
+  for (i = 0; i < NUM; i++)
+    if (r[i] != truncf (a[i]))
+      abort();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c
new file mode 100644
index 00000000000..ae542d8276b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */
+
+#include "avx512f-truncf-vec-1.c"
+
+/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/fabsneg-1.c b/gcc/testsuite/gcc.target/i386/fabsneg-1.c
new file mode 100644
index 00000000000..3cdf4566864
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/fabsneg-1.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mtune=nocona" } */
+
+double x;
+
+void
+__attribute__ ((noinline, noclone))
+test_fabs (double a)
+{
+  asm volatile ("" : "+r" (a));
+  x = __builtin_fabs (a);
+}
+
+void
+__attribute__ ((noinline, noclone))
+test_neg (double a)
+{
+  asm volatile ("" : "+r" (a));
+  x = -a;
+}
+
+int main ()
+{
+  test_fabs (-1.0);
+
+  if (x != 1.0)
+    __builtin_abort ();
+
+  test_neg (-1.0);
+
+  if (x != 1.0)
+    __builtin_abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr68657.c b/gcc/testsuite/gcc.target/i386/pr68657.c
new file mode 100644
index 00000000000..6f0d4987d39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68657.c
@@ -0,0 +1,15 @@
+/* PR c/68657 */
+/* { dg-options "-mno-avx512f -Werror=psabi" } */
+
+typedef int V __attribute__((vector_size (64)));
+
+void foo (V x, V *y) {	/* { dg-error "AVX512F vector argument without AVX512F enabled" } */
+  *y = x;
+}
+
+V bar (V *x) {		/* { dg-error "AVX512F vector return without AVX512F enabled" } */
+  return *x;
+}
+
+/* { dg-message "The ABI for passing parameters with 64-byte alignment has changed" "" { target *-*-* } 6 } */
+/* { dg-message "some warnings being treated as errors" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/i386/pr70876.c b/gcc/testsuite/gcc.target/i386/pr70876.c
new file mode 100644
index 00000000000..c9bab690b33
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr70876.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target { ! x32 } } } */
+/* { dg-options "-fcheck-pointer-bounds -mmpx -Wno-implicit-function-declaration" } */
+
+void f (char *s1, char *s2)
+{
+  int z = 5;
+
+  struct { char a[z]; } x;
+
+  s1[0] = s2[0];
+
+  foo (x, x);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr70877.c b/gcc/testsuite/gcc.target/i386/pr70877.c
new file mode 100644
index 00000000000..4269e84daff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr70877.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { ! x32 } } } */
+/* { dg-options "-fcheck-pointer-bounds -mmpx" } */
+
+int foo(int);
+
+typedef struct {
+  double d;
+  int a;
+} str_t;
+
+void bar(double d, int i, str_t s)
+{
+  d = ((double (*) (int)) foo) (i); /* { dg-warning "function called through a non-compatible type" } */
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr71529.C b/gcc/testsuite/gcc.target/i386/pr71529.C
new file mode 100644
index 00000000000..3169101e1a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr71529.C
@@ -0,0 +1,22 @@
+/* PR71529 */
+/* { dg-do compile { target { ! x32 } } } */
+/* { dg-options "-fcheck-pointer-bounds -mmpx -O2" } */
+
+class c1
+{
+ public:
+  virtual ~c1 ();
+};
+
+class c2
+{
+ public:
+  virtual ~c2 ();
+};
+
+class c3 : c1, c2 { };
+
+int main (int, char **)
+{
+  c3 obj;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr71647.c b/gcc/testsuite/gcc.target/i386/pr71647.c
new file mode 100644
index 00000000000..ab091bd93dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr71647.c
@@ -0,0 +1,32 @@
+/* PR tree-optimization/71647 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -fopenmp-simd -mavx -mno-avx512f -fdump-tree-vect-details" } */
+
+void
+foo (double *a, double *b)
+{
+  int i;
+#pragma omp simd aligned(a,b:4*sizeof(double))
+  for (i = 0; i < 32768; i++)
+    a[i] += b[i];
+}
+
+void
+bar (double *a, double *b)
+{
+  int i;
+#pragma omp simd aligned(a,b:32)
+  for (i = 0; i < 32768; i++)
+    a[i] += b[i];
+}
+
+void
+baz (double *a, double *b)
+{
+  int i;
+#pragma omp simd aligned(a,b:32L)
+  for (i = 0; i < 32768; i++)
+    a[i] += b[i];
+}
+
+/* { dg-final { scan-tree-dump-not "Alignment of access forced using peeling" "vect" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr76342.c b/gcc/testsuite/gcc.target/i386/pr76342.c
new file mode 100644
index 00000000000..d492b00c1aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr76342.c
@@ -0,0 +1,11 @@
+/* PR target/76342 */
+/* { dg-do compile } */
+/* { dg-options "-mavx512f" } */
+
+#include <immintrin.h>
+
+__m512i
+test()
+{
+  return _mm512_undefined_epi32 ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr71559.c b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c
new file mode 100644
index 00000000000..59ecc7fb37f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c
@@ -0,0 +1,73 @@
+/* PR target/71559 */
+/* { dg-do run { target sse2 } } */
+/* { dg-options "-O2 -ftree-vectorize -msse2" } */
+
+#ifndef PR71559_TEST
+#include "sse2-check.h"
+#define PR71559_TEST sse2_test
+#endif
+
+#define N 16
+float a[N] = { 5.0f, -3.0f, 1.0f, __builtin_nanf (""), 9.0f, 7.0f, -3.0f, -9.0f,
+               -3.0f, -5.0f, -9.0f, __builtin_nanf (""), 0.5f, -0.5f, 0.0f, 0.0f };
+float b[N] = { -5.0f, 3.0f, 1.0f, 7.0f, 8.0f, 8.0f, -3.0f, __builtin_nanf (""),
+               -4.0f, -4.0f, -9.0f, __builtin_nanf (""), 0.0f, 0.0f, 0.0f, __builtin_nanf ("") };
+int c[N], d[N];
+
+#define FN(name, op) \
+void					\
+name (void)				\
+{					\
+  int i;				\
+  for (i = 0; i < N; i++)		\
+    c[i] = (op || d[i] > 37) ? 5 : 32;	\
+}
+FN (eq, a[i] == b[i])
+FN (ne, a[i] != b[i])
+FN (gt, a[i] > b[i])
+FN (ge, a[i] >= b[i])
+FN (lt, a[i] < b[i])
+FN (le, a[i] <= b[i])
+FN (unle, !__builtin_isgreater (a[i], b[i]))
+FN (unlt, !__builtin_isgreaterequal (a[i], b[i]))
+FN (unge, !__builtin_isless (a[i], b[i]))
+FN (ungt, !__builtin_islessequal (a[i], b[i]))
+FN (uneq, !__builtin_islessgreater (a[i], b[i]))
+FN (ordered, !__builtin_isunordered (a[i], b[i]))
+FN (unordered, __builtin_isunordered (a[i], b[i]))
+
+#define TEST(name, GT, LT, EQ, UO) \
+  name ();				\
+  for (i = 0; i < N; i++)		\
+    {					\
+      int v;				\
+      switch (i % 4)			\
+	{				\
+	case 0: v = GT ? 5 : 32; break;	\
+	case 1: v = LT ? 5 : 32; break;	\
+	case 2: v = EQ ? 5 : 32; break;	\
+	case 3: v = UO ? 5 : 32; break;	\
+	}				\
+      if (c[i] != v)			\
+	__builtin_abort ();		\
+    }
+
+void
+PR71559_TEST (void)
+{
+  int i;
+  asm volatile ("" : : "g" (a), "g" (b), "g" (c), "g" (d) : "memory");
+  TEST (eq, 0, 0, 1, 0)
+  TEST (ne, 1, 1, 0, 1)
+  TEST (gt, 1, 0, 0, 0)
+  TEST (ge, 1, 0, 1, 0)
+  TEST (lt, 0, 1, 0, 0)
+  TEST (le, 0, 1, 1, 0)
+  TEST (unle, 0, 1, 1, 1)
+  TEST (unlt, 0, 1, 0, 1)
+  TEST (unge, 1, 0, 1, 1)
+  TEST (ungt, 1, 0, 0, 1)
+  TEST (uneq, 0, 0, 1, 1)
+  TEST (ordered, 1, 1, 1, 0)
+  TEST (unordered, 0, 0, 0, 1)
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/abs128-1.c b/gcc/testsuite/gcc.target/powerpc/abs128-1.c
new file mode 100644
index 00000000000..49635df2b90
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/abs128-1.c
@@ -0,0 +1,61 @@
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+void abort ();
+
+typedef unsigned long long int uint64_t;
+
+typedef union
+{
+  __float128 value;
+
+  struct
+  {
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+    unsigned negative:1;
+    unsigned exponent:15;
+    unsigned quiet_nan:1;
+    uint64_t mant_high:47;
+    uint64_t mant_low:64;
+#else
+    uint64_t mant_low:64;
+    uint64_t mant_high:47;
+    unsigned quiet_nan:1;
+    unsigned exponent:15;
+    unsigned negative:1;
+#endif
+  } nan;
+
+} ieee854_float128;
+
+int
+main (int argc, int *argv[])
+{
+  ieee854_float128 x, z;
+
+  x.nan.negative = 1;
+  x.nan.exponent = 0x22;
+  x.nan.quiet_nan = 0;
+  x.nan.mant_high = 0x1234;
+  x.nan.mant_low = 0xabcdef;
+
+  z.value = __builtin_fabsq (x.value);
+
+  if (z.nan.negative != 0
+      || z.nan.exponent != 0x22
+      || z.nan.quiet_nan != 0
+      || z.nan.mant_high != 0x1234
+      || z.nan.mant_low != 0xabcdef)
+    abort ();
+
+  z.value = __builtin_fabsq (z.value);
+
+  if (z.nan.negative != 0
+      || z.nan.exponent != 0x22
+      || z.nan.quiet_nan != 0
+      || z.nan.mant_high != 0x1234
+      || z.nan.mant_low != 0xabcdef)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c
new file mode 100644
index 00000000000..429dfc072e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c
@@ -0,0 +1,58 @@
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+void abort ();
+
+typedef unsigned long long int uint64_t;
+
+typedef union
+{
+  __float128 value;
+
+  struct
+  {
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+    unsigned negative:1;
+    unsigned exponent:15;
+    unsigned quiet_nan:1;
+    uint64_t mant_high:47;
+    uint64_t mant_low:64;
+#else
+    uint64_t mant_low:64;
+    uint64_t mant_high:47;
+    unsigned quiet_nan:1;
+    unsigned exponent:15;
+    unsigned negative:1;
+#endif
+  } nan;
+
+} ieee854_float128;
+
+int
+main (int argc, int *argv[])
+{
+  ieee854_float128 x, y, z;
+
+  x.nan.negative = 0;
+  x.nan.exponent = 0x22;
+  x.nan.quiet_nan = 0;
+  x.nan.mant_high = 0x1234;
+  x.nan.mant_low = 0xabcdef;
+
+  y.nan.negative = 1;
+  y.nan.exponent = 0;
+  y.nan.quiet_nan = 0;
+  y.nan.mant_high = 0;
+  y.nan.mant_low = 0;
+
+  z.value = __builtin_copysignq (x.value, y.value);
+
+  if (z.nan.negative != 1
+      || z.nan.exponent != 0x22
+      || z.nan.quiet_nan != 0
+      || z.nan.mant_high != 0x1234
+      || z.nan.mant_low != 0xabcdef)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/ctz-3.c b/gcc/testsuite/gcc.target/powerpc/ctz-3.c
new file mode 100644
index 00000000000..468a1f93540
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ctz-3.c
@@ -0,0 +1,62 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */
+
+#ifndef SIZE
+#define SIZE 1024
+#endif
+
+#ifndef ALIGN
+#define ALIGN 32
+#endif
+
+#define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))
+
+#define DO_BUILTIN(PREFIX, TYPE, CTZ)					\
+TYPE PREFIX ## _a[SIZE] ALIGN_ATTR;					\
+TYPE PREFIX ## _b[SIZE] ALIGN_ATTR;					\
+									\
+void									\
+PREFIX ## _ctz (void)							\
+{									\
+  unsigned long i;							\
+									\
+  for (i = 0; i < SIZE; i++)						\
+    PREFIX ## _a[i] = CTZ (PREFIX ## _b[i]);				\
+}
+
+#if !defined(DO_LONG_LONG) && !defined(DO_LONG) && !defined(DO_INT) && !defined(DO_SHORT) && !defined(DO_CHAR)
+#define DO_INT 1
+#endif
+
+#if DO_LONG_LONG
+/* At the moment, only int is auto vectorized.  */
+DO_BUILTIN (sll, long long,		__builtin_ctzll)
+DO_BUILTIN (ull, unsigned long long,	__builtin_ctzll)
+#endif
+
+#if defined(_ARCH_PPC64) && DO_LONG
+DO_BUILTIN (sl,  long,			__builtin_ctzl)
+DO_BUILTIN (ul,  unsigned long,		__builtin_ctzl)
+#endif
+
+#if DO_INT
+DO_BUILTIN (si,  int,			__builtin_ctz)
+DO_BUILTIN (ui,  unsigned int,		__builtin_ctz)
+#endif
+
+#if DO_SHORT
+DO_BUILTIN (ss,  short,			__builtin_ctz)
+DO_BUILTIN (us,  unsigned short,	__builtin_ctz)
+#endif
+
+#if DO_CHAR
+DO_BUILTIN (sc,  signed char,		__builtin_ctz)
+DO_BUILTIN (uc,  unsigned char,		__builtin_ctz)
+#endif
+
+/* { dg-final { scan-assembler-times "vctzw" 2 } } */
+/* { dg-final { scan-assembler-not "cnttzd" } } */
+/* { dg-final { scan-assembler-not "cnttzw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/ctz-4.c b/gcc/testsuite/gcc.target/powerpc/ctz-4.c
new file mode 100644
index 00000000000..2d04a9b6579
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ctz-4.c
@@ -0,0 +1,110 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+#include <altivec.h>
+
+vector signed char
+count_trailing_zeros_v16qi_1s (vector signed char a)
+{
+  return vec_vctz (a);
+}
+
+vector signed char
+count_trailing_zeros_v16qi_2s (vector signed char a)
+{
+  return vec_vctzb (a);
+}
+
+vector unsigned char
+count_trailing_zeros_v16qi_1u (vector unsigned char a)
+{
+  return vec_vctz (a);
+}
+
+vector unsigned char
+count_trailing_zeros_v16qi_2u (vector unsigned char a)
+{
+  return vec_vctzb (a);
+}
+
+vector short
+count_trailing_zeros_v8hi_1s (vector short a)
+{
+  return vec_vctz (a);
+}
+
+vector short
+count_trailing_zeros_v8hi_2s (vector short a)
+{
+  return vec_vctzh (a);
+}
+
+vector unsigned short
+count_trailing_zeros_v8hi_1u (vector unsigned short a)
+{
+  return vec_vctz (a);
+}
+
+vector unsigned short
+count_trailing_zeros_v8hi_2u (vector unsigned short a)
+{
+  return vec_vctzh (a);
+}
+
+vector int
+count_trailing_zeros_v4si_1s (vector int a)
+{
+  return vec_vctz (a);
+}
+
+vector int
+count_trailing_zeros_v4si_2s (vector int a)
+{
+  return vec_vctzw (a);
+}
+
+vector unsigned int
+count_trailing_zeros_v4si_1u (vector unsigned int a)
+{
+  return vec_vctz (a);
+}
+
+vector unsigned int
+count_trailing_zeros_v4si_2u (vector unsigned int a)
+{
+  return vec_vctzw (a);
+}
+
+vector long long
+count_trailing_zeros_v2di_1s (vector long long a)
+{
+  return vec_vctz (a);
+}
+
+vector long long
+count_trailing_zeros_v2di_2s (vector long long a)
+{
+  return vec_vctzd (a);
+}
+
+vector unsigned long long
+count_trailing_zeros_v2di_1u (vector unsigned long long a)
+{
+  return vec_vctz (a);
+}
+
+vector unsigned long long
+count_trailing_zeros_v2di_2u (vector unsigned long long a)
+{
+  return vec_vctzd (a);
+}
+
+/* { dg-final { scan-assembler "vctzb" } } */
+/* { dg-final { scan-assembler "vctzd" } } */
+/* { dg-final { scan-assembler "vctzh" } } */
+/* { dg-final { scan-assembler "vctzw" } } */
+/* { dg-final { scan-assembler-not "cnttzd" } } */
+/* { dg-final { scan-assembler-not "cnttzw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-0.c b/gcc/testsuite/gcc.target/powerpc/darn-0.c
new file mode 100644
index 00000000000..fc150766108
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-0.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int get_random ()
+{
+  return __builtin_darn_32 ();
+}
+
+/* { dg-final { scan-assembler	   "darn" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-1.c b/gcc/testsuite/gcc.target/powerpc/darn-1.c
new file mode 100644
index 00000000000..9b7482d6551
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+long long get_conditioned_random ()
+{
+  return __builtin_darn ();
+}
+
+/* { dg-final { scan-assembler	   "darn" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-2.c b/gcc/testsuite/gcc.target/powerpc/darn-2.c
new file mode 100644
index 00000000000..84493602cfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+long long get_raw_random ()
+{
+  return __builtin_darn_raw ();
+}
+
+/* { dg-final { scan-assembler	   "darn" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dform-3.c b/gcc/testsuite/gcc.target/powerpc/dform-3.c
new file mode 100644
index 00000000000..b1c481fbf6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dform-3.c
@@ -0,0 +1,39 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -mpower9-dform -O2 -mlra" } */
+
+#ifndef TYPE
+#define TYPE vector double
+#endif
+
+struct foo {
+  TYPE a, b, c, d;
+};
+
+/* Test whether ISA 3.0 vector d-form instructions are implemented.  */
+void
+add (struct foo *p)
+{
+  p->b = p->c + p->d;
+}
+
+/* Make sure we don't use direct moves to get stuff into GPR registers.  */
+void
+gpr (struct foo *p)
+{
+  TYPE x = p->c;
+
+  __asm__ (" # reg = %0" : "+r" (x));
+
+  p->b = x;
+}
+
+/* { dg-final { scan-assembler     "lxv "      } } */
+/* { dg-final { scan-assembler     "stxv "     } } */
+/* { dg-final { scan-assembler-not "lxvx "     } } */
+/* { dg-final { scan-assembler-not "stxvx "    } } */
+/* { dg-final { scan-assembler-not "mfvsrd "   } } */
+/* { dg-final { scan-assembler-not "mfvsrld "  } } */
+/* { dg-final { scan-assembler     "l\[dq\] "  } } */
+/* { dg-final { scan-assembler     "st\[dq\] " } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
new file mode 100644
index 00000000000..081946f7fbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
@@ -0,0 +1,39 @@
+# Copyright (C) 2014-2016 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Exit immediately if this isn't a PowerPC target.
+if { ![istarget powerpc*-*-*] && ![istarget rs6000-*-*] } then {
+  return
+}
+
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+  set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+load_lib torture-options.exp
+
+# Initialize.
+dg-init
+
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c*]] "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c
new file mode 100644
index 00000000000..29859c55986
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c
new file mode 100644
index 00000000000..d634a2acd04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c
new file mode 100644
index 00000000000..a56f19ba391
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c
new file mode 100644
index 00000000000..523facea156
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c
new file mode 100644
index 00000000000..e62e4bc7bbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c
new file mode 100644
index 00000000000..38bff163c02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c
new file mode 100644
index 00000000000..57fc81ad742
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c
new file mode 100644
index 00000000000..990461f9c53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c
new file mode 100644
index 00000000000..dcd4a16635f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c
new file mode 100644
index 00000000000..5fbf5b5cc0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c
new file mode 100644
index 00000000000..675109552b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c
new file mode 100644
index 00000000000..d24eb10f7a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c
new file mode 100644
index 00000000000..d66ba886a92
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c
new file mode 100644
index 00000000000..e42f0debc82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c
new file mode 100644
index 00000000000..975843c6a02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c
new file mode 100644
index 00000000000..d6eced78f6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c
new file mode 100644
index 00000000000..eccca7e5d85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c
new file mode 100644
index 00000000000..54f1cd3d134
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c
new file mode 100644
index 00000000000..0c6594ecf46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c
new file mode 100644
index 00000000000..e30c2f4ac79
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c
new file mode 100644
index 00000000000..aaa0a854370
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c
new file mode 100644
index 00000000000..efec051639a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c
new file mode 100644
index 00000000000..2f84bbfd36a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c
new file mode 100644
index 00000000000..ac0380973f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c
new file mode 100644
index 00000000000..cfa8d0d2817
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c
new file mode 100644
index 00000000000..a95dcb8dbb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c
new file mode 100644
index 00000000000..512e1574555
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c
new file mode 100644
index 00000000000..f21399e9d62
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c
new file mode 100644
index 00000000000..86422831975
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c
new file mode 100644
index 00000000000..5987b438970
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c
new file mode 100644
index 00000000000..00be5389310
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c
new file mode 100644
index 00000000000..dcbde72a7f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c
new file mode 100644
index 00000000000..c892c100aa8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c
new file mode 100644
index 00000000000..d54138d8c5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c
new file mode 100644
index 00000000000..f00756aa23c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c
new file mode 100644
index 00000000000..6b2ecf775d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c
new file mode 100644
index 00000000000..c84387dc38b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c
new file mode 100644
index 00000000000..f193b415007
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c
new file mode 100644
index 00000000000..0de23f4f225
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c
new file mode 100644
index 00000000000..41652c99f6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c
new file mode 100644
index 00000000000..4ef2d555d43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c
new file mode 100644
index 00000000000..f1d6e2de80f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c
new file mode 100644
index 00000000000..c85b709f228
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c
new file mode 100644
index 00000000000..94962fcff2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c
new file mode 100644
index 00000000000..79190d0dde0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c
new file mode 100644
index 00000000000..2aadb7e7dc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c
new file mode 100644
index 00000000000..3d9869d39f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c
new file mode 100644
index 00000000000..58f542673de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c
new file mode 100644
index 00000000000..382fdc21060
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c
new file mode 100644
index 00000000000..067c2071b4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c
new file mode 100644
index 00000000000..ac2c692b51f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c
new file mode 100644
index 00000000000..cd732fbc885
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c
new file mode 100644
index 00000000000..7efb1a3d0f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c
new file mode 100644
index 00000000000..74ff7ec0d50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c
new file mode 100644
index 00000000000..d6ee4f72a75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c
new file mode 100644
index 00000000000..acd2a208379
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c
new file mode 100644
index 00000000000..1bddb651b0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c
new file mode 100644
index 00000000000..71eab2609b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c
new file mode 100644
index 00000000000..247c1448a70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c
new file mode 100644
index 00000000000..fbe137de7f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c
new file mode 100644
index 00000000000..18d17f36ee3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c
new file mode 100644
index 00000000000..6e601160ef7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c
new file mode 100644
index 00000000000..2ad93313760
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c
new file mode 100644
index 00000000000..69272acb47a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c
new file mode 100644
index 00000000000..a9ba111b82f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c
new file mode 100644
index 00000000000..bd8040a175a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c
new file mode 100644
index 00000000000..078f232cb4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c
new file mode 100644
index 00000000000..1875741f5c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c
new file mode 100644
index 00000000000..f84faf8022b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c
new file mode 100644
index 00000000000..3e512038cf3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c
new file mode 100644
index 00000000000..044d039b464
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c
new file mode 100644
index 00000000000..52a5d9a5664
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c
new file mode 100644
index 00000000000..2dd72ee1253
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c
new file mode 100644
index 00000000000..6bbe73b7511
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c
new file mode 100644
index 00000000000..572897fee55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c
new file mode 100644
index 00000000000..4b725377e09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c
new file mode 100644
index 00000000000..c302027e3be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c
new file mode 100644
index 00000000000..789b3ada11a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c
new file mode 100644
index 00000000000..d3aa64efa97
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c
new file mode 100644
index 00000000000..9180e3e9a01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-1.c b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c
new file mode 100644
index 00000000000..89bf04f12a9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c
@@ -0,0 +1,22 @@
+/* { dg-do run { target { powerpc64*-*-* && p8vector_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+void abort ();
+
+typedef __complex float __cfloat128 __attribute__((mode(KC)));
+
+__cfloat128 divide (__cfloat128 x, __cfloat128 y)
+{
+  return x / y;
+}
+
+__cfloat128 z, a;
+
+int main ()
+{
+  z = divide (5.0q + 5.0jq, 2.0q + 1.0jq);
+  a = 3.0q + 1.0jq;
+  if (z != a)
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-cmp.c b/gcc/testsuite/gcc.target/powerpc/float128-cmp.c
new file mode 100644
index 00000000000..247abc0f7d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/float128-cmp.c
@@ -0,0 +1,106 @@
+/* { dg-do run { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target ppc_float128_sw } */
+/* { dg-options "-mvsx -O2 -mfloat128" } */
+
+#include <stddef.h>
+#include <stdlib.h>
+
+#ifndef TYPE
+#define TYPE __float128
+#define NAN __builtin_nanq ("")
+#define SNAN __builtin_nansq ("")
+#else
+#define NAN __builtin_nan ("")
+#define SNAN __builtin_nans ("")
+#endif
+
+extern void check (TYPE a,
+		   TYPE b,
+		   int eq,
+		   int ne,
+		   int lt,
+		   int le,
+		   int gt,
+		   int ge,
+		   int i_lt,
+		   int i_le,
+		   int i_gt,
+		   int i_ge,
+		   int i_lg,
+		   int i_un) __attribute__((__noinline__));
+
+void
+check (TYPE a,
+       TYPE b,
+       int eq,
+       int ne,
+       int lt,
+       int le,
+       int gt,
+       int ge,
+       int i_lt,
+       int i_le,
+       int i_gt,
+       int i_ge,
+       int i_lg,
+       int i_un)
+{
+  if (eq != (a == b))
+    abort ();
+
+  if (ne != (a != b))
+    abort ();
+
+  if (lt != (a < b))
+    abort ();
+
+  if (le != (a <= b))
+    abort ();
+
+  if (gt != (a > b))
+    abort ();
+
+  if (ge != (a >= b))
+    abort ();
+
+  if (i_lt != __builtin_isless (a, b))
+    abort ();
+
+  if (i_le != __builtin_islessequal (a, b))
+    abort ();
+
+  if (i_gt != __builtin_isgreater (a, b))
+    abort ();
+
+  if (i_ge != __builtin_isgreaterequal (a, b))
+    abort ();
+
+  if (i_lg != __builtin_islessgreater (a, b))
+    abort ();
+
+  if (i_un != __builtin_isunordered (a, b))
+    abort ();
+}
+
+int main (void)
+{
+  TYPE one   = (TYPE) +1.0;
+  TYPE two   = (TYPE) +2.0;
+  TYPE pzero = (TYPE) +0.0;
+  TYPE mzero = (TYPE) -0.0;
+  TYPE nan   = (TYPE) NAN;
+  TYPE snan  = (TYPE) SNAN;
+
+  check (one,   two,   0, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0);
+  check (one,   one,   1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0);
+  check (one,   pzero, 0, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 0);
+  check (mzero, pzero, 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0);
+  check (nan,   one,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (one,   nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (nan,   nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (snan,  one,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (one,   snan,  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (snan,  nan,   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  check (nan,   snan,  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c b/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c
new file mode 100644
index 00000000000..4e3b3253caf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c
@@ -0,0 +1,157 @@
+/* { dg-do compile { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target powerpc_float128_sw_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-options "-O2 -mcpu=power7 -mfloat128" } */
+
+#ifndef NO_FLOAT
+typedef _Complex float	float_complex;
+extern float_complex cfloat1 (void);
+extern float_complex cfloat2 (void);
+
+#define FLOAT_ARG(NAME, OP)	ARG_OP(float, float_complex, NAME, OP)
+#define FLOAT_PTR(NAME, OP)	PTR_OP(float, float_complex, NAME, OP)
+#define FLOAT_CALL()		CALL_OP(float, float_complex, cfloat1, cfloat2)
+
+#else
+#define FLOAT_ARG(NAME, OP)
+#define FLOAT_PTR(NAME, OP)
+#define FLOAT_CALL()
+#endif
+
+#ifndef NO_DOUBLE
+typedef _Complex double	double_complex;
+extern double_complex cdouble1 (void);
+extern double_complex cdouble2 (void);
+
+#define DOUBLE_ARG(NAME, OP)	ARG_OP(double, double_complex, NAME, OP)
+#define DOUBLE_PTR(NAME, OP)	PTR_OP(double, double_complex, NAME, OP)
+#define DOUBLE_CALL()		CALL_OP(double, double_complex, cdouble1, cdouble2)
+
+#else
+#define DOUBLE_ARG(NAME, OP)
+#define DOUBLE_PTR(NAME, OP)
+#define DOUBLE_CALL()
+#endif
+
+#ifndef NO_FLOAT128
+#ifdef __VSX__
+typedef _Complex float __attribute__((mode(KC)))	float128_complex;
+#else
+typedef _Complex float __attribute__((mode(TC)))	float128_complex;
+#endif
+
+extern float128_complex cfloat128_1 (void);
+extern float128_complex cfloat128_2 (void);
+
+#define FLOAT128_ARG(NAME, OP)	ARG_OP(float128, float128_complex, NAME, OP)
+#define FLOAT128_PTR(NAME, OP)	PTR_OP(float128, float128_complex, NAME, OP)
+#define FLOAT128_CALL()		CALL_OP(float128, float128_complex, cfloat128_1, cfloat128_2)
+
+#else
+#define FLOAT128_ARG(NAME, OP)
+#define FLOAT128_PTR(NAME, OP)
+#define FLOAT128_CALL()
+#endif
+
+#ifndef NO_LDOUBLE
+typedef _Complex long double ldouble_complex;
+extern ldouble_complex cldouble1 (void);
+extern ldouble_complex cldouble2 (void);
+
+#define LDOUBLE_ARG(NAME, OP)	ARG_OP(ldouble, ldouble_complex, NAME, OP)
+#define LDOUBLE_PTR(NAME, OP)	PTR_OP(ldouble, ldouble_complex, NAME, OP)
+#define LDOUBLE_CALL()		CALL_OP(ldouble, ldouble_complex, cldouble1, cldouble2)
+
+#else
+#define LDOUBLE_ARG(NAME, OP)
+#define LDOUBLE_PTR(NAME, OP)
+#define LDOUBLE_CALL()
+#endif
+
+
+#define ARG_OP(SUFFIX, TYPE, NAME, OP)					\
+TYPE arg_ ## NAME ## _ ## SUFFIX (TYPE a, TYPE b)			\
+{									\
+  return a OP b;							\
+}
+
+#define PTR_OP(SUFFIX, TYPE, NAME, OP)					\
+void ptr_ ## NAME ## _ ## SUFFIX (TYPE *p, TYPE *a, TYPE *b)		\
+{									\
+  *p = *a OP *b;							\
+}
+
+#define CALL_OP(SUFFIX, TYPE, FUNC1, FUNC2)				\
+TYPE call_ ## SUFFIX (void)						\
+{									\
+  TYPE value1 = FUNC1 ();						\
+  TYPE value2 = FUNC2 ();						\
+  return value1 + value2;						\
+}
+
+#ifndef NO_ARG
+#ifndef NO_ADD
+FLOAT_ARG    (add, +)
+DOUBLE_ARG   (add, +)
+FLOAT128_ARG (add, +)
+LDOUBLE_ARG  (add, +)
+#endif
+
+#ifndef NO_SUB
+FLOAT_ARG    (sub, -)
+DOUBLE_ARG   (sub, -)
+FLOAT128_ARG (sub, -)
+LDOUBLE_ARG  (sub, -)
+#endif
+
+#ifndef NO_MUL
+FLOAT_ARG    (mul, *)
+DOUBLE_ARG   (mul, *)
+FLOAT128_ARG (mul, *)
+LDOUBLE_ARG  (mul, *)
+#endif
+
+#ifndef NO_DIV
+FLOAT_ARG    (div, /)
+DOUBLE_ARG   (div, /)
+FLOAT128_ARG (div, /)
+LDOUBLE_ARG  (div, /)
+#endif
+#endif
+
+#ifndef NO_PTR
+#ifndef NO_ADD
+FLOAT_PTR    (add, +)
+DOUBLE_PTR   (add, +)
+FLOAT128_PTR (add, +)
+LDOUBLE_PTR  (add, +)
+#endif
+
+#ifndef NO_SUB
+FLOAT_PTR    (sub, -)
+DOUBLE_PTR   (sub, -)
+FLOAT128_PTR (sub, -)
+LDOUBLE_PTR  (sub, -)
+#endif
+
+#ifndef NO_MUL
+FLOAT_PTR    (mul, *)
+DOUBLE_PTR   (mul, *)
+FLOAT128_PTR (mul, *)
+LDOUBLE_PTR  (mul, *)
+#endif
+
+#ifndef NO_DIV
+FLOAT_PTR    (div, /)
+DOUBLE_PTR   (div, /)
+FLOAT128_PTR (div, /)
+LDOUBLE_PTR  (div, /)
+#endif
+#endif
+
+#ifndef NO_CALL
+FLOAT_CALL    ()
+DOUBLE_CALL   ()
+FLOAT128_CALL ()
+LDOUBLE_CALL  ()
+#endif
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c
new file mode 100644
index 00000000000..06dd8e2f01b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c
@@ -0,0 +1,160 @@
+/* { dg-do compile { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target powerpc_float128_hw_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O2 -mcpu=power9 -mfloat128 -mfloat128-hardware" } */
+
+#ifndef NO_FLOAT
+typedef _Complex float	float_complex;
+extern float_complex cfloat1 (void);
+extern float_complex cfloat2 (void);
+
+#define FLOAT_ARG(NAME, OP)	ARG_OP(float, float_complex, NAME, OP)
+#define FLOAT_PTR(NAME, OP)	PTR_OP(float, float_complex, NAME, OP)
+#define FLOAT_CALL()		CALL_OP(float, float_complex, cfloat1, cfloat2)
+
+#else
+#define FLOAT_ARG(NAME, OP)
+#define FLOAT_PTR(NAME, OP)
+#define FLOAT_CALL()
+#endif
+
+#ifndef NO_DOUBLE
+typedef _Complex double	double_complex;
+extern double_complex cdouble1 (void);
+extern double_complex cdouble2 (void);
+
+#define DOUBLE_ARG(NAME, OP)	ARG_OP(double, double_complex, NAME, OP)
+#define DOUBLE_PTR(NAME, OP)	PTR_OP(double, double_complex, NAME, OP)
+#define DOUBLE_CALL()		CALL_OP(double, double_complex, cdouble1, cdouble2)
+
+#else
+#define DOUBLE_ARG(NAME, OP)
+#define DOUBLE_PTR(NAME, OP)
+#define DOUBLE_CALL()
+#endif
+
+#ifndef NO_FLOAT128
+#ifdef __VSX__
+typedef _Complex float __attribute__((mode(KC)))	float128_complex;
+#else
+typedef _Complex float __attribute__((mode(TC)))	float128_complex;
+#endif
+
+extern float128_complex cfloat128_1 (void);
+extern float128_complex cfloat128_2 (void);
+
+#define FLOAT128_ARG(NAME, OP)	ARG_OP(float128, float128_complex, NAME, OP)
+#define FLOAT128_PTR(NAME, OP)	PTR_OP(float128, float128_complex, NAME, OP)
+#define FLOAT128_CALL()		CALL_OP(float128, float128_complex, cfloat128_1, cfloat128_2)
+
+#else
+#define FLOAT128_ARG(NAME, OP)
+#define FLOAT128_PTR(NAME, OP)
+#define FLOAT128_CALL()
+#endif
+
+#ifndef NO_LDOUBLE
+typedef _Complex long double ldouble_complex;
+extern ldouble_complex cldouble1 (void);
+extern ldouble_complex cldouble2 (void);
+
+#define LDOUBLE_ARG(NAME, OP)	ARG_OP(ldouble, ldouble_complex, NAME, OP)
+#define LDOUBLE_PTR(NAME, OP)	PTR_OP(ldouble, ldouble_complex, NAME, OP)
+#define LDOUBLE_CALL()		CALL_OP(ldouble, ldouble_complex, cldouble1, cldouble2)
+
+#else
+#define LDOUBLE_ARG(NAME, OP)
+#define LDOUBLE_PTR(NAME, OP)
+#define LDOUBLE_CALL()
+#endif
+
+
+#define ARG_OP(SUFFIX, TYPE, NAME, OP)					\
+TYPE arg_ ## NAME ## _ ## SUFFIX (TYPE a, TYPE b)			\
+{									\
+  return a OP b;							\
+}
+
+#define PTR_OP(SUFFIX, TYPE, NAME, OP)					\
+void ptr_ ## NAME ## _ ## SUFFIX (TYPE *p, TYPE *a, TYPE *b)		\
+{									\
+  *p = *a OP *b;							\
+}
+
+#define CALL_OP(SUFFIX, TYPE, FUNC1, FUNC2)				\
+TYPE call_ ## SUFFIX (void)						\
+{									\
+  TYPE value1 = FUNC1 ();						\
+  TYPE value2 = FUNC2 ();						\
+  return value1 + value2;						\
+}
+
+#ifndef NO_ARG
+#ifndef NO_ADD
+FLOAT_ARG    (add, +)
+DOUBLE_ARG   (add, +)
+FLOAT128_ARG (add, +)
+LDOUBLE_ARG  (add, +)
+#endif
+
+#ifndef NO_SUB
+FLOAT_ARG    (sub, -)
+DOUBLE_ARG   (sub, -)
+FLOAT128_ARG (sub, -)
+LDOUBLE_ARG  (sub, -)
+#endif
+
+#ifndef NO_MUL
+FLOAT_ARG    (mul, *)
+DOUBLE_ARG   (mul, *)
+FLOAT128_ARG (mul, *)
+LDOUBLE_ARG  (mul, *)
+#endif
+
+#ifndef NO_DIV
+FLOAT_ARG    (div, /)
+DOUBLE_ARG   (div, /)
+FLOAT128_ARG (div, /)
+LDOUBLE_ARG  (div, /)
+#endif
+#endif
+
+#ifndef NO_PTR
+#ifndef NO_ADD
+FLOAT_PTR    (add, +)
+DOUBLE_PTR   (add, +)
+FLOAT128_PTR (add, +)
+LDOUBLE_PTR  (add, +)
+#endif
+
+#ifndef NO_SUB
+FLOAT_PTR    (sub, -)
+DOUBLE_PTR   (sub, -)
+FLOAT128_PTR (sub, -)
+LDOUBLE_PTR  (sub, -)
+#endif
+
+#ifndef NO_MUL
+FLOAT_PTR    (mul, *)
+DOUBLE_PTR   (mul, *)
+FLOAT128_PTR (mul, *)
+LDOUBLE_PTR  (mul, *)
+#endif
+
+#ifndef NO_DIV
+FLOAT_PTR    (div, /)
+DOUBLE_PTR   (div, /)
+FLOAT128_PTR (div, /)
+LDOUBLE_PTR  (div, /)
+#endif
+#endif
+
+#ifndef NO_CALL
+FLOAT_CALL    ()
+DOUBLE_CALL   ()
+FLOAT128_CALL ()
+LDOUBLE_CALL  ()
+#endif
+
+/* { dg-final { scan-assembler "xsaddqp"  } } */
+/* { dg-final { scan-assembler "xssubqp"  } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/inf128-1.c b/gcc/testsuite/gcc.target/powerpc/inf128-1.c
new file mode 100644
index 00000000000..df797e33220
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/inf128-1.c
@@ -0,0 +1,55 @@
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+void abort ();
+
+typedef unsigned long long int uint64_t;
+
+typedef union
+{
+  __float128 value;
+
+  struct
+  {
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+    unsigned negative:1;
+    unsigned exponent:15;
+    unsigned quiet_nan:1;
+    uint64_t mant_high:47;
+    uint64_t mant_low:64;
+#else
+    uint64_t mant_low:64;
+    uint64_t mant_high:47;
+    unsigned quiet_nan:1;
+    unsigned exponent:15;
+    unsigned negative:1;
+#endif
+  } nan;
+
+} ieee854_float128;
+
+int
+main (int argc, int *argv[])
+{
+  ieee854_float128 y;
+
+  y.value = __builtin_infq ();
+
+  if (y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 0
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 0)
+    abort ();
+
+  y.value = __builtin_huge_valq ();
+
+  if (y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 0
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 0)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c
new file mode 100644
index 00000000000..b975a91dbd7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c
@@ -0,0 +1,22 @@
+/* { dg-do run { target { powerpc64*-*-* && p8vector_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+void abort ();
+
+typedef __complex float __cfloat128 __attribute__((mode(KC)));
+
+__cfloat128 multiply (__cfloat128 x, __cfloat128 y)
+{
+  return x * y;
+}
+
+__cfloat128 z, a;
+
+int main ()
+{
+  z = multiply (2.0q + 1.0jq, 3.0q + 1.0jq);
+  a = 5.0q + 5.0jq;
+  if (z != a)
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/nan128-1.c b/gcc/testsuite/gcc.target/powerpc/nan128-1.c
new file mode 100644
index 00000000000..e327f40f837
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/nan128-1.c
@@ -0,0 +1,77 @@
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
+
+#include <stdio.h>
+
+void abort ();
+
+typedef unsigned long long int uint64_t;
+
+typedef union
+{
+  __float128 value;
+
+  struct
+  {
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+    unsigned negative:1;
+    unsigned exponent:15;
+    unsigned quiet_nan:1;
+    uint64_t mant_high:47;
+    uint64_t mant_low:64;
+#else
+    uint64_t mant_low:64;
+    uint64_t mant_high:47;
+    unsigned quiet_nan:1;
+    unsigned exponent:15;
+    unsigned negative:1;
+#endif
+  } nan;
+
+} ieee854_float128;
+
+int
+main (int argc, int *argv[])
+{
+  ieee854_float128 y;
+
+  y.value = __builtin_nanq ("1");
+
+  if (y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 1
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 1)
+    abort ();
+
+  y.value = __builtin_nanq ("0x2ab3c");
+
+  if (y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 1
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 0x2ab3c)
+    abort ();
+
+  y.value = __builtin_nansq ("1");
+
+  if (
+      y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 0
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 1
+      )
+    abort ();
+
+  y.value = __builtin_nansq ("0x2ab3c");
+
+  if (y.nan.negative != 0
+      || y.nan.exponent != 0x7fff
+      || y.nan.quiet_nan != 0
+      || y.nan.mant_high != 0
+      || y.nan.mant_low != 0x2ab3c)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c b/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c
new file mode 100644
index 00000000000..c182da9470e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c
@@ -0,0 +1,171 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2 -mpower9-minmax -ffast-math" } */
+/* { dg-final { scan-assembler-not "fsel"      } } */
+/* { dg-final { scan-assembler     "xscmpeqdp" } } */
+/* { dg-final { scan-assembler     "xscmpgtdp" } } */
+/* { dg-final { scan-assembler     "xscmpgedp" } } */
+/* { dg-final { scan-assembler-not "xscmpodp"  } } */
+/* { dg-final { scan-assembler-not "xscmpudp"  } } */
+/* { dg-final { scan-assembler     "xsmaxcdp"  } } */
+/* { dg-final { scan-assembler-not "xsmaxdp"   } } */
+/* { dg-final { scan-assembler     "xsmincdp"  } } */
+/* { dg-final { scan-assembler-not "xsmindp"   } } */
+/* { dg-final { scan-assembler     "xxsel"     } } */
+
+double
+dbl_max1 (double a, double b)
+{
+  return (a >= b) ? a : b;
+}
+
+double
+dbl_max2 (double a, double b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_min1 (double a, double b)
+{
+  return (a < b) ? a : b;
+}
+
+double
+dbl_min2 (double a, double b)
+{
+  return (a <= b) ? a : b;
+}
+
+double
+dbl_cmp_eq (double a, double b, double c, double d)
+{
+  return (a == b) ? c : d;
+}
+
+double
+dbl_cmp_ne (double a, double b, double c, double d)
+{
+  return (a != b) ? c : d;
+}
+
+double
+dbl_cmp_gt (double a, double b, double c, double d)
+{
+  return (a > b) ? c : d;
+}
+
+double
+dbl_cmp_ge (double a, double b, double c, double d)
+{
+  return (a >= b) ? c : d;
+}
+
+double
+dbl_cmp_lt (double a, double b, double c, double d)
+{
+  return (a < b) ? c : d;
+}
+
+double
+dbl_cmp_le (double a, double b, double c, double d)
+{
+  return (a <= b) ? c : d;
+}
+
+float
+flt_max1 (float a, float b)
+{
+  return (a >= b) ? a : b;
+}
+
+float
+flt_max2 (float a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+float
+flt_min1 (float a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+float
+flt_min2 (float a, float b)
+{
+  return (a <= b) ? a : b;
+}
+
+float
+flt_cmp_eq (float a, float b, float c, float d)
+{
+  return (a == b) ? c : d;
+}
+
+float
+flt_cmp_ne (float a, float b, float c, float d)
+{
+  return (a != b) ? c : d;
+}
+
+float
+flt_cmp_gt (float a, float b, float c, float d)
+{
+  return (a > b) ? c : d;
+}
+
+float
+flt_cmp_ge (float a, float b, float c, float d)
+{
+  return (a >= b) ? c : d;
+}
+
+float
+flt_cmp_lt (float a, float b, float c, float d)
+{
+  return (a < b) ? c : d;
+}
+
+float
+flt_cmp_le (float a, float b, float c, float d)
+{
+  return (a <= b) ? c : d;
+}
+
+double
+dbl_flt_max1 (float a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_max2 (double a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_max3 (float a, double b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_min1 (float a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+double
+dbl_flt_min2 (double a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+double
+dbl_flt_min3 (float a, double b)
+{
+  return (a < b) ? a : b;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c b/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c
new file mode 100644
index 00000000000..f6742142966
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c
@@ -0,0 +1,191 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2 -mpower9-minmax" } */
+/* { dg-final { scan-assembler-not "fsel"      } } */
+/* { dg-final { scan-assembler     "xscmpeqdp" } } */
+/* { dg-final { scan-assembler     "xscmpgtdp" } } */
+/* { dg-final { scan-assembler-not "xscmpodp"  } } */
+/* { dg-final { scan-assembler-not "xscmpudp"  } } */
+/* { dg-final { scan-assembler     "xsmaxcdp"  } } */
+/* { dg-final { scan-assembler-not "xsmaxdp"   } } */
+/* { dg-final { scan-assembler     "xsmincdp"  } } */
+/* { dg-final { scan-assembler-not "xsmindp"   } } */
+/* { dg-final { scan-assembler     "xxsel"     } } */
+
+/* Due to NaN support, <= and >= are not handled presently unless -ffast-math
+   is used.  At some point this will be fixed and the xscmpgedp instruction can
+   be generated normally. The <= and >= tests are bracketed with
+   #ifdef DO_GE_LE.  */
+
+#ifdef DO_GE_LE
+double
+dbl_max1 (double a, double b)
+{
+  return (a >= b) ? a : b;
+}
+#endif
+
+double
+dbl_max2 (double a, double b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_min1 (double a, double b)
+{
+  return (a < b) ? a : b;
+}
+
+#ifdef DO_GE_LE
+double
+dbl_min2 (double a, double b)
+{
+  return (a <= b) ? a : b;
+}
+#endif
+
+double
+dbl_cmp_eq (double a, double b, double c, double d)
+{
+  return (a == b) ? c : d;
+}
+
+double
+dbl_cmp_ne (double a, double b, double c, double d)
+{
+  return (a != b) ? c : d;
+}
+
+double
+dbl_cmp_gt (double a, double b, double c, double d)
+{
+  return (a > b) ? c : d;
+}
+
+#ifdef DO_GE_LE
+double
+dbl_cmp_ge (double a, double b, double c, double d)
+{
+  return (a >= b) ? c : d;
+}
+#endif
+
+double
+dbl_cmp_lt (double a, double b, double c, double d)
+{
+  return (a < b) ? c : d;
+}
+
+#ifdef DO_GE_LE
+double
+dbl_cmp_le (double a, double b, double c, double d)
+{
+  return (a <= b) ? c : d;
+}
+#endif
+
+#ifdef DO_GE_LE
+float
+flt_max1 (float a, float b)
+{
+  return (a >= b) ? a : b;
+}
+#endif
+
+float
+flt_max2 (float a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+float
+flt_min1 (float a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+#ifdef DO_GE_LE
+float
+flt_min2 (float a, float b)
+{
+  return (a <= b) ? a : b;
+}
+#endif
+
+float
+flt_cmp_eq (float a, float b, float c, float d)
+{
+  return (a == b) ? c : d;
+}
+
+float
+flt_cmp_ne (float a, float b, float c, float d)
+{
+  return (a != b) ? c : d;
+}
+
+float
+flt_cmp_gt (float a, float b, float c, float d)
+{
+  return (a > b) ? c : d;
+}
+
+#ifdef DO_GE_LE
+float
+flt_cmp_ge (float a, float b, float c, float d)
+{
+  return (a >= b) ? c : d;
+}
+#endif
+
+float
+flt_cmp_lt (float a, float b, float c, float d)
+{
+  return (a < b) ? c : d;
+}
+
+#ifdef DO_GE_LE
+float
+flt_cmp_le (float a, float b, float c, float d)
+{
+  return (a <= b) ? c : d;
+}
+#endif
+
+double
+dbl_flt_max1 (float a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_max2 (double a, float b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_max3 (float a, double b)
+{
+  return (a > b) ? a : b;
+}
+
+double
+dbl_flt_min1 (float a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+double
+dbl_flt_min2 (double a, float b)
+{
+  return (a < b) ? a : b;
+}
+
+double
+dbl_flt_min3 (float a, double b)
+{
+  return (a < b) ? a : b;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c
new file mode 100644
index 00000000000..13b72872d74
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+
+#include <altivec.h>
+
+vector int
+foo_r (int a)
+{
+  return (vector int) { a, a, a, a };		/* mtvsrws */
+}
+
+vector int
+foo_r2 (int a)
+{
+  return vec_splats (a);			/* mtvsrws */
+}
+
+vector int
+foo_p (int *a)
+{
+  return (vector int) { *a, *a, *a, *a };	/* lxvwsx */
+}
+
+/* { dg-final { scan-assembler-times "mtvsrws" 2 } } */
+/* { dg-final { scan-assembler-times "lxvwsx"  1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c
new file mode 100644
index 00000000000..2468e92dddb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c
@@ -0,0 +1,38 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+
+#include <altivec.h>
+
+vector float
+foo_r (float a)
+{
+  return (vector float) { a, a, a, a };			/* xscvdpspn/xxspltw */
+}
+
+vector float
+foo_r2 (float a)
+{
+  return vec_splats (a);				/* xscvdpspn/xxspltw */
+}
+
+vector float
+foo_g (float *a)
+{
+  float f = *a;
+
+  __asm__ (" # %0" : "+r" (f));
+  return (vector float) { f, f, f, f };			/* mtvsrws */
+}
+
+vector float
+foo_p (float *a)
+{
+  return (vector float) { *a, *a, *a, *a };		/* lxvwsx */
+}
+
+/* { dg-final { scan-assembler-times "xscvdpspn" 2 } } */
+/* { dg-final { scan-assembler-times "xxspltw"   2 } } */
+/* { dg-final { scan-assembler-times "mtvsrws"   1 } } */
+/* { dg-final { scan-assembler-times "lxvwsx"    1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c
new file mode 100644
index 00000000000..8a121da2572
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c
@@ -0,0 +1,61 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+
+#include <altivec.h>
+
+typedef vector signed char	v16qi_t;
+typedef vector short		v8hi_t;
+typedef vector int		v4si_t;
+typedef vector long long	v2di_t;
+
+void v16qi_0a  (v16qi_t *p) { *p = (v16qi_t) { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; }
+void v8hi_0a   (v8hi_t  *p) { *p = (v8hi_t)  { 0, 0, 0, 0, 0, 0, 0, 0 }; }
+void v4si_0a   (v4si_t  *p) { *p = (v4si_t)  { 0, 0, 0, 0 }; }
+void v2di_0a   (v2di_t  *p) { *p = (v2di_t)  { 0, 0 }; }
+
+void v16qi_0b  (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)0); }
+void v8hi_0b   (v8hi_t  *p) { *p = (v8hi_t)  vec_splats ((short)0); }
+void v4si_0b   (v4si_t  *p) { *p = (v4si_t)  vec_splats ((int)0); }
+void v2di_0b   (v2di_t  *p) { *p = (v2di_t)  vec_splats ((long long)0); }
+
+void v16qi_m1a (v16qi_t *p) { *p = (v16qi_t) { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; }
+void v8hi_m1a  (v8hi_t  *p) { *p = (v8hi_t)  { -1, -1, -1, -1, -1, -1, -1, -1 }; }
+void v4si_m1a  (v4si_t  *p) { *p = (v4si_t)  { -1, -1, -1, -1 }; }
+void v2di_m1a  (v2di_t  *p) { *p = (v2di_t)  { -1, -1 }; }
+
+void v16qi_m1b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)-1); }
+void v8hi_m1b  (v8hi_t  *p) { *p = (v8hi_t)  vec_splats ((short)-1); }
+void v4si_m1b  (v4si_t  *p) { *p = (v4si_t)  vec_splats ((int)-1); }
+void v2di_m1b  (v2di_t  *p) { *p = (v2di_t)  vec_splats ((long long)-1); }
+
+void v16qi_5a  (v16qi_t *p) { *p = (v16qi_t) { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }; }
+void v8hi_5a   (v8hi_t  *p) { *p = (v8hi_t)  { 5, 5, 5, 5, 5, 5, 5, 5 }; }
+void v4si_5a   (v4si_t  *p) { *p = (v4si_t)  { 5, 5, 5, 5 }; }
+void v2di_5a   (v2di_t  *p) { *p = (v2di_t)  { 5, 5 }; }
+
+void v16qi_5b  (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)5); }
+void v8hi_5b   (v8hi_t  *p) { *p = (v8hi_t)  vec_splats ((short)5); }
+void v4si_5b   (v4si_t  *p) { *p = (v4si_t)  vec_splats ((int)5); }
+void v2di_5b   (v2di_t  *p) { *p = (v2di_t)  vec_splats ((long long)5); }
+
+void v16qi_33a (v16qi_t *p) { *p = (v16qi_t) { 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33 }; }
+void v8hi_33a  (v8hi_t  *p) { *p = (v8hi_t)  { 33, 33, 33, 33, 33, 33, 33, 33 }; }
+void v4si_33a  (v4si_t  *p) { *p = (v4si_t)  { 33, 33, 33, 33 }; }
+void v2di_33a  (v2di_t  *p) { *p = (v2di_t)  { 33, 33 }; }
+
+void v16qi_33b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)33); }
+void v8hi_33b  (v8hi_t  *p) { *p = (v8hi_t)  vec_splats ((short)33); }
+void v4si_33b  (v4si_t  *p) { *p = (v4si_t)  vec_splats ((int)33); }
+void v2di_33b  (v2di_t  *p) { *p = (v2di_t)  vec_splats ((long long)33); }
+
+/* { dg-final { scan-assembler     "xxspltib"     } } */
+/* { dg-final { scan-assembler     "vextsb2d"     } } */
+/* { dg-final { scan-assembler     "vextsb2w"     } } */
+/* { dg-final { scan-assembler     "vupk\[hl\]sb" } } */
+/* { dg-final { scan-assembler-not "lxvd2x"       } } */
+/* { dg-final { scan-assembler-not "lxvw4x"       } } */
+/* { dg-final { scan-assembler-not "lxv "         } } */
+/* { dg-final { scan-assembler-not "lxvx"         } } */
+/* { dg-final { scan-assembler-not "lvx"          } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c
new file mode 100644
index 00000000000..d643324afe1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+
+#include <altivec.h>
+
+vector long long foo (long long a) { return (vector long long) { a, a }; }
+
+/* { dg-final { scan-assembler "mtvsrdd" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vneg.c b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c
new file mode 100644
index 00000000000..10041c94fae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vneg.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { powerpc64*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+/* Verify P9 vector negate instructions.  */
+
+vector long long v2di_neg (vector long long a) { return -a; }
+vector int v4si_neg (vector int a) { return -a; }
+
+/* { dg-final { scan-assembler "vnegd" } } */
+/* { dg-final { scan-assembler "vnegw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vparity.c b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c
new file mode 100644
index 00000000000..e4c20870717
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c
@@ -0,0 +1,107 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2 -mlra -mvsx-timode" } */
+
+#include <altivec.h>
+
+vector int
+parity_v4si_1s (vector int a)
+{
+  return vec_vprtyb (a);
+}
+
+vector int
+parity_v4si_2s (vector int a)
+{
+  return vec_vprtybw (a);
+}
+
+vector unsigned int
+parity_v4si_1u (vector unsigned int a)
+{
+  return vec_vprtyb (a);
+}
+
+vector unsigned int
+parity_v4si_2u (vector unsigned int a)
+{
+  return vec_vprtybw (a);
+}
+
+vector long long
+parity_v2di_1s (vector long long a)
+{
+  return vec_vprtyb (a);
+}
+
+vector long long
+parity_v2di_2s (vector long long a)
+{
+  return vec_vprtybd (a);
+}
+
+vector unsigned long long
+parity_v2di_1u (vector unsigned long long a)
+{
+  return vec_vprtyb (a);
+}
+
+vector unsigned long long
+parity_v2di_2u (vector unsigned long long a)
+{
+  return vec_vprtybd (a);
+}
+
+vector __int128_t
+parity_v1ti_1s (vector __int128_t a)
+{
+  return vec_vprtyb (a);
+}
+
+vector __int128_t
+parity_v1ti_2s (vector __int128_t a)
+{
+  return vec_vprtybq (a);
+}
+
+__int128_t
+parity_ti_3s (__int128_t a)
+{
+  return vec_vprtyb (a);
+}
+
+__int128_t
+parity_ti_4s (__int128_t a)
+{
+  return vec_vprtybq (a);
+}
+
+vector __uint128_t
+parity_v1ti_1u (vector __uint128_t a)
+{
+  return vec_vprtyb (a);
+}
+
+vector __uint128_t
+parity_v1ti_2u (vector __uint128_t a)
+{
+  return vec_vprtybq (a);
+}
+
+__uint128_t
+parity_ti_3u (__uint128_t a)
+{
+  return vec_vprtyb (a);
+}
+
+__uint128_t
+parity_ti_4u (__uint128_t a)
+{
+  return vec_vprtybq (a);
+}
+
+/* { dg-final { scan-assembler "vprtybd" } } */
+/* { dg-final { scan-assembler "vprtybq" } } */
+/* { dg-final { scan-assembler "vprtybw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c b/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c
new file mode 100644
index 00000000000..7e7a266e1ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-vpermr.c
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+/* Test generation of VPERMR/XXPERMR on ISA 3.0 in little endian.  */
+
+#include <altivec.h>
+
+vector long long
+permute (vector long long *p, vector long long *q, vector unsigned char mask)
+{
+  vector long long a = *p;
+  vector long long b = *q;
+
+  /* Force a, b to be in altivec registers to select vpermr insn.  */
+  __asm__ (" # a: %x0, b: %x1" : "+v" (a), "+v" (b));
+
+  return vec_perm (a, b, mask);
+}
+
+/* { dg-final { scan-assembler "vpermr\|xxpermr" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70963.c b/gcc/testsuite/gcc.target/powerpc/pr70963.c
new file mode 100644
index 00000000000..128ebd9f09f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70963.c
@@ -0,0 +1,44 @@
+/* { dg-do run { target powerpc64*-*-* } } */
+/* { dg-require-effective-target p8vector_hw } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <altivec.h>
+
+static int failed;
+static void test (void);
+
+static void check (int result, const char *name)
+{
+  if (!result)
+    {
+      failed++;
+      printf ("fail %s\n", name);
+    }
+}
+    
+int main (void)
+{
+  test ();
+  if (failed)
+    abort ();
+  return 0;
+}
+
+vector double x = { 81.0, 76.0 };
+vector long long y = { 81, 76 };
+
+static void test()
+{
+  vector long long a = vec_cts (x, 0);
+  vector double b = vec_ctf (a, 0);
+  vector long long c = __builtin_vsx_xvcvdpuxds_scale (x, 0);
+  vector double d = vec_ctf (c, 0);
+  check (vec_all_eq (a, y), "vec_cts");
+  check (vec_all_eq (b, x), "vec_ctf");
+  check (vec_all_eq (c, y), "xvcvdpuxds");
+  check (vec_all_eq (d, x), "vec_ctf unsigned");
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71186.c b/gcc/testsuite/gcc.target/powerpc/pr71186.c
new file mode 100644
index 00000000000..22762ccafb7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71186.c
@@ -0,0 +1,32 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+
+static unsigned short x[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16)));
+static unsigned short y[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16)));
+static unsigned short a;
+
+void obfuscate(void *a, ...);
+
+static void __attribute__((noinline)) do_one(void)
+{
+ unsigned long i;
+
+ obfuscate(x, y, &a);
+
+ for (i = 0; i < (16384/sizeof(unsigned short)); i++)
+  y[i] = a * x[i];
+
+ obfuscate(x, y, &a);
+}
+
+int main(void)
+{
+ unsigned long i;
+
+ for (i = 0; i < 1000000; i++)
+  do_one();
+
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71493-1.c b/gcc/testsuite/gcc.target/powerpc/pr71493-1.c
new file mode 100644
index 00000000000..9ec9da0fbed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71493-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target { powerpc*-*-linux* && ilp32 } } } */
+/* { dg-options "-O2 -msvr4-struct-return" } */
+
+struct S1 { float f; };
+
+struct S1 foo1 (void)
+{
+  struct S1 s = { 1.0f };
+  return s;
+}
+
+/* { dg-final { scan-assembler     "lwz" } } */
+/* { dg-final { scan-assembler-not "lfs" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71493-2.c b/gcc/testsuite/gcc.target/powerpc/pr71493-2.c
new file mode 100644
index 00000000000..e9184a605be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71493-2.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target { powerpc*-*-linux* && ilp32 } } } */
+/* { dg-options "-O2 -msvr4-struct-return" } */
+
+struct S2 { double d; };
+
+struct S2 foo2 (void)
+{
+  struct S2 s = { 1.0 };
+  return s;
+}
+
+/* { dg-final { scan-assembler     "lwz" } } */
+/* { dg-final { scan-assembler-not "lfd" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71656-1.c b/gcc/testsuite/gcc.target/powerpc/pr71656-1.c
new file mode 100644
index 00000000000..fa6b4ffb816
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71656-1.c
@@ -0,0 +1,20 @@
+/* Test for reload ICE arising from POWER9 Vector Dform code generation.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector -mno-lra" } */
+
+typedef __attribute__((altivec(vector__))) int type_t;
+type_t
+func (type_t *src)
+{
+  asm volatile ("# force the base reg on the load below to be spilled"
+                   : /* no outputs */
+                   : /* no inputs */
+                   : "r0", "r3", "r4", "r5", "r6", "r7",
+                     "r8", "r9", "r10", "r11", "r12", "r14", "r15",
+                     "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+                     "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31");
+  return src[1];
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71656-2.c b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c
new file mode 100644
index 00000000000..99855fa1667
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c
@@ -0,0 +1,47 @@
+/* Test for reload ICE arising from POWER9 Vector Dform code generation.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -mno-lra -funroll-loops -fno-aggressive-loop-optimizations" } */
+
+typedef double vec[3];
+struct vec_t
+{
+  vec x;
+  vec y;
+};
+int a, j, k, l, m, n, o, p, q;
+double b, i;
+vec c;
+double h[6];
+void func1 (vec);
+
+void
+func2 (double *b)
+{
+  for (; k; k--)
+    for (; j <= k;)
+      for (; m <= q; m++)
+	for (; n <= k; n++)
+	  for (; o <= l; o++)
+	    {
+	      j = p + m + n + o;
+	      h[j] = i;
+	    }
+}
+
+void
+func3 (void)
+{
+  struct vec_t d;
+  func1 (d.y);
+  func2 (&b);
+  for (; a;)
+    {
+      double *e = d.y, *g;
+      double f;
+      c[0] = g[0] + f * e[0];
+      c[1] = g[1] + f * e[1];
+      func1 (c);
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71670.c b/gcc/testsuite/gcc.target/powerpc/pr71670.c
new file mode 100644
index 00000000000..18fb62759d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71670.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O1" } */
+
+volatile int a;
+int b;
+void fn1(void) { b + (long)b || a; }
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71698.c b/gcc/testsuite/gcc.target/powerpc/pr71698.c
new file mode 100644
index 00000000000..c752f64e1c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71698.c
@@ -0,0 +1,13 @@
+/* Test for a reload ICE arising from trying to direct move a TDmode value.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target dfp } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */
+
+extern void testvad128 (int n, ...);
+void
+testitd128 (_Decimal128 g01d128)
+{
+  testvad128 (1, g01d128);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71720.c b/gcc/testsuite/gcc.target/powerpc/pr71720.c
new file mode 100644
index 00000000000..732daf97595
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71720.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+/* Verify that we generate xxspltw <reg>,<reg>,0 for V4SFmode splat.  */
+
+vector float
+splat_v4sf (float f)
+{
+  return (vector float) { f, f, f, f };
+}
+
+/* { dg-final { scan-assembler "xscvdpspn "      } } */
+/* { dg-final { scan-assembler "xxspltw .*,.*,0" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c
new file mode 100644
index 00000000000..b36ddfa26b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c
@@ -0,0 +1,25 @@
+// PR target/71763
+// { dg-do compile }
+// { dg-options "-O1 -mvsx" }
+
+int a, b;
+float c;
+
+void fn2(void);
+
+void fn1(void)
+{
+        long d;
+
+        for (d = 3; d; d--) {
+                for (a = 0; a <= 1; a++) {
+                        b &= 1;
+                        if (b) {
+                                for (;;) {
+                                        fn2();
+                                        c = d;
+                                }
+                        }
+                }
+        }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71805.c b/gcc/testsuite/gcc.target/powerpc/pr71805.c
new file mode 100644
index 00000000000..02db059dff9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71805.c
@@ -0,0 +1,113 @@
+/* { dg-require-effective-target p9vector_hw } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O3 --param tree-reassoc-width=1" } */
+
+/* Originally from gcc.dg/vect/pr45752.c.  */
+#include <stdarg.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+extern void abort (void);
+extern void exit (int);
+#ifdef __cplusplus
+}
+#endif
+
+#define M00 100
+#define M10 216
+#define M20 23
+#define M30 237
+#define M40 437
+
+#define M01 1322
+#define M11 13
+#define M21 27271
+#define M31 2280
+#define M41 284
+
+#define M02 74
+#define M12 191
+#define M22 500
+#define M32 111
+#define M42 1114
+
+#define M03 134
+#define M13 117
+#define M23 11
+#define M33 771
+#define M43 71
+
+#define M04 334
+#define M14 147
+#define M24 115
+#define M34 7716
+#define M44 16
+
+#define N 20
+
+void foo (unsigned int *__restrict__ pInput,
+          unsigned int *__restrict__ pOutput,
+          unsigned int *__restrict__ pInput2,
+          unsigned int *__restrict__ pOutput2)
+{
+  unsigned int i, a, b, c, d, e;
+
+  for (i = 0; i < N / 5; i++)
+    {
+       a = *pInput++;
+       b = *pInput++;
+       c = *pInput++;
+       d = *pInput++;
+       e = *pInput++;
+
+       *pOutput++ = M00 * a + M01 * b + M02 * c + M03 * d + M04 * e;
+       *pOutput++ = M10 * a + M11 * b + M12 * c + M13 * d + M14 * e;
+       *pOutput++ = M20 * a + M21 * b + M22 * c + M23 * d + M24 * e;
+       *pOutput++ = M30 * a + M31 * b + M32 * c + M33 * d + M34 * e;
+       *pOutput++ = M40 * a + M41 * b + M42 * c + M43 * d + M44 * e;
+
+
+       a = *pInput2++;
+       b = *pInput2++;
+       c = *pInput2++;
+       d = *pInput2++;
+       e = *pInput2++;
+
+       *pOutput2++ = M00 * a + M01 * b + M02 * c + M03 * d + M04 * e;
+       *pOutput2++ = M10 * a + M11 * b + M12 * c + M13 * d + M14 * e;
+       *pOutput2++ = M20 * a + M21 * b + M22 * c + M23 * d + M24 * e;
+       *pOutput2++ = M30 * a + M31 * b + M32 * c + M33 * d + M34 * e;
+       *pOutput2++ = M40 * a + M41 * b + M42 * c + M43 * d + M44 * e;
+
+    }
+}
+
+int main (int argc, const char* argv[])
+{
+  unsigned int input[N], output[N], i, input2[N], output2[N];
+  unsigned int check_results[N]
+    = {3208, 1334, 28764, 35679, 2789, 13028, 4754, 168364, 91254, 12399, 
+    22848, 8174, 307964, 146829, 22009, 32668, 11594, 447564, 202404, 31619 };
+  unsigned int check_results2[N]
+    = {7136, 2702, 84604, 57909, 6633, 16956, 6122, 224204, 113484, 16243, 
+    26776, 9542, 363804, 169059, 25853, 36596, 12962, 503404, 224634, 35463 };
+
+  for (i = 0; i < N; i++)
+    {
+      input[i] = i%256;
+      input2[i] = i + 2;
+      output[i] = 0;
+      output2[i] = 0;
+      __asm__ volatile ("");
+    }
+
+  foo (input, output, input2, output2);
+
+  for (i = 0; i < N; i++)
+    if (output[i] != check_results[i]
+        || output2[i] != check_results2[i])
+      abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr72853.c b/gcc/testsuite/gcc.target/powerpc/pr72853.c
new file mode 100644
index 00000000000..8eae7d4a41d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr72853.c
@@ -0,0 +1,108 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O3 -mupper-regs-df -mupper-regs-sf -funroll-loops" } */
+
+/* derived from 20021120-1.c, compiled for -mcpu=power9.  */
+
+extern void abort (void);
+extern void exit (int);
+
+volatile double gd[32];
+volatile float gf[32];
+
+void
+foo (int n)
+{
+  double d00, d10, d20, d30, d01, d11, d21, d31, d02, d12, d22, d32, d03, d13,
+    d23, d33, d04, d14, d24, d34, d05, d15, d25, d35, d06, d16, d26, d36, d07,
+    d17, d27, d37;
+  float f00, f10, f20, f30, f01, f11, f21, f31, f02, f12, f22, f32, f03, f13,
+    f23, f33, f04, f14, f24, f34, f05, f15, f25, f35, f06, f16, f26, f36, f07,
+    f17, f27, f37;
+  volatile double *pd;
+  volatile float *pf;
+  int i;
+
+  pd = gd;
+  d00 = *(pd++), d10 = *(pd++), d20 = *(pd++), d30 = *(pd++), d01 =
+    *(pd++), d11 = *(pd++), d21 = *(pd++), d31 = *(pd++), d02 = *(pd++), d12 =
+    *(pd++), d22 = *(pd++), d32 = *(pd++), d03 = *(pd++), d13 = *(pd++), d23 =
+    *(pd++), d33 = *(pd++), d04 = *(pd++), d14 = *(pd++), d24 = *(pd++), d34 =
+    *(pd++), d05 = *(pd++), d15 = *(pd++), d25 = *(pd++), d35 = *(pd++), d06 =
+    *(pd++), d16 = *(pd++), d26 = *(pd++), d36 = *(pd++), d07 = *(pd++), d17 =
+    *(pd++), d27 = *(pd++), d37 = *(pd++);
+  for (i = 0; i < n; i++)
+    {
+      pf = gf;
+      f00 = *(pf++), f10 = *(pf++), f20 = *(pf++), f30 = *(pf++), f01 =
+	*(pf++), f11 = *(pf++), f21 = *(pf++), f31 = *(pf++), f02 =
+	*(pf++), f12 = *(pf++), f22 = *(pf++), f32 = *(pf++), f03 =
+	*(pf++), f13 = *(pf++), f23 = *(pf++), f33 = *(pf++), f04 =
+	*(pf++), f14 = *(pf++), f24 = *(pf++), f34 = *(pf++), f05 =
+	*(pf++), f15 = *(pf++), f25 = *(pf++), f35 = *(pf++), f06 =
+	*(pf++), f16 = *(pf++), f26 = *(pf++), f36 = *(pf++), f07 =
+	*(pf++), f17 = *(pf++), f27 = *(pf++), f37 = *(pf++);
+      pd = gd;
+      d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
+	*(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
+	*(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
+	*(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
+	*(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
+	*(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
+	*(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
+	*(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
+      pd = gd;
+      d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
+	*(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
+	*(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
+	*(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
+	*(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
+	*(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
+	*(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
+	*(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
+      pd = gd;
+      d00 += *(pd++), d10 += *(pd++), d20 += *(pd++), d30 += *(pd++), d01 +=
+	*(pd++), d11 += *(pd++), d21 += *(pd++), d31 += *(pd++), d02 +=
+	*(pd++), d12 += *(pd++), d22 += *(pd++), d32 += *(pd++), d03 +=
+	*(pd++), d13 += *(pd++), d23 += *(pd++), d33 += *(pd++), d04 +=
+	*(pd++), d14 += *(pd++), d24 += *(pd++), d34 += *(pd++), d05 +=
+	*(pd++), d15 += *(pd++), d25 += *(pd++), d35 += *(pd++), d06 +=
+	*(pd++), d16 += *(pd++), d26 += *(pd++), d36 += *(pd++), d07 +=
+	*(pd++), d17 += *(pd++), d27 += *(pd++), d37 += *(pd++);
+      pf = gf;
+      *(pf++) = f00, *(pf++) = f10, *(pf++) = f20, *(pf++) = f30, *(pf++) =
+	f01, *(pf++) = f11, *(pf++) = f21, *(pf++) = f31, *(pf++) =
+	f02, *(pf++) = f12, *(pf++) = f22, *(pf++) = f32, *(pf++) =
+	f03, *(pf++) = f13, *(pf++) = f23, *(pf++) = f33, *(pf++) =
+	f04, *(pf++) = f14, *(pf++) = f24, *(pf++) = f34, *(pf++) =
+	f05, *(pf++) = f15, *(pf++) = f25, *(pf++) = f35, *(pf++) =
+	f06, *(pf++) = f16, *(pf++) = f26, *(pf++) = f36, *(pf++) =
+	f07, *(pf++) = f17, *(pf++) = f27, *(pf++) = f37;
+    }
+  pd = gd;
+  *(pd++) = d00, *(pd++) = d10, *(pd++) = d20, *(pd++) = d30, *(pd++) =
+    d01, *(pd++) = d11, *(pd++) = d21, *(pd++) = d31, *(pd++) = d02, *(pd++) =
+    d12, *(pd++) = d22, *(pd++) = d32, *(pd++) = d03, *(pd++) = d13, *(pd++) =
+    d23, *(pd++) = d33, *(pd++) = d04, *(pd++) = d14, *(pd++) = d24, *(pd++) =
+    d34, *(pd++) = d05, *(pd++) = d15, *(pd++) = d25, *(pd++) = d35, *(pd++) =
+    d06, *(pd++) = d16, *(pd++) = d26, *(pd++) = d36, *(pd++) = d07, *(pd++) =
+    d17, *(pd++) = d27, *(pd++) = d37;
+}
+
+int
+main ()
+{
+  int i;
+
+  for (i = 0; i < 32; i++)
+    gd[i] = i, gf[i] = i;
+  foo (1);
+  for (i = 0; i < 32; i++)
+    if (gd[i] != i * 4 || gf[i] != i)
+      abort ();
+  exit (0);
+}
+
+/* { dg-final { scan-assembler-not "stxsd \[0-9\]+,\[0-9\]+,\[0-9\]"  } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
new file mode 100644
index 00000000000..bdfeb702663
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2 -mfloat128" } */
+
+int do_signbit_kf (__float128 a) { return __builtin_signbit (a); }
+int do_signbit_if (__ibm128 a) { return __builtin_signbit (a); }
+int do_signbit_tf (long double a) { return __builtin_signbit (a); }
+
+/* { dg-final { scan-assembler-not   "stxvd2x"  } } */
+/* { dg-final { scan-assembler-not   "stxvw4x"  } } */
+/* { dg-final { scan-assembler-not   "stxsd"    } } */
+/* { dg-final { scan-assembler-not   "stxsdx"   } } */
+/* { dg-final { scan-assembler-times "mfvsrd" 3 } } */
+/* { dg-final { scan-assembler-times "srdi"   3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
new file mode 100644
index 00000000000..b5bd856d909
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2 -mfloat128" } */
+
+int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); }
+
+/* { dg-final { scan-assembler-not   "stxvd2x"  } } */
+/* { dg-final { scan-assembler-not   "stxvw4x"  } } */
+/* { dg-final { scan-assembler-not   "stxsd"    } } */
+/* { dg-final { scan-assembler-not   "stxsdx"   } } */
+/* { dg-final { scan-assembler-not   "lxvd2x"   } } */
+/* { dg-final { scan-assembler-not   "lxvw4x"   } } */
+/* { dg-final { scan-assembler-not   "lxsd"     } } */
+/* { dg-final { scan-assembler-not   "lxsdx"    } } */
+/* { dg-final { scan-assembler-times "ld"     1 } } */
+/* { dg-final { scan-assembler-times "srdi"   1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-3.c b/gcc/testsuite/gcc.target/powerpc/signbit-3.c
new file mode 100644
index 00000000000..cd64143fc2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-3.c
@@ -0,0 +1,172 @@
+/* { dg-do run { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target ppc_float128_sw } */
+/* { dg-options "-mcpu=power7 -O2 -mfloat128 -lm" } */
+
+#ifdef DEBUG
+#include <stdio.h>
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <stdlib.h>
+#include <math.h>
+
+#if defined(__BIG_ENDIAN__)
+struct ieee128 {
+  uint64_t upper;
+  uint64_t lower;
+};
+
+#elif defined(__LITTLE_ENDIAN__)
+struct ieee128 {
+  uint64_t lower;
+  uint64_t upper;
+};
+
+#else
+#error "Unknown system"
+#endif
+
+union ieee_union {
+  __float128 f128;
+  struct ieee128 st128;
+};
+
+#ifdef DEBUG
+static int num_errors = 0;
+
+__attribute__((__noinline__))
+static void
+failure (int expected, int got, __float128 x)
+{
+  unsigned sign;
+  unsigned exponent;
+  uint64_t mantissa1;
+  uint64_t mantissa2;
+  uint64_t upper;
+  uint64_t lower;
+
+  union ieee_union u;
+
+  u.f128 = x;
+  upper  = u.st128.upper;
+  lower  = u.st128.lower;
+
+  sign      = (unsigned)((upper >> 63) & 1);
+  exponent  = (unsigned)((upper >> 48) & ((((uint64_t)1) << 16) - 1));
+  mantissa1 = (upper & ((((uint64_t)1) << 48) - 1));
+  mantissa2 = lower;
+
+  printf ("Expected %d, got %d, %c 0x%.4x 0x%.12" PRIx64 " 0x%.16" PRIx64,
+	  expected, got,
+	  sign ? '-' : '+',
+	  exponent,
+	  mantissa1,
+	  mantissa2);
+
+  num_errors++;
+}
+
+#else
+
+#define failure(E, G, F) abort ()
+#endif
+
+__attribute__((__noinline__))
+static void
+test_signbit_arg (__float128 f128, int expected)
+{
+  int sign = __builtin_signbit (f128);
+
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (f128, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit_mem (__float128 *ptr, int expected)
+{
+  int sign = __builtin_signbit (*ptr);
+
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (*ptr, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit_gpr (__float128 *ptr, int expected)
+{
+  __float128 f128 = *ptr;
+  int sign;
+
+  __asm__ (" # %0" : "+r" (f128));
+
+  sign = __builtin_signbit (f128);
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (f128, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit (__float128 f128, int expected)
+{
+#ifdef DEBUG
+  union ieee_union u;
+  u.f128 = f128;
+  printf ("Expecting %d, trying %-5g "
+	  "(0x%.16" PRIx64 " 0x%.16" PRIx64 ")\n",
+	  expected, (double)f128,
+	  u.st128.upper, u.st128.lower);
+#endif
+
+  test_signbit_arg (f128,  expected);
+  test_signbit_mem (&f128, expected);
+  test_signbit_gpr (&f128, expected);
+}
+
+int
+main (void)
+{
+  union ieee_union u;
+
+  test_signbit (+0.0q, 0);
+  test_signbit (+1.0q, 0);
+
+  test_signbit (-0.0q, 1);
+  test_signbit (-1.0q, 1);
+
+  test_signbit (__builtin_copysign (__builtin_infq (), +1.0q), 0);
+  test_signbit (__builtin_copysign (__builtin_infq (), -1.0q), 1);
+
+  test_signbit (__builtin_copysign (__builtin_nanq (""), +1.0q), 0);
+  test_signbit (__builtin_copysign (__builtin_nanq (""), -1.0q), 1);
+
+  /* force the bottom double word to have specific bits in the 'sign' bit to
+     make sure we are picking the right word.  */
+  u.f128 = 1.0q;
+  u.st128.lower = 0ULL;
+  test_signbit (u.f128, 0);
+
+  u.st128.lower = ~0ULL;
+  test_signbit (u.f128, 0);
+
+  u.f128 = -1.0q;
+  u.st128.lower = 0ULL;
+  test_signbit (u.f128, 1);
+
+  u.st128.lower = ~0ULL;
+  test_signbit (u.f128, 1);
+
+#ifdef DEBUG
+  printf ("%d error(s) were found\n", num_errors);
+  if (num_errors)
+    return num_errors;
+#endif
+
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
new file mode 100644
index 00000000000..4d66df8ffdf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedInt (__vector unsigned int *p,
+				 __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
new file mode 100644
index 00000000000..28c85655066
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedIntMacro (__vector unsigned int *p,
+				      __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
new file mode 100644
index 00000000000..726c90478c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedShort (__vector unsigned short *p,
+				   __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
new file mode 100644
index 00000000000..d3618db7184
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedShortMacro (__vector unsigned short *p,
+				      __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
new file mode 100644
index 00000000000..e5744d13994
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsignedChar (__vector unsigned char *p,
+				  __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = __builtin_vec_vadu (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
new file mode 100644
index 00000000000..5dc14a956f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsignedCharMacro (__vector unsigned char *p,
+				       __vector unsigned char *q)
+{
+  __vector unsigned char result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absd (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
new file mode 100644
index 00000000000..649811ae0ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p,
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = __builtin_vec_vadub (source_1, source_2);
+  return uc_result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
new file mode 100644
index 00000000000..142c3d39af5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned char
+doAbsoluteDifferenceUnsigned (__vector unsigned char *p,
+			      __vector unsigned char *q)
+{
+  __vector unsigned char source_1, source_2;
+  __vector unsigned char uc_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  uc_result = vec_absdb (source_1, source_2);
+  return uc_result;
+}
+
+/* { dg-final { scan-assembler "vabsdub" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
new file mode 100644
index 00000000000..6d933b9aa78
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsigned (__vector unsigned short *p,
+			      __vector unsigned short *q)
+{
+  __vector unsigned short source_1, source_2;
+  __vector unsigned short us_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  us_result = __builtin_vec_vaduh (source_1, source_2);
+  return us_result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
new file mode 100644
index 00000000000..bf28b713b2c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned short
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned short *p,
+				   __vector unsigned short *q)
+{
+  __vector unsigned short result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absdh (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduh" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
new file mode 100644
index 00000000000..5188d68e143
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsigned (__vector unsigned int *p,
+			      __vector unsigned int *q)
+{
+  __vector unsigned int source_1, source_2;
+  __vector unsigned int ui_result;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  ui_result = __builtin_vec_vaduw (source_1, source_2);
+  return ui_result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
new file mode 100644
index 00000000000..bf93d96d967
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+__vector unsigned int
+doAbsoluteDifferenceUnsignedMacro (__vector unsigned int *p,
+				   __vector unsigned int *q)
+{
+  __vector unsigned int result, source_1, source_2;
+
+  source_1 = *p;
+  source_2 = *q;
+
+  result = vec_absdw (source_1, source_2);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vabsduw" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-0.c b/gcc/testsuite/gcc.target/powerpc/vslv-0.c
new file mode 100644
index 00000000000..9ad04dd92e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vslv-0.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+__vector unsigned char
+doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q)
+{
+  __vector unsigned char result, input, shift_distance;
+  result = __builtin_vec_vslv (input, shift_distance);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vslv" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-1.c b/gcc/testsuite/gcc.target/powerpc/vslv-1.c
new file mode 100644
index 00000000000..2d09543c814
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vslv-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+__vector unsigned char
+doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q)
+{
+  __vector unsigned char result, input, shift_distance;
+  result = vec_slv (input, shift_distance);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vslv" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-0.c b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c
new file mode 100644
index 00000000000..29c7e3fde20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+__vector unsigned char
+doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q)
+{
+  __vector unsigned char result, input, shift_distance;
+  result = __builtin_vec_vsrv (input, shift_distance);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vsrv" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-1.c b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c
new file mode 100644
index 00000000000..cd3f714bd64
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+__vector unsigned char
+doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q)
+{
+  __vector unsigned char result, input, shift_distance;
+  result = vec_srv (input, shift_distance);
+  return result;
+}
+
+/* { dg-final { scan-assembler "vsrv" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c
new file mode 100644
index 00000000000..7ab6d446a23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-1.c
@@ -0,0 +1,143 @@
+/* { dg-do compile { target { powerpc64le*-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O0" } */
+/* { dg-final { scan-assembler-times "lxvd2x" 18 } } */
+/* { dg-final { scan-assembler-times "lxvw4x" 6 } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 18 } } */
+/* { dg-final { scan-assembler-times "stxvw4x" 6 } } */
+/* { dg-final { scan-assembler-times "xxpermdi" 24 } } */
+
+#include <altivec.h>
+
+extern vector double vd, *vdp;
+extern vector signed long long vsll, *vsllp;
+extern vector unsigned long long vull, *vullp;
+extern vector float vf, *vfp;
+extern vector signed int vsi, *vsip;
+extern vector unsigned int vui, *vuip;
+extern double *dp;
+extern signed long long *sllp;
+extern unsigned long long *ullp;
+extern float *fp;
+extern signed int *sip;
+extern unsigned int *uip;
+
+void foo0 (void)
+{
+  vd = vec_xl (0, vdp);
+}
+
+void foo1 (void)
+{
+  vsll = vec_xl (0, vsllp);
+}
+
+void foo2 (void)
+{
+  vull = vec_xl (0, vullp);
+}
+
+void foo3 (void)
+{
+  vf = vec_xl (0, vfp);
+}
+
+void foo4 (void)
+{
+  vsi = vec_xl (0, vsip);
+}
+
+void foo5 (void)
+{
+  vui = vec_xl (0, vuip);
+}
+
+void foo6 (void)
+{
+  vec_xst (vd, 0, vdp);
+}
+
+void foo7 (void)
+{
+  vec_xst (vsll, 0, vsllp);
+}
+
+void foo8 (void)
+{
+  vec_xst (vull, 0, vullp);
+}
+
+void foo9 (void)
+{
+  vec_xst (vf, 0, vfp);
+}
+
+void foo10 (void)
+{
+  vec_xst (vsi, 0, vsip);
+}
+
+void foo11 (void)
+{
+  vec_xst (vui, 0, vuip);
+}
+
+void foo20 (void)
+{
+  vd = vec_xl (0, dp);
+}
+
+void foo21 (void)
+{
+  vsll = vec_xl (0, sllp);
+}
+
+void foo22 (void)
+{
+  vull = vec_xl (0, ullp);
+}
+
+void foo23 (void)
+{
+  vf = vec_xl (0, fp);
+}
+
+void foo24 (void)
+{
+  vsi = vec_xl (0, sip);
+}
+
+void foo25 (void)
+{
+  vui = vec_xl (0, uip);
+}
+
+void foo26 (void)
+{
+  vec_xst (vd, 0, dp);
+}
+
+void foo27 (void)
+{
+  vec_xst (vsll, 0, sllp);
+}
+
+void foo28 (void)
+{
+  vec_xst (vull, 0, ullp);
+}
+
+void foo29 (void)
+{
+  vec_xst (vf, 0, fp);
+}
+
+void foo30 (void)
+{
+  vec_xst (vsi, 0, sip);
+}
+
+void foo31 (void)
+{
+  vec_xst (vui, 0, uip);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c
new file mode 100644
index 00000000000..eb4a13081a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c
@@ -0,0 +1,236 @@
+/* { dg-do compile { target { powerpc64le*-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O0" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 6 } } */
+/* { dg-final { scan-assembler-times "lxvw4x" 6 } } */
+/* { dg-final { scan-assembler-times "lxvh8x" 4 } } */
+/* { dg-final { scan-assembler-times "lxvb16x" 4 } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 6 } } */
+/* { dg-final { scan-assembler-times "stxvw4x" 6 } } */
+/* { dg-final { scan-assembler-times "stxvh8x" 4 } } */
+/* { dg-final { scan-assembler-times "stxvb16x" 4 } } */
+
+#include <altivec.h>
+
+extern vector double vd, *vdp;
+extern vector signed long long vsll, *vsllp;
+extern vector unsigned long long vull, *vullp;
+extern vector float vf, *vfp;
+extern vector signed int vsi, *vsip;
+extern vector unsigned int vui, *vuip;
+extern vector signed short vss, *vssp;
+extern vector unsigned short vus, *vusp;
+extern vector signed char vsc, *vscp;
+extern vector unsigned char vuc, *vucp;
+extern double *dp;
+extern signed long long *sllp;
+extern unsigned long long *ullp;
+extern float *fp;
+extern signed int *sip;
+extern unsigned int *uip;
+extern signed short *ssp;
+extern unsigned short *usp;
+extern signed char *scp;
+extern unsigned char *ucp;
+
+void foo0 (void)
+{
+  vd = vec_xl (0, vdp);
+}
+
+void foo1 (void)
+{
+  vsll = vec_xl (0, vsllp);
+}
+
+void foo2 (void)
+{
+  vull = vec_xl (0, vullp);
+}
+
+void foo3 (void)
+{
+  vf = vec_xl (0, vfp);
+}
+
+void foo4 (void)
+{
+  vsi = vec_xl (0, vsip);
+}
+
+void foo5 (void)
+{
+  vui = vec_xl (0, vuip);
+}
+
+void foo6 (void)
+{
+  vss = vec_xl (0, vssp);
+}
+
+void foo7 (void)
+{
+  vus = vec_xl (0, vusp);
+}
+
+void foo8 (void)
+{
+  vsc = vec_xl (0, vscp);
+}
+
+void foo9 (void)
+{
+  vuc = vec_xl (0, vucp);
+}
+
+void foo10 (void)
+{
+  vec_xst (vd, 0, vdp);
+}
+
+void foo11 (void)
+{
+  vec_xst (vsll, 0, vsllp);
+}
+
+void foo12 (void)
+{
+  vec_xst (vull, 0, vullp);
+}
+
+void foo13 (void)
+{
+  vec_xst (vf, 0, vfp);
+}
+
+void foo14 (void)
+{
+  vec_xst (vsi, 0, vsip);
+}
+
+void foo15 (void)
+{
+  vec_xst (vui, 0, vuip);
+}
+
+void foo16 (void)
+{
+  vec_xst (vss, 0, vssp);
+}
+
+void foo17 (void)
+{
+  vec_xst (vus, 0, vusp);
+}
+
+void foo18 (void)
+{
+  vec_xst (vsc, 0, vscp);
+}
+
+void foo19 (void)
+{
+  vec_xst (vuc, 0, vucp);
+}
+
+void foo20 (void)
+{
+  vd = vec_xl (0, dp);
+}
+
+void foo21 (void)
+{
+  vsll = vec_xl (0, sllp);
+}
+
+void foo22 (void)
+{
+  vull = vec_xl (0, ullp);
+}
+
+void foo23 (void)
+{
+  vf = vec_xl (0, fp);
+}
+
+void foo24 (void)
+{
+  vsi = vec_xl (0, sip);
+}
+
+void foo25 (void)
+{
+  vui = vec_xl (0, uip);
+}
+
+void foo26 (void)
+{
+  vss = vec_xl (0, ssp);
+}
+
+void foo27 (void)
+{
+  vus = vec_xl (0, usp);
+}
+
+void foo28 (void)
+{
+  vsc = vec_xl (0, scp);
+}
+
+void foo29 (void)
+{
+  vuc = vec_xl (0, ucp);
+}
+
+void foo30 (void)
+{
+  vec_xst (vd, 0, dp);
+}
+
+void foo31 (void)
+{
+  vec_xst (vsll, 0, sllp);
+}
+
+void foo32 (void)
+{
+  vec_xst (vull, 0, ullp);
+}
+
+void foo33 (void)
+{
+  vec_xst (vf, 0, fp);
+}
+
+void foo34 (void)
+{
+  vec_xst (vsi, 0, sip);
+}
+
+void foo35 (void)
+{
+  vec_xst (vui, 0, uip);
+}
+
+void foo36 (void)
+{
+  vec_xst (vss, 0, ssp);
+}
+
+void foo37 (void)
+{
+  vec_xst (vus, 0, usp);
+}
+
+void foo38 (void)
+{
+  vec_xst (vsc, 0, scp);
+}
+
+void foo39 (void)
+{
+  vec_xst (vuc, 0, ucp);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c
new file mode 100644
index 00000000000..2888c171c4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-3.c
@@ -0,0 +1,142 @@
+/* { dg-do compile { target { powerpc64-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O0" } */
+/* { dg-final { scan-assembler-times "lxvd2x" 16 } } */
+/* { dg-final { scan-assembler-times "lxvw4x" 8 } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 16 } } */
+/* { dg-final { scan-assembler-times "stxvw4x" 8 } } */
+
+#include <altivec.h>
+
+extern vector double vd, *vdp;
+extern vector signed long long vsll, *vsllp;
+extern vector unsigned long long vull, *vullp;
+extern vector float vf, *vfp;
+extern vector signed int vsi, *vsip;
+extern vector unsigned int vui, *vuip;
+extern double *dp;
+extern signed long long *sllp;
+extern unsigned long long *ullp;
+extern float *fp;
+extern signed int *sip;
+extern unsigned int *uip;
+
+void foo0 (void)
+{
+  vd = vec_xl (0, vdp);
+}
+
+void foo1 (void)
+{
+  vsll = vec_xl (0, vsllp);
+}
+
+void foo2 (void)
+{
+  vull = vec_xl (0, vullp);
+}
+
+void foo3 (void)
+{
+  vf = vec_xl (0, vfp);
+}
+
+void foo4 (void)
+{
+  vsi = vec_xl (0, vsip);
+}
+
+void foo5 (void)
+{
+  vui = vec_xl (0, vuip);
+}
+
+void foo6 (void)
+{
+  vec_xst (vd, 0, vdp);
+}
+
+void foo7 (void)
+{
+  vec_xst (vsll, 0, vsllp);
+}
+
+void foo8 (void)
+{
+  vec_xst (vull, 0, vullp);
+}
+
+void foo9 (void)
+{
+  vec_xst (vf, 0, vfp);
+}
+
+void foo10 (void)
+{
+  vec_xst (vsi, 0, vsip);
+}
+
+void foo11 (void)
+{
+  vec_xst (vui, 0, vuip);
+}
+
+void foo20 (void)
+{
+  vd = vec_xl (0, dp);
+}
+
+void foo21 (void)
+{
+  vsll = vec_xl (0, sllp);
+}
+
+void foo22 (void)
+{
+  vull = vec_xl (0, ullp);
+}
+
+void foo23 (void)
+{
+  vf = vec_xl (0, fp);
+}
+
+void foo24 (void)
+{
+  vsi = vec_xl (0, sip);
+}
+
+void foo25 (void)
+{
+  vui = vec_xl (0, uip);
+}
+
+void foo26 (void)
+{
+  vec_xst (vd, 0, dp);
+}
+
+void foo27 (void)
+{
+  vec_xst (vsll, 0, sllp);
+}
+
+void foo28 (void)
+{
+  vec_xst (vull, 0, ullp);
+}
+
+void foo29 (void)
+{
+  vec_xst (vf, 0, fp);
+}
+
+void foo30 (void)
+{
+  vec_xst (vsi, 0, sip);
+}
+
+void foo31 (void)
+{
+  vec_xst (vui, 0, uip);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
new file mode 100644
index 00000000000..a116316c174
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
@@ -0,0 +1,230 @@
+/* { dg-do compile { target { powerpc64-*-* } } } */
+/* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O0" } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
+/* { dg-final { scan-assembler-times "lxvx" 40 } } */
+/* { dg-final { scan-assembler-times "stxvx" 40 } } */
+
+#include <altivec.h>
+
+extern vector double vd, *vdp;
+extern vector signed long long vsll, *vsllp;
+extern vector unsigned long long vull, *vullp;
+extern vector float vf, *vfp;
+extern vector signed int vsi, *vsip;
+extern vector unsigned int vui, *vuip;
+extern vector signed short vss, *vssp;
+extern vector unsigned short vus, *vusp;
+extern vector signed char vsc, *vscp;
+extern vector unsigned char vuc, *vucp;
+extern double *dp;
+extern signed long long *sllp;
+extern unsigned long long *ullp;
+extern float *fp;
+extern signed int *sip;
+extern unsigned int *uip;
+extern signed short *ssp;
+extern unsigned short *usp;
+extern signed char *scp;
+extern unsigned char *ucp;
+
+void foo0 (void)
+{
+  vd = vec_xl (0, vdp);
+}
+
+void foo1 (void)
+{
+  vsll = vec_xl (0, vsllp);
+}
+
+void foo2 (void)
+{
+  vull = vec_xl (0, vullp);
+}
+
+void foo3 (void)
+{
+  vf = vec_xl (0, vfp);
+}
+
+void foo4 (void)
+{
+  vsi = vec_xl (0, vsip);
+}
+
+void foo5 (void)
+{
+  vui = vec_xl (0, vuip);
+}
+
+void foo6 (void)
+{
+  vss = vec_xl (0, vssp);
+}
+
+void foo7 (void)
+{
+  vus = vec_xl (0, vusp);
+}
+
+void foo8 (void)
+{
+  vsc = vec_xl (0, vscp);
+}
+
+void foo9 (void)
+{
+  vuc = vec_xl (0, vucp);
+}
+
+void foo10 (void)
+{
+  vec_xst (vd, 0, vdp);
+}
+
+void foo11 (void)
+{
+  vec_xst (vsll, 0, vsllp);
+}
+
+void foo12 (void)
+{
+  vec_xst (vull, 0, vullp);
+}
+
+void foo13 (void)
+{
+  vec_xst (vf, 0, vfp);
+}
+
+void foo14 (void)
+{
+  vec_xst (vsi, 0, vsip);
+}
+
+void foo15 (void)
+{
+  vec_xst (vui, 0, vuip);
+}
+
+void foo16 (void)
+{
+  vec_xst (vss, 0, vssp);
+}
+
+void foo17 (void)
+{
+  vec_xst (vus, 0, vusp);
+}
+
+void foo18 (void)
+{
+  vec_xst (vsc, 0, vscp);
+}
+
+void foo19 (void)
+{
+  vec_xst (vuc, 0, vucp);
+}
+
+void foo20 (void)
+{
+  vd = vec_xl (0, dp);
+}
+
+void foo21 (void)
+{
+  vsll = vec_xl (0, sllp);
+}
+
+void foo22 (void)
+{
+  vull = vec_xl (0, ullp);
+}
+
+void foo23 (void)
+{
+  vf = vec_xl (0, fp);
+}
+
+void foo24 (void)
+{
+  vsi = vec_xl (0, sip);
+}
+
+void foo25 (void)
+{
+  vui = vec_xl (0, uip);
+}
+
+void foo26 (void)
+{
+  vss = vec_xl (0, ssp);
+}
+
+void foo27 (void)
+{
+  vus = vec_xl (0, usp);
+}
+
+void foo28 (void)
+{
+  vsc = vec_xl (0, scp);
+}
+
+void foo29 (void)
+{
+  vuc = vec_xl (0, ucp);
+}
+
+void foo30 (void)
+{
+  vec_xst (vd, 0, dp);
+}
+
+void foo31 (void)
+{
+  vec_xst (vsll, 0, sllp);
+}
+
+void foo32 (void)
+{
+  vec_xst (vull, 0, ullp);
+}
+
+void foo33 (void)
+{
+  vec_xst (vf, 0, fp);
+}
+
+void foo34 (void)
+{
+  vec_xst (vsi, 0, sip);
+}
+
+void foo35 (void)
+{
+  vec_xst (vui, 0, uip);
+}
+
+void foo36 (void)
+{
+  vec_xst (vss, 0, ssp);
+}
+
+void foo37 (void)
+{
+  vec_xst (vus, 0, usp);
+}
+
+void foo38 (void)
+{
+  vec_xst (vsc, 0, scp);
+}
+
+void foo39 (void)
+{
+  vec_xst (vuc, 0, ucp);
+}
diff --git a/gcc/testsuite/gcc.target/s390/nolrl-1.c b/gcc/testsuite/gcc.target/s390/nolrl-1.c
new file mode 100644
index 00000000000..e0d1213f78f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/nolrl-1.c
@@ -0,0 +1,19 @@
+/* Make sure the compiler does not try to use a relative long
+   instruction to load the string since it might not meet the
+   alignment requirements of the instruction.  */
+
+/* { dg-do compile } */
+/* { dg-options "-march=z10 -O3 -mzarch" } */
+
+extern void foo (char*);
+
+void
+bar ()
+{
+    unsigned char z[32];
+
+    __builtin_memcpy (z, "\001\000\000\000", 4);
+    foo (z);
+}
+
+/* { dg-final { scan-assembler-not "lrl" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/fpcmp.c b/gcc/testsuite/gcc.target/sparc/fpcmp.c
new file mode 100644
index 00000000000..1255d67442f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpcmp.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mvis4" } */
+
+typedef unsigned char vec8 __attribute__((vector_size(8)));
+
+long test_fpcmple8 (vec8 a, vec8 b)
+{
+  return __builtin_vis_fpcmple8 (a, b);
+}
+
+long test_fpcmpgt8 (vec8 a, vec8 b)
+{
+  return __builtin_vis_fpcmpgt8 (a, b);
+}
+
+/* { dg-final { scan-assembler "fpcmple8\t%" } } */
+/* { dg-final { scan-assembler "fpcmpgt8\t%" } } */
+
diff --git a/gcc/testsuite/gcc.target/sparc/fpcmpu.c b/gcc/testsuite/gcc.target/sparc/fpcmpu.c
new file mode 100644
index 00000000000..816a22d7078
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/fpcmpu.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-mvis4" } */
+
+
+typedef short vec16 __attribute__((vector_size(8)));
+typedef int vec32 __attribute__((vector_size(8)));
+
+long test_fpcmpule16 (vec16 a, vec16 b)
+{
+  return __builtin_vis_fpcmpule16 (a, b);
+}
+
+long test_fpcmpugt16 (vec16 a, vec16 b)
+{
+  return __builtin_vis_fpcmpugt16 (a, b);
+}
+
+long test_fpcmpule32 (vec32 a, vec32 b)
+{
+  return __builtin_vis_fpcmpule32 (a, b);
+}
+
+long test_fpcmpugt32 (vec32 a, vec32 b)
+{
+  return __builtin_vis_fpcmpugt32 (a, b);
+}
+
+/* { dg-final { scan-assembler "fpcmpule16\t%" } } */
+/* { dg-final { scan-assembler "fpcmpugt16\t%" } } */
+/* { dg-final { scan-assembler "fpcmpule32\t%" } } */
+/* { dg-final { scan-assembler "fpcmpugt32\t%" } } */
diff --git a/gcc/testsuite/gcc.target/sparc/vis4misc.c b/gcc/testsuite/gcc.target/sparc/vis4misc.c
new file mode 100644
index 00000000000..b520b12b381
--- /dev/null
+++ b/gcc/testsuite/gcc.target/sparc/vis4misc.c
@@ -0,0 +1,126 @@
+/* { dg-do compile } */
+/* { dg-options "-mvis4" } */
+typedef int __v2si __attribute__((vector_size(8)));
+typedef short __v4hi __attribute__((vector_size(8)));
+typedef unsigned char __v8qi __attribute__((vector_size(8)));
+
+__v8qi test_fpadd8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpadd8 (x, y);
+}
+
+__v8qi test_fpadds8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpadds8 (x, y);
+}
+
+__v8qi test_fpaddus8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpaddus8 (x, y);
+}
+
+__v4hi test_fpaddus16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpaddus16 (x, y);
+}
+
+__v8qi test_fpsub8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpsub8 (x, y);
+}
+
+__v8qi test_fpsubs8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpsubs8 (x, y);
+}
+
+__v8qi test_fpsubus8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpsubus8 (x, y);
+}
+
+__v4hi test_fpsubus16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpsubus16 (x, y);
+}
+
+__v8qi test_fpmax8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpmax8 (x, y);
+}
+
+__v4hi test_fpmax16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpmax16 (x, y);
+}
+
+__v2si test_fpmax32 (__v2si x, __v2si y)
+{
+  return __builtin_vis_fpmax32 (x, y);
+}
+
+__v8qi test_fpmaxu8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpmaxu8 (x, y);
+}
+
+__v4hi test_fpmaxu16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpmaxu16 (x, y);
+}
+
+__v2si test_fpmaxu32 (__v2si x, __v2si y)
+{
+  return __builtin_vis_fpmaxu32 (x, y);
+}
+
+__v8qi test_fpmin8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpmin8 (x, y);
+}
+
+__v4hi test_fpmin16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpmin16 (x, y);
+}
+
+__v2si test_fpmin32 (__v2si x, __v2si y)
+{
+  return __builtin_vis_fpmin32 (x, y);
+}
+
+__v8qi test_fpminu8 (__v8qi x, __v8qi y)
+{
+  return __builtin_vis_fpminu8 (x, y);
+}
+
+__v4hi test_fpminu16 (__v4hi x, __v4hi y)
+{
+  return __builtin_vis_fpminu16 (x, y);
+}
+
+__v2si test_fpminu32 (__v2si x, __v2si y)
+{
+  return __builtin_vis_fpminu32 (x, y);
+}
+
+/* { dg-final { scan-assembler "fpadd8\t%" } } */
+/* { dg-final { scan-assembler "fpadds8\t%" } } */
+/* { dg-final { scan-assembler "fpaddus8\t%" } } */
+/* { dg-final { scan-assembler "fpaddus16\t%" } } */
+/* { dg-final { scan-assembler "fpsub8\t%" } } */
+/* { dg-final { scan-assembler "fpsubs8\t%" } } */
+/* { dg-final { scan-assembler "fpsubus8\t%" } } */
+/* { dg-final { scan-assembler "fpsubus16\t%" } } */
+/* { dg-final { scan-assembler "fpmax8\t%" } } */
+/* { dg-final { scan-assembler "fpmax16\t%" } } */
+/* { dg-final { scan-assembler "fpmax32\t%" } } */
+/* { dg-final { scan-assembler "fpmaxu8\t%" } } */
+/* { dg-final { scan-assembler "fpmaxu16\t%" } } */
+/* { dg-final { scan-assembler "fpmaxu32\t%" } } */
+/* { dg-final { scan-assembler "fpmin8\t%" } } */
+/* { dg-final { scan-assembler "fpmin16\t%" } } */
+/* { dg-final { scan-assembler "fpmin32\t%" } } */
+/* { dg-final { scan-assembler "fpminu8\t%" } } */
+/* { dg-final { scan-assembler "fpminu16\t%" } } */
+/* { dg-final { scan-assembler "fpminu32\t%" } } */
diff --git a/gcc/testsuite/gfortran.dg/allocate_with_source_20.f03 b/gcc/testsuite/gfortran.dg/allocate_with_source_20.f03
new file mode 100644
index 00000000000..67b50ec0d85
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/allocate_with_source_20.f03
@@ -0,0 +1,21 @@
+! { dg-do run }
+
+! Check that PR72698 is fixed.
+! Contributed by Gerhard Steinmetz
+
+module m
+contains
+   integer function f()
+      f = 4
+   end
+end
+program p
+   use m
+   character(3), parameter :: c = 'abc'
+   character(:), allocatable :: z
+   allocate (z, source=repeat(c(2:1), f()))
+   if (len(z) /= 0) call abort()
+   if (z /= "") call abort()
+end
+
+
diff --git a/gcc/testsuite/gfortran.dg/allocate_with_source_21.f03 b/gcc/testsuite/gfortran.dg/allocate_with_source_21.f03
new file mode 100644
index 00000000000..fbf31593157
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/allocate_with_source_21.f03
@@ -0,0 +1,52 @@
+! { dg-do compile }
+
+! Check fix for pr71936.
+! Contributed by Gerhard Steinmetz
+
+program p
+  type t
+  end type
+
+  call test2()
+  call test4()
+  call test1()
+  call test3()
+contains
+  function f_p()
+    class(t), pointer :: f_p(:)
+    nullify(f_p)
+  end
+
+  function f_a()
+    class(t), allocatable :: f_a(:)
+  end
+
+  subroutine test1()
+    class(t), allocatable :: x(:)
+    allocate (x, mold=f_a())
+    deallocate (x)
+    allocate (x, source=f_a())
+  end subroutine
+
+  subroutine test2()
+    class(t), pointer :: x(:)
+    allocate (x, mold=f_p())
+    deallocate (x)
+    allocate (x, source=f_p())
+  end
+
+  subroutine test3()
+    class(t), pointer :: x(:)
+    allocate (x, mold=f_a())
+    deallocate (x)
+    allocate (x, source=f_a())
+  end
+
+  subroutine test4()
+    class(t), allocatable :: x(:)
+    allocate (x, mold=f_p())
+    deallocate (x)
+    allocate (x, source=f_p())
+  end subroutine
+end
+
diff --git a/gcc/testsuite/gfortran.dg/array_constructor_50.f90 b/gcc/testsuite/gfortran.dg/array_constructor_50.f90
new file mode 100644
index 00000000000..c22c980edde
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/array_constructor_50.f90
@@ -0,0 +1,21 @@
+! { dg-do run }
+! PR 71795 - wrong result when putting an array constructor
+! instide an iterator.
+     program test
+
+     implicit none
+     integer :: i,n
+     logical, dimension(1) :: ra
+     logical :: rs
+     integer, allocatable :: a(:)
+
+     allocate ( a(1) )
+
+     n = 1
+     a = 2
+
+     ra = (/ (any(a(i).eq.(/1,2,3/)) ,i=1,n) /)
+     if (.not. all(ra)) call abort
+     rs = any ( (/ (any(a(i).eq.(/1,2,3/)) ,i=1,n) /) )
+     if (.not. rs) call abort
+   end program test
diff --git a/gcc/testsuite/gfortran.dg/class_array_22.f03 b/gcc/testsuite/gfortran.dg/class_array_22.f03
new file mode 100644
index 00000000000..94107419b84
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/class_array_22.f03
@@ -0,0 +1,25 @@
+! { dg-do compile }
+! { dg-options "-frepack-arrays " }
+!
+! Original class_array_11.f03 but with -frepack-arrays a new
+! ICE was produced reported in
+! PR fortran/69659
+!
+! Original testcase by Ian Harvey <ian_harvey@bigpond.com>
+! Reduced by Janus Weil <Janus@gcc.gnu.org>
+
+  IMPLICIT NONE
+
+  TYPE :: ParentVector
+    INTEGER :: a
+  END TYPE ParentVector
+
+CONTAINS
+
+  SUBROUTINE vector_operation(pvec)
+    CLASS(ParentVector), INTENT(INOUT) :: pvec(:)
+    print *,pvec(1)%a
+  END SUBROUTINE
+
+END
+
diff --git a/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90 b/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90
new file mode 100644
index 00000000000..abbb69d66f6
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/comma_IO_extension_1.f90
@@ -0,0 +1,8 @@
+! { dg-do compile }
+! PR 60751
+! Contributed by Walter Spector <w6ws@earthlink.net>
+program extracomma
+  implicit none
+
+  write (*,*), 1, 2, 3 ! { dg-warning "Legacy Extension: Comma before i/o item list" }
+end program
diff --git a/gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90 b/gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90
new file mode 100644
index 00000000000..5e80a174201
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/comma_IO_extension_2.f90
@@ -0,0 +1,9 @@
+! { dg-do compile }
+! { dg-options "-std=legacy" }
+! PR 60751
+! Contributed by Walter Spector <w6ws@earthlink.net>
+program extracomma
+  implicit none
+
+  write (*,*), 1, 2, 3
+end program
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_1.f90 b/gcc/testsuite/gfortran.dg/dec_structure_1.f90
new file mode 100644
index 00000000000..4dfee3c602e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_1.f90
@@ -0,0 +1,56 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Basic STRUCTURE test.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Basic structure
+structure /s1/                ! type s1
+  integer i1
+  logical l1
+  real r1
+  character c1
+end structure                 ! end type s1
+
+record /s1/ r1                ! type (s1) r1
+record /s1/ r1_a(3)           ! type (s1) r1_a(3)
+
+! Basic records
+r1.i1 = 13579                  ! r1%i1 = ...
+r1.l1 = .true.
+r1.r1 = 13.579
+r1.c1 = 'F'
+r1_a(2) = r1
+r1_a(3).r1 = 135.79
+
+if (r1.i1 .ne. 13579) then
+  call aborts("r1.i1")
+endif
+
+if (r1.l1 .neqv. .true.) then
+  call aborts("r1.l1")
+endif
+
+if (r1.r1 .ne. 13.579) then
+  call aborts("r1.r1")
+endif
+
+if (r1.c1 .ne. 'F') then
+  call aborts("r1.c1")
+endif
+
+if (r1_a(2).i1 .ne. 13579) then
+  call aborts("r1_a(2).i1")
+endif
+
+if (r1_a(3).r1 .ne. 135.79) then
+  call aborts("r1_a(3).r1")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_10.f90 b/gcc/testsuite/gfortran.dg/dec_structure_10.f90
new file mode 100644
index 00000000000..2d92b1ad8fd
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_10.f90
@@ -0,0 +1,119 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Runtime tests for rules governing dot ('.') as a member accessor, including
+! voodoo with aliased user-defined vs. intrinsic operators and nested members.
+! See gcc/fortran/match.c (gfc_match_member_sep).
+!
+
+module dec_structure_10
+  ! Operator overload tests with .ne. and constant member
+  structure /s1/
+    integer i
+    integer ne
+    logical b
+  end structure
+
+  ! Operator overload tests with .eq., .test. and nested members
+  structure /s2/
+    record /s1/ eq
+    record /s1/ test
+    record /s1/ and
+    integer i
+  end structure
+
+  ! Deep nested access tests
+  structure /s3/
+    record /s2/ r2
+  end structure
+  structure /s4/
+    record /s3/ r3
+  end structure
+  structure /s5/
+    record /s4/ r4
+  end structure
+  structure /s6/
+    record /s5/ r5
+  end structure
+  structure /s7/
+    record /s6/ r6
+  end structure
+
+  ! Operator overloads to mess with nested member accesses
+  interface operator (.ne.)
+    module procedure ne_func
+  end interface operator (.ne.)
+  interface operator (.eq.)
+    module procedure eq_func
+  end interface operator (.eq.)
+  interface operator (.test.)
+    module procedure tstfunc
+  end interface operator (.test.)
+  contains
+  ! ne_func will be called on (x) .ne. (y)
+  function ne_func (r, i)
+    integer, intent(in) :: i
+    type(s1), intent(in) :: r
+    integer ne_func
+    ne_func = r%i + i
+  end function
+  ! eq_func will be called on (x) .eq. (y)
+  function eq_func (r, i)
+    integer, intent(in) :: i
+    type(s2), intent(in) :: r
+    integer eq_func
+    eq_func = r%eq%i + i
+  end function eq_func
+  ! tstfunc will be called on (x) .test. (y)
+  function tstfunc (r, i)
+    integer, intent(in) :: i
+    type(s2), intent(in) :: r
+    integer tstfunc
+    tstfunc = r%i + i
+  end function tstfunc
+end module
+
+use dec_structure_10
+
+record /s1/ r
+record /s2/ struct
+record /s7/ r7
+integer i, j
+logical l
+struct%eq%i = 5
+i = -5
+
+! Nested access: struct has a member and which has a member b
+l =  struct .and. b   ! struct%and%b
+l =  struct .and. b .or. .false. ! (struct%and%b) .or. (.false.)
+
+! Intrinsic op: r has no member 'ne'
+j =  r .ne. i         ! <intrinsic> ne(r, i)
+j = (r) .ne. i        ! <intrinsic> ne(r, i)
+
+! Intrinsic op; r has a member 'ne' but it is not a record
+j =  r .ne. i         ! <intrinsic> ne(r, i)
+j = (r) .ne. i        ! <intrinsic> ne(r, i)
+
+! Nested access: struct has a member eq which has a member i
+j =  struct .eq. i    ! struct%eq%i
+if ( j .ne. struct%eq%i ) call abort()
+
+! User op: struct is compared to i with eq_func
+j = (struct) .eq. i   ! eq_func(struct, i) -> struct%eq%i + i
+if ( j .ne. struct%eq%i + i ) call abort()
+
+! User op: struct has a member test which has a member i, but test is a uop
+j =  struct .test. i  ! tstfunc(struct, i) -> struct%i + i
+if ( j .ne. struct%i + i ) call abort()
+
+! User op: struct is compared to i with eq_func
+j = (struct) .test. i ! tstfunc(struct, i) -> struct%i + i
+if ( j .ne. struct%i + i ) call abort()
+
+! Deep nested access tests
+r7.r6.r5.r4.r3.r2.i = 1337
+j = r7.r6.r5.r4.r3.r2.i
+if ( j .ne. 1337 ) call abort()
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_11.f90 b/gcc/testsuite/gfortran.dg/dec_structure_11.f90
new file mode 100644
index 00000000000..f6f5b6f9d13
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_11.f90
@@ -0,0 +1,20 @@
+! { dg-do compile }
+! { dg-options "-fdec-structure" }
+!
+! Tests for what CAN'T be done with dot ('.') as a member accessor.
+!
+
+structure /s1/
+  integer eq
+end structure
+
+record /s1/ r
+integer i, j, k
+
+j = i.j          ! { dg-error "nonderived-type variable" }
+j = r .eq. i     ! { dg-error "Operands of comparison" }
+j = r.i          ! { dg-error "is not a member of" }
+j = r.           ! { dg-error "Expected structure component or operator name" }
+j = .i           ! { dg-error "Invalid character in name" }
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_2.f90 b/gcc/testsuite/gfortran.dg/dec_structure_2.f90
new file mode 100644
index 00000000000..18db719c149
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_2.f90
@@ -0,0 +1,41 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test STRUCTUREs containin other STRUCTUREs.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Basic structure
+structure /s1/
+  integer i1
+  logical l1
+  real r1
+  character c1
+end structure
+
+structure /s2/
+  integer i
+  record /s1/ r1
+endstructure
+
+record /s1/ r1
+record /s2/ r2, r2_a(10)
+
+! Nested and array records
+r2.r1.r1 = 135.79
+r2_a(3).r1.i1 = -13579
+
+if (r2.r1.r1 .ne. 135.79) then
+  call aborts("r1.r1.r1")
+endif
+
+if (r2_a(3).r1.i1 .ne. -13579) then
+  call aborts("r2_a(3).r1.i1")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_3.f90 b/gcc/testsuite/gfortran.dg/dec_structure_3.f90
new file mode 100644
index 00000000000..9cb7adb6719
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_3.f90
@@ -0,0 +1,52 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test nested STRUCTURE definitions.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+structure /s3/
+  real p
+  structure /s4/ recrd, recrd_a(3)
+    integer i, j
+  end structure
+  real q
+end structure
+
+record /s3/ r3
+record /s4/ r4
+
+r3.p = 1.3579
+r4.i = 0
+r4.j = 1
+r3.recrd = r4
+r3.recrd_a(1) = r3.recrd
+r3.recrd_a(2).i = 1
+r3.recrd_a(2).j = 0
+
+if (r3.p .ne. 1.3579) then
+  call aborts("r3.p")
+endif
+
+if (r4.i .ne. 0) then
+  call aborts("r4.i")
+endif
+
+if (r4.j .ne. 1) then
+  call aborts("r4.j")
+endif
+
+if (r3.recrd.i .ne. 0 .or. r3.recrd.j .ne. 1) then
+  call aborts("r3.recrd")
+endif
+
+if (r3.recrd_a(2).i .ne. 1 .or. r3.recrd_a(2).j .ne. 0) then
+  call aborts("r3.recrd_a(2)")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_4.f90 b/gcc/testsuite/gfortran.dg/dec_structure_4.f90
new file mode 100644
index 00000000000..a941c220b7e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_4.f90
@@ -0,0 +1,43 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test anonymous STRUCTURE definitions.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+structure /s5/
+  structure recrd, recrd_a(3)
+    real x, y
+  end structure
+end structure
+
+record /s5/ r5
+
+r5.recrd.x = 1.3
+r5.recrd.y = 5.7
+r5.recrd_a(1) = r5.recrd
+r5.recrd_a(2).x = 5.7
+r5.recrd_a(2).y = 1.3
+
+if (r5.recrd.x .ne. 1.3) then
+  call aborts("r5.recrd.x")
+endif
+
+if (r5.recrd.y .ne. 5.7) then
+  call aborts("r5.recrd.y")
+endif
+
+if (r5.recrd_a(1).x .ne. 1.3 .or. r5.recrd_a(1).y .ne. 5.7) then
+  call aborts("r5.recrd_a(1)")
+endif
+
+if (r5.recrd_a(2).x .ne. 5.7 .or. r5.recrd_a(2).y .ne. 1.3) then
+  call aborts("r5.recrd_a(2)")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_5.f90 b/gcc/testsuite/gfortran.dg/dec_structure_5.f90
new file mode 100644
index 00000000000..abda3c3e9fb
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_5.f90
@@ -0,0 +1,49 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test STRUCTUREs which share names with variables.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Special regression where shared names within a module caused an ICE
+! from gfc_get_module_backend_decl
+module dec_structure_5m
+  structure /s6/
+    integer i
+  end structure
+
+  record /s6/ s6
+end module
+
+program dec_structure_5
+  use dec_structure_5m
+
+  structure /s7/
+    real r
+  end structure
+
+  record /s7/ s7(3)
+
+  s6.i = 0
+  s7(1).r = 1.0
+  s7(2).r = 2.0
+  s7(3).r = 3.0
+
+  if (s6.i .ne. 0) then
+    call aborts("s6.i")
+  endif
+
+  if (s7(1).r .ne. 1.0) then
+    call aborts("s7(1).r")
+  endif
+
+  if (s7(2).r .ne. 2.0) then
+    call aborts("s7(2).r")
+  endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_6.f90 b/gcc/testsuite/gfortran.dg/dec_structure_6.f90
new file mode 100644
index 00000000000..6494d71fd1c
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_6.f90
@@ -0,0 +1,46 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test old-style CLIST initializers in STRUCTURE.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+integer, parameter :: as = 3
+structure /s8/
+  character*20 c /"HELLO"/  ! ok
+  integer*2 j /300_4/       ! ok, converted
+  integer   k /65536_8/     ! ok, implicit
+  integer*4 l /200000/      ! ok, types match
+  integer   m(5) /5,4,3,2,1/! ok
+  integer   n(5) /1,3*2,1/  ! ok, with repeat spec (/1,2,2,2,1/)
+  integer   o(as) /as*9/    ! ok, parameter array spec
+  integer   p(2,2) /1,2,3,4/! ok
+  real      q(3) /1_2,3.5,2.4E-12_8/ ! ok, with some implicit conversions
+  integer :: canary = z'3D3D3D3D'
+end structure
+
+record /s8/ r8
+
+! Old-style (clist) initializers in structures
+if ( r8.c /= "HELLO" ) call aborts ("r8.c")
+if ( r8.j /= 300 ) call aborts ("r8.j")
+if ( r8.k /= 65536 ) call aborts ("r8.k")
+if ( r8.l /= 200000 ) call aborts ("r8.l")
+if (     r8.m(1) /= 5 .or. r8.m(2) /= 4 .or. r8.m(3) /= 3 &
+    .or. r8.m(4) /= 2 .or. r8.m(5) /= 1) &
+  call aborts ("r8.m")
+if (     r8.n(1) /= 1 .or. r8.n(2) /= 2 .or. r8.n(3) /= 2 .or. r8.n(4) /= 2 &
+    .or. r8.n(5) /= 1) &
+  call aborts ("r8.n")
+if ( r8.o(1) /= 9 .or. r8.o(2) /= 9 .or. r8.o(3) /= 9 ) call aborts ("r8.o")
+if (     r8.p(1,1) /= 1 .or. r8.p(2,1) /= 2 .or. r8.p(1,2) /= 3 &
+    .or. r8.p(2,2) /= 4) &
+  call aborts ("r8.p")
+if ( r8.canary /= z'3D3D3D3D' ) call aborts ("r8.canary")
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_7.f90 b/gcc/testsuite/gfortran.dg/dec_structure_7.f90
new file mode 100644
index 00000000000..baba1ef2b5f
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_7.f90
@@ -0,0 +1,75 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test passing STRUCTUREs through functions and subroutines.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+module dec_structure_7m
+  structure /s1/
+    integer i1
+    logical l1
+    real r1
+    character c1
+  end structure
+
+  structure /s2/
+    integer i
+    record /s1/ r1
+  endstructure
+
+contains
+  ! Pass structure through subroutine
+  subroutine sub (rec1, i)
+    implicit none
+    integer, intent(in) :: i
+    record /s1/ rec1
+    rec1.i1 = i
+  end subroutine
+
+  ! Pass structure through function
+  function func (rec2, r)
+    implicit none
+    real, intent(in) :: r
+    record /s2/ rec2
+    real func
+    rec2.r1.r1 = r
+    func = rec2.r1.r1
+    return
+  end function
+end module
+
+program dec_structure_7
+  use dec_structure_7m
+
+  implicit none
+  record /s1/ r1
+  record /s2/ r2
+  real junk
+
+  ! Passing through functions and subroutines
+  r1.i1 = 0
+  call sub (r1, 10)
+
+  r2.r1.r1 = 0.0
+  junk = func (r2, -20.14)
+
+  if (r1.i1 .ne. 10) then
+    call aborts("sub(r1, 10)")
+  endif
+
+  if (r2.r1.r1 .ne. -20.14) then
+    call aborts("func(r2, -20.14)")
+  endif
+
+  if (junk .ne. -20.14) then
+    print *, junk
+    call aborts("junk = func()")
+  endif
+
+end program
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_8.f90 b/gcc/testsuite/gfortran.dg/dec_structure_8.f90
new file mode 100644
index 00000000000..160b92a8b96
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_8.f90
@@ -0,0 +1,60 @@
+! { dg-do compile }
+! { dg-options "-fdec-structure -fmax-errors=0" }
+!
+! Comprehensive compile tests for what structures CAN'T do.
+!
+
+! Old-style (clist) initialization
+integer,parameter :: as = 3
+structure /t1/
+  integer*1 a /300_2/       ! { dg-error "Arithmetic overflow" }
+  integer   b //            ! { dg-error "Empty old style initializer list" }
+  integer   c /2*3/         ! { dg-error "Repeat spec invalid in scalar" }
+  integer   d /1,2,3/       ! { dg-error "End of scalar initializer expected" }
+  integer   e /"HI"/        ! { dg-error "Can't convert" }
+  integer   f(as) /4*9/     ! { dg-error "Too many elements" }
+  integer   g(3) /1,3/      ! { dg-error "Not enough elements" }
+  integer   h(3) /1,3,5,7/  ! { dg-error "Too many elements" }
+  integer   i(3) /2*1/      ! { dg-error "Not enough elements" }
+  integer   j(3) /10*1/     ! { dg-error "Too many elements" }
+  integer   k(3) /2.5*3/    ! { dg-error "Repeat spec must be an integer" }
+  integer   l(2) /2*/       ! { dg-error "Expected data constant" }
+  integer   m(1) /          ! { dg-error "Syntax error in old style" }
+  integer   n(2) /1         ! { dg-error "Syntax error in old style" }
+  integer   o(2) /1,        ! { dg-error "Syntax error in old style" }
+  integer   p(1) /x/        ! { dg-error "must be a PARAMETER" }
+end structure
+
+structure              ! { dg-error "Structure name expected" }
+structure /            ! { dg-error "Structure name expected" }
+structure //           ! { dg-error "Structure name expected" }
+structure /.or./       ! { dg-error "Structure name expected" }
+structure /integer/    ! { dg-error "Structure name.*cannot be the same" }
+structure /foo/ bar    ! { dg-error "Junk after" }
+structure /t1/         ! { dg-error "Type definition.*T1" }
+
+record                 ! { dg-error "Structure name expected" }
+record bar             ! { dg-error "Structure name expected" }
+record / bar           ! { dg-error "Structure name expected" }
+record // bar          ! { dg-error "Structure name expected" }
+record foo/ bar        ! { dg-error "Structure name expected" }
+record /foo bar        ! { dg-error "Structure name expected" }
+record /foo/ bar       ! { dg-error "used before it is defined" }
+record /t1/            ! { dg-error "Invalid character in name" }
+
+structure /t2/
+  ENTRY here           ! { dg-error "ENTRY statement.*cannot appear" }
+  integer a
+  integer a            ! { dg-error "Component.*already declared" }
+  structure $z         ! { dg-error "Invalid character in name" }
+  structure //         ! { dg-error "Invalid character in name" }
+  structure // x       ! { dg-error "Invalid character in name" }
+  structure /t3/       ! { dg-error "Invalid character in name" }
+  structure /t3/ x,$y  ! { dg-error "Invalid character in name" }
+  structure /t4/ y
+    integer i, j, k
+  end structure
+  structure /t4/ z     ! { dg-error "Type definition.*T4" }
+end structure
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_structure_9.f90 b/gcc/testsuite/gfortran.dg/dec_structure_9.f90
new file mode 100644
index 00000000000..34c46c61c1c
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_structure_9.f90
@@ -0,0 +1,42 @@
+! { dg-do compile }
+! { dg-options "-fdec-structure" }
+!
+! Basic compile tests for what CAN be done with dot ('.') as a member accessor.
+!
+
+logical :: l, l2 = .true., l3 = .false., and
+integer i
+character(5) s
+real r
+
+structure /s1/
+  integer i
+  character(5) s
+  real r
+end structure
+
+record /s1/ r1
+
+! Basic 
+l = l .and. l2 .or. l3
+l = and .and. and .and. and
+l =  l2 .eqv. l3
+l = (l2) .eqv. l3
+
+! Integers
+l = .not. (i .eq. 0)
+l = .not. (0 .eq. i)
+l = .not. (r1.i .eq. 0)
+l = .not. (0 .eq. r1.i)
+! Characters
+l = .not. (s .eq. "hello")
+l = .not. ("hello" .eq. s)
+l = .not. (r1.s .eq. "hello")
+l = .not. ("hello" .eq. r1.s)
+! Reals
+l = .not. (r .eq. 3.14)
+l = .not. (3.14 .eq. r)
+l = .not. (r1.r .eq. 3.14)
+l = .not. (3.14 .eq. r1.r)
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_1.f90 b/gcc/testsuite/gfortran.dg/dec_union_1.f90
new file mode 100644
index 00000000000..36af53adfe1
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_1.f90
@@ -0,0 +1,66 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test whether union backend declarations are corrently _not_ copied when they
+! are not in fact equal. The structure defined in sub() is seen later, but
+! where siz has a different value.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+subroutine sub ()
+  integer, parameter :: siz = 1024
+  structure /s6/
+    union ! U0
+      map ! M0
+        integer ibuf(siz)
+      end map
+      map ! M1
+        character(8) cbuf(siz)
+      end map
+      map ! M2
+        real rbuf(siz)
+      end map
+    end union
+  end structure
+  record /s6/ r6
+  r6.ibuf(1) = z'badbeef'
+  r6.ibuf(2) = z'badbeef'
+end subroutine
+
+! Repeat definition from subroutine sub with different size parameter.
+! If the structure definition is copied here the stack may get messed up.
+integer, parameter :: siz = 65536
+structure /s6/
+  union ! U12
+    map
+      integer ibuf(siz)
+    end map
+    map
+      character(8) cbuf(siz)
+    end map
+    map
+      real rbuf(siz)
+    end map
+  end union
+end structure
+
+record /s6/ r6
+integer :: r6_canary = 0
+
+! Copied type declaration - this should not cause problems
+i = 1
+do while (i < siz)
+  r6.ibuf(i) = z'badbeef'
+  i = i + 1
+end do
+
+if ( r6_canary .ne. 0 ) then
+  call aborts ('copied decls: overflow')
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_2.f90 b/gcc/testsuite/gfortran.dg/dec_union_2.f90
new file mode 100644
index 00000000000..61e4fd8bd80
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_2.f90
@@ -0,0 +1,60 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test basic UNION implementation.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Empty union
+structure /s0/
+  union ! U0
+    map ! M0
+    end map
+    map ! M1
+    end map
+  end union
+end structure
+
+! Basic unions
+structure /s1/
+  union ! U1
+    map ! M2
+      integer(4) a
+    end map
+    map ! M3
+      real(4) b
+    end map
+  end union
+end structure
+structure /s2/
+  union ! U2
+    map ! M4
+      integer(2) w1, w2
+    end map
+    map ! M5
+      integer(4) long
+    end map
+  end union
+end structure
+
+record /s1/ r1
+record /s2/ r2
+
+! Basic unions
+r1.a = 0
+r1.b = 1.33e7
+if ( r1.a .eq. 0 ) call aborts ("basic union 1")
+
+! Endian-agnostic runtime check
+r2.long = z'12345678'
+if (.not. (     (r2.w1 .eq. z'1234' .and. r2.w2 .eq. z'5678') &
+           .or. (r2.w1 .eq. z'5678' .and. r2.w2 .eq. z'1234')) ) then
+    call aborts ("basic union 2")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_3.f90 b/gcc/testsuite/gfortran.dg/dec_union_3.f90
new file mode 100644
index 00000000000..ce5ae797859
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_3.f90
@@ -0,0 +1,35 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test UNIONs with initializations.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Initialization expressions
+structure /s3/
+  integer(4) :: i = 8
+  union ! U7
+    map
+      integer(4) :: x = 1600
+      integer(4) :: y = 1800
+    end map
+    map
+      integer(2) a, b, c
+    end map
+  end union
+end structure
+
+record /s3/ r3
+
+! Initialized unions
+if ( r3.x .ne. 1600 .or. r3.y .ne. 1800) then
+  r3.x = r3.y ! If r3 isn't used the initializations are optimized out
+  call aborts ("union initialization")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_4.f90 b/gcc/testsuite/gfortran.dg/dec_union_4.f90
new file mode 100644
index 00000000000..4c1c6efe605
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_4.f90
@@ -0,0 +1,63 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test nested UNIONs.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Nested unions
+structure /s4/
+  union ! U0                ! rax
+    map
+      character(16) rx
+    end map
+    map
+      character(8) rh         ! rah
+      union ! U1
+        map
+          character(8) rl     ! ral
+        end map
+        map
+          character(8) ex     ! eax
+        end map
+        map
+          character(4) eh     ! eah
+          union ! U2
+            map
+              character(4) el ! eal
+            end map
+            map
+              character(4) x  ! ax
+            end map
+            map
+              character(2) h  ! ah
+              character(2) l  ! al
+            end map
+          end union
+        end map
+      end union
+    end map
+  end union
+end structure
+record /s4/ r4
+
+
+! Nested unions
+r4.rx     =     'AAAAAAAA.BBB.C.D'
+
+if ( r4.rx .ne. 'AAAAAAAA.BBB.C.D' ) call aborts ("rax")
+if ( r4.rh .ne. 'AAAAAAAA'         ) call aborts ("rah")
+if ( r4.rl .ne.         '.BBB.C.D' ) call aborts ("ral")
+if ( r4.ex .ne.         '.BBB.C.D' ) call aborts ("eax")
+if ( r4.eh .ne.         '.BBB'     ) call aborts ("eah")
+if ( r4.el .ne.             '.C.D' ) call aborts ("eal")
+if ( r4.x  .ne.             '.C.D' ) call aborts ("ax")
+if ( r4.h  .ne.             '.C'   ) call aborts ("ah")
+if ( r4.l  .ne.               '.D' ) call aborts ("al")
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_5.f90 b/gcc/testsuite/gfortran.dg/dec_union_5.f90
new file mode 100644
index 00000000000..bb1611a0289
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_5.f90
@@ -0,0 +1,41 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! Test UNIONs with array components.
+!
+
+subroutine aborts (s)
+  character(*), intent(in) :: s
+  print *, s
+  call abort()
+end subroutine
+
+! Unions with arrays
+structure /s5/
+  union
+    map
+      character :: s(5)
+    end map
+    map
+      integer(1) :: a(5)
+    end map
+  end union
+end structure
+
+record /s5/ r5
+
+! Unions with arrays
+r5.a(1) = z'41'
+r5.a(2) = z'42'
+r5.a(3) = z'43'
+r5.a(4) = z'44'
+r5.a(5) = z'45'
+if (     r5.s(1) .ne. 'A' &
+    .or. r5.s(2) .ne. 'B' &
+    .or. r5.s(3) .ne. 'C' &
+    .or. r5.s(4) .ne. 'D' &
+    .or. r5.s(5) .ne. 'E') then
+  call aborts ("arrays")
+endif
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_6.f90 b/gcc/testsuite/gfortran.dg/dec_union_6.f90
new file mode 100644
index 00000000000..31059c46880
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_6.f90
@@ -0,0 +1,59 @@
+! { dg-do run }
+! { dg-options "-fdec-structure" }
+!
+! sub0 and sub1 test a regression where calling gfc_use_derived from
+! gfc_find_component on the structure type symbol being parsed caused the
+! symbol to be freed and swapped for the previously seen type symbol, leaving
+! dangling pointers and causing all sorts of mayhem.
+!
+
+subroutine sub0 (u)
+  structure /s/
+    union ! U0
+      map ! M0
+        integer i
+      end map
+    end union
+  end structure
+  record /s/ u
+  u.i = 0
+end subroutine sub0
+
+subroutine sub1 ()
+  structure /s/
+    union ! U1
+      map ! M1
+        integer i
+      end map
+    end union
+  end structure
+  record /s/ u
+  interface ! matches the declaration of sub0 above
+    subroutine sub0 (u)
+      structure /s/
+        union ! U2
+          map ! M2
+            integer i ! gfc_find_component should not call gfc_use_derived
+          end map     ! here, otherwise this structure's type symbol is freed
+        end union     ! out from under it
+      end structure
+      record /s/ u
+    end subroutine sub0
+  end interface
+  call sub0(u)
+end subroutine
+
+! If sub0 and sub1 aren't used they may be omitted
+structure /s/
+  union ! U1
+    map ! M3
+      integer i
+    end map
+  end union
+end structure
+record /s/ u
+
+call sub0(u)
+call sub1()
+
+end
diff --git a/gcc/testsuite/gfortran.dg/dec_union_7.f90 b/gcc/testsuite/gfortran.dg/dec_union_7.f90
new file mode 100644
index 00000000000..270f0fbd415
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dec_union_7.f90
@@ -0,0 +1,38 @@
+! { dg-do compile }
+! { dg-options "-fdec-structure" }
+!
+! Comprehensive compile tests for what unions CAN'T do.
+!
+
+! Syntax errors
+structure /s0/
+  union a b c      ! { dg-error "Junk after UNION" }
+  union
+    map a b c      ! { dg-error "Junk after MAP" }
+    integer x      ! { dg-error "Unexpected" }
+    structure /s2/ ! { dg-error "Unexpected" }
+    map
+      map          ! { dg-error "Unexpected" }
+    end map
+  end union
+end structure
+
+! Initialization expressions
+structure /s1/
+  union
+    map
+      integer(4) :: x = 1600 ! { dg-error "Conflicting initializers" }
+      integer(4) :: y = 1800
+    end map
+    map
+      integer(2) a, b, c, d
+      integer :: e = 0 ! { dg-error "Conflicting initializers" }
+    end map
+    map
+      real :: p = 1.3, q = 3.7 ! { dg-error "Conflicting initializers" }
+    end map
+  end union
+end structure
+record /s1/ r1
+
+end
diff --git a/gcc/testsuite/gfortran.dg/deferred_character_17.f90 b/gcc/testsuite/gfortran.dg/deferred_character_17.f90
new file mode 100644
index 00000000000..5a9d725d263
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/deferred_character_17.f90
@@ -0,0 +1,13 @@
+!{ dg-do run }
+
+! Check fix for PR fortran/71623
+
+program allocatemvce
+  implicit none
+  character(len=:), allocatable :: string
+  integer, dimension(4), target :: array = [1,2,3,4]
+  integer, dimension(:), pointer :: array_ptr
+  array_ptr => array
+  ! The allocate used to segfault
+  allocate(character(len=size(array_ptr))::string)
+end program allocatemvce
diff --git a/gcc/testsuite/gfortran.dg/dependency_46.f90 b/gcc/testsuite/gfortran.dg/dependency_46.f90
new file mode 100644
index 00000000000..28942a80769
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dependency_46.f90
@@ -0,0 +1,11 @@
+! { dg-do compile }
+! PR 71783 - this used to ICE due to a missing charlen for the temporary.
+! Test case by Toon Moene.
+
+SUBROUTINE prtdata(ilen)
+  INTEGER :: ilen
+  character(len=ilen), allocatable :: cline(:)
+  allocate(cline(2))
+  cline(1) = 'a'
+  cline(2) = cline(1)
+END SUBROUTINE prtdata
diff --git a/gcc/testsuite/gfortran.dg/dependency_48.f90 b/gcc/testsuite/gfortran.dg/dependency_48.f90
new file mode 100644
index 00000000000..64700193f70
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dependency_48.f90
@@ -0,0 +1,26 @@
+! { dg-do compile }
+! { dg-options "-frepack-arrays -Warray-temporaries -O" }
+
+! Same as dependency_35 but with repack-arrays
+
+module foo
+  implicit none
+contains
+  pure function bar(i,j) ! { dg-warning "Creating array temporary at \\(1\\)" }
+    integer, intent(in) :: i,j
+    integer, dimension(2,2) :: bar
+    bar = 33
+  end function bar
+end module foo
+
+program main
+  use foo
+  implicit none
+  integer a(2,2), b(2,2),c(2,2), d(2,2), e(2)
+
+  read (*,*) b, c, d
+  a = matmul(b,c) + d
+  a = b + bar(3,4)
+  a = bar(3,4)*5 + b
+  e = sum(b,1) + 3
+end program main
diff --git a/gcc/testsuite/gfortran.dg/goacc/cache-2.f95 b/gcc/testsuite/gfortran.dg/goacc/cache-2.f95
new file mode 100644
index 00000000000..be818788556
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/cache-2.f95
@@ -0,0 +1,12 @@
+! OpenACC cache directive: invalid usage.
+! { dg-additional-options "-std=f2008" }
+
+program test
+  implicit none
+  integer :: i, d(10), e(5,13)
+
+  do concurrent (i=1:5)
+    !$acc cache (d) ! { dg-error "" "TODO" { xfail *-*-* } }
+    !$acc cache (e) ! { dg-error "" "TODO" { xfail *-*-* } }
+  enddo
+end
diff --git a/gcc/testsuite/gfortran.dg/goacc/cray-2.f95 b/gcc/testsuite/gfortran.dg/goacc/cray-2.f95
new file mode 100644
index 00000000000..51b79b53636
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/cray-2.f95
@@ -0,0 +1,56 @@
+! { dg-additional-options "-fcray-pointer" }
+! See also cray.f95.
+
+program test
+  call oacc1
+contains
+  subroutine oacc1
+    implicit none
+    integer :: i
+    real :: pointee
+    pointer (ptr, pointee)
+    !$acc declare device_resident (pointee)
+    !$acc declare device_resident (ptr)
+    !$acc data copy (pointee) ! { dg-error "Cray pointee" }
+    !$acc end data
+    !$acc data deviceptr (pointee) ! { dg-error "Cray pointee" }
+    !$acc end data
+    !$acc parallel private (pointee) ! { dg-error "Cray pointee" }
+    !$acc end parallel
+    !$acc host_data use_device (pointee) ! { dg-error "Cray pointee" }
+    !$acc end host_data
+    !$acc parallel loop reduction(+:pointee) ! { dg-error "Cray pointee" }
+    do i = 1,5
+    enddo
+    !$acc end parallel loop
+    !$acc parallel loop
+    do i = 1,5
+      !$acc cache (pointee) ! { dg-error "Cray pointee" }
+    enddo
+    !$acc end parallel loop
+    !$acc update device (pointee) ! { dg-error "Cray pointee" }
+    !$acc update host (pointee) ! { dg-error "Cray pointee" }
+    !$acc update self (pointee) ! { dg-error "Cray pointee" }
+    !$acc data copy (ptr)
+    !$acc end data
+    !$acc data deviceptr (ptr) ! { dg-error "Cray pointer" }
+    !$acc end data
+    !$acc parallel private (ptr)
+    !$acc end parallel
+    !$acc host_data use_device (ptr) ! { dg-error "Cray pointer" }
+    !$acc end host_data
+    !$acc parallel loop reduction(+:ptr) ! { dg-error "Cray pointer" }
+    do i = 1,5
+    enddo
+    !$acc end parallel loop
+    !$acc parallel loop
+    do i = 1,5
+      !TODO: This must fail, as in openacc-1_0-branch.
+      !$acc cache (ptr) ! { dg-error "" "TODO" { xfail *-*-* } }
+    enddo
+    !$acc end parallel loop
+    !$acc update device (ptr)
+    !$acc update host (ptr)
+    !$acc update self (ptr)
+  end subroutine oacc1
+end program test
diff --git a/gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95 b/gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95
new file mode 100644
index 00000000000..79665b948c3
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/loop-1-2.f95
@@ -0,0 +1,176 @@
+! See also loop-1.f95.
+
+program test
+  call test1
+contains
+
+subroutine test1
+  integer :: i, j, k, b(10)
+  integer, dimension (30) :: a
+  double precision :: d
+  real :: r
+  i = 0
+  !$acc loop
+  do 100 ! { dg-error "cannot be a DO WHILE or DO without loop control" }
+    if (i .gt. 0) exit ! { dg-error "EXIT statement" }
+  100 i = i + 1
+  i = 0
+  !$acc loop
+  do ! { dg-error "cannot be a DO WHILE or DO without loop control" }
+      if (i .gt. 0) exit ! { dg-error "EXIT statement" }
+       i = i + 1
+  end do
+  i = 0
+  !$acc loop
+  do 200 while (i .lt. 4) ! { dg-error "cannot be a DO WHILE or DO without loop control" }
+  200 i = i + 1
+  !$acc loop
+  do while (i .lt. 8) ! { dg-error "cannot be a DO WHILE or DO without loop control" }
+       i = i + 1
+  end do
+  !$acc loop
+  do 300 d = 1, 30, 6
+      i = d
+  300 a(i) = 1
+  ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 32 }
+  ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 32 }
+  !$acc loop
+  do d = 1, 30, 5
+       i = d
+      a(i) = 2
+  end do
+  ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 38 }
+  ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 38 }
+  !$acc loop
+  do i = 1, 30
+      if (i .eq. 16) exit ! { dg-error "EXIT statement" }
+  end do
+  !$acc loop
+  outer: do i = 1, 30
+      do j = 5, 10
+          if (i .eq. 6 .and. j .eq. 7) exit outer ! { dg-error "EXIT statement" }
+      end do
+  end do outer
+  last: do i = 1, 30
+   end do last
+
+  ! different types of loop are allowed
+  !$acc loop
+  do i = 1,10
+  end do
+  !$acc loop
+  do 400, i = 1,10
+400   a(i) = i
+
+  ! after loop directive must be loop
+  !$acc loop
+  a(1) = 1 ! { dg-error "Expected DO loop" }
+  do i = 1,10
+  enddo
+
+  ! combined directives may be used with/without end
+  !$acc parallel loop
+  do i = 1,10
+  enddo
+  !$acc parallel loop
+  do i = 1,10
+  enddo
+  !$acc end parallel loop
+  !$acc kernels loop
+  do i = 1,10
+  enddo
+  !$acc kernels loop
+  do i = 1,10
+  enddo
+  !$acc end kernels loop
+
+  !$acc kernels loop reduction(max:i)
+  do i = 1,10
+  enddo
+  !$acc kernels
+  !$acc loop reduction(max:i)
+  do i = 1,10
+  enddo
+  !$acc end kernels
+
+  !$acc parallel loop collapse(0) ! { dg-error "constant positive integer" }
+  do i = 1,10
+  enddo
+
+  !$acc parallel loop collapse(-1) ! { dg-error "constant positive integer" }
+  do i = 1,10
+  enddo
+
+  !$acc parallel loop collapse(i) ! { dg-error "Constant expression required" }
+  do i = 1,10
+  enddo
+
+  !$acc parallel loop collapse(4) ! { dg-error "not enough DO loops for collapsed" }
+    do i = 1, 3
+        do j = 4, 6
+          do k = 5, 7
+              a(i+j-k) = i + j + k
+          end do
+        end do
+    end do
+    !$acc parallel loop collapse(2)
+    do i = 1, 5, 2
+        do j = i + 1, 7, i  ! { dg-error "collapsed loops don.t form rectangular iteration space" }
+        end do
+    end do
+    !$acc parallel loop collapse(2)
+    do i = 1, 3
+        do j = 4, 6
+        end do
+    end do
+    !$acc parallel loop collapse(2)
+    do i = 1, 3
+        do j = 4, 6
+        end do
+        k = 4
+    end do
+    !$acc parallel loop collapse(3-1)
+    do i = 1, 3
+        do j = 4, 6
+        end do
+        k = 4
+    end do
+    !$acc parallel loop collapse(1+1)
+    do i = 1, 3
+        do j = 4, 6
+        end do
+        k = 4
+    end do
+    !$acc parallel loop collapse(2)
+    do i = 1, 3
+        do      ! { dg-error "cannot be a DO WHILE or DO without loop control" }
+        end do
+    end do
+    !$acc parallel loop collapse(2)
+    do i = 1, 3
+        do r = 4, 6
+        end do
+        ! { dg-warning "Deleted feature: Loop variable at .1. must be integer" "" { target *-*-* } 151 }
+        ! { dg-error "ACC LOOP iteration variable must be of type integer" "" { target *-*-* } 151 }
+    end do
+
+    ! Both seq and independent are not allowed
+  !$acc loop independent seq ! { dg-error "SEQ conflicts with INDEPENDENT" }
+  do i = 1,10
+  enddo
+
+
+  !$acc cache (a(1:10)) ! { dg-error "ACC CACHE directive must be inside of loop" }
+
+  do i = 1,10
+    !$acc cache(a(i:i+1))
+  enddo
+
+  do i = 1,10
+    !$acc cache(a(i:i+1))
+    a(i) = i
+    !$acc cache(a(i+2:i+2+1))
+  enddo
+
+end subroutine test1
+end program test
diff --git a/gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95 b/gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95
new file mode 100644
index 00000000000..9be74a85919
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/loop-3-2.f95
@@ -0,0 +1,58 @@
+! { dg-additional-options "-std=f2008" }
+! See also loop-3.f95.
+
+program test
+  call test1
+contains
+subroutine test1
+  implicit none
+  integer :: i, j
+
+  ! !$acc end loop not required by spec
+  !$acc loop
+  do i = 1,5
+  enddo
+  !$acc end loop ! { dg-warning "Redundant" }
+
+  !$acc loop
+  do i = 1,5
+  enddo
+  j = 1
+  !$acc end loop ! { dg-error "Unexpected" }
+
+  !$acc parallel
+  !$acc loop
+  do i = 1,5
+  enddo
+  !$acc end parallel
+  !$acc end loop ! { dg-error "Unexpected" }
+
+  ! OpenACC supports Fortran 2008 do concurrent statement
+  !$acc loop
+  do concurrent (i = 1:5)
+  end do
+
+  !$acc loop
+  outer_loop: do i = 1, 5
+    inner_loop: do j = 1,5
+      if (i .eq. j) cycle outer_loop
+      if (i .ne. j) exit outer_loop ! { dg-error "EXIT statement" }
+    end do inner_loop
+  end do outer_loop
+
+  outer_loop1: do i = 1, 5
+    !$acc loop
+    inner_loop1: do j = 1,5
+      if (i .eq. j) cycle outer_loop1 ! { dg-error "CYCLE statement" }
+    end do inner_loop1
+  end do outer_loop1
+
+  !$acc loop collapse(2)
+  outer_loop2: do i = 1, 5
+    inner_loop2: do j = 1,5
+      if (i .eq. j) cycle outer_loop2 ! { dg-error "CYCLE statement" }
+      if (i .ne. j) exit outer_loop2 ! { dg-error "EXIT statement" }
+    end do inner_loop2
+  end do outer_loop2
+end subroutine test1
+end program test
diff --git a/gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90 b/gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90
new file mode 100644
index 00000000000..2fcaa400ee3
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/nested-function-1.f90
@@ -0,0 +1,93 @@
+! Exercise nested function decomposition, gcc/tree-nested.c.
+! See gcc/testsuite/gcc.dg/goacc/nested-function-1.c for the C version.
+
+program main
+  integer, parameter :: N = 100
+  integer :: nonlocal_arg
+  integer :: nonlocal_a(N)
+  integer :: nonlocal_i
+  integer :: nonlocal_j
+
+  nonlocal_a (:) = 5
+  nonlocal_arg = 5
+
+  call local ()
+  call nonlocal ()
+
+contains
+
+  subroutine local ()
+    integer :: local_i
+    integer :: local_arg
+    integer :: local_a(N)
+    integer :: local_j
+
+    local_a (:) = 5
+    local_arg = 5
+
+    !$acc kernels loop &
+    !$acc gang(num:local_arg) worker(local_arg) vector(local_arg) &
+    !$acc wait async(local_arg)
+    do local_i = 1, N
+       !$acc cache (local_a(local_i:local_i + 5))
+       local_a(local_i) = 100
+       !$acc loop seq tile(*)
+       do local_j = 1, N
+       enddo
+       !$acc loop auto independent tile(1)
+       do local_j = 1, N
+       enddo
+    enddo
+    !$acc end kernels loop
+
+    !$acc kernels loop &
+    !$acc gang(static:local_arg) worker(local_arg) vector(local_arg) &
+    !$acc wait(local_arg, local_arg + 1, local_arg + 2) async
+    do local_i = 1, N
+       !$acc cache (local_a(local_i:local_i + 4))
+       local_a(local_i) = 100
+       !$acc loop seq tile(1)
+       do local_j = 1, N
+       enddo
+       !$acc loop auto independent tile(*)
+       do local_j = 1, N
+       enddo
+    enddo
+    !$acc end kernels loop
+  end subroutine local
+
+  subroutine nonlocal ()
+    nonlocal_a (:) = 5
+    nonlocal_arg = 5
+
+    !$acc kernels loop &
+    !$acc gang(num:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) &
+    !$acc wait async(nonlocal_arg)
+    do nonlocal_i = 1, N
+       !$acc cache (nonlocal_a(nonlocal_i:nonlocal_i + 3))
+       nonlocal_a(nonlocal_i) = 100
+       !$acc loop seq tile(2)
+       do nonlocal_j = 1, N
+       enddo
+       !$acc loop auto independent tile(3)
+       do nonlocal_j = 1, N
+       enddo
+    enddo
+    !$acc end kernels loop
+
+    !$acc kernels loop &
+    !$acc gang(static:nonlocal_arg) worker(nonlocal_arg) vector(nonlocal_arg) &
+    !$acc wait(nonlocal_arg, nonlocal_arg + 1, nonlocal_arg + 2) async
+    do nonlocal_i = 1, N
+       !$acc cache (nonlocal_a(nonlocal_i:nonlocal_i + 2))
+       nonlocal_a(nonlocal_i) = 100
+       !$acc loop seq tile(*)
+       do nonlocal_j = 1, N
+       enddo
+       !$acc loop auto independent tile(*)
+       do nonlocal_j = 1, N
+       enddo
+    enddo
+    !$acc end kernels loop
+  end subroutine nonlocal
+end program main
diff --git a/gcc/testsuite/gfortran.dg/goacc/pr71704.f90 b/gcc/testsuite/gfortran.dg/goacc/pr71704.f90
new file mode 100644
index 00000000000..0235e85d42a
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/pr71704.f90
@@ -0,0 +1,60 @@
+! PR fortran/71704
+! { dg-do compile }
+
+real function f1 ()
+!$acc routine (f1)
+  f1 = 1
+end
+
+real function f2 (a)
+  integer a
+  !$acc enter data copyin(a)
+  f2 = 1
+end
+
+real function f3 (a)
+  integer a
+!$acc enter data copyin(a)
+  f3 = 1
+end
+
+real function f4 ()
+!$acc wait
+  f4 = 1
+end
+
+real function f5 (a)
+  integer a
+!$acc update device(a)
+  f5 = 1
+end
+
+real function f6 ()
+!$acc parallel
+!$acc end parallel
+  f6 = 1
+end
+
+real function f7 ()
+!$acc kernels
+!$acc end kernels
+  f7 = 1
+end
+
+real function f8 ()
+!$acc data
+!$acc end data
+  f8 = 1
+end
+
+real function f9 ()
+!$acc host_data
+!$acc end host_data
+  f8 = 1
+end
+
+real function f10 (a)
+  integer a
+!$acc declare present (a)
+  f8 = 1
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/order-1.f90 b/gcc/testsuite/gfortran.dg/gomp/order-1.f90
new file mode 100644
index 00000000000..23db74cc666
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/order-1.f90
@@ -0,0 +1,92 @@
+! { dg-do compile }
+
+module m
+  integer :: i
+end module m
+subroutine f1
+  type t
+    integer :: i
+  end type t
+  interface
+    integer function f3 (a, b)
+      !$omp declare simd (f3) uniform (a)
+      use m
+      import :: t
+      implicit none
+      type (t) :: a
+      integer :: b
+    end function f3
+  end interface
+  interface
+    integer function f4 (a, b)
+      use m
+      !$omp declare simd (f4) uniform (a)
+      import :: t
+      implicit none
+      type (t) :: a
+      integer :: b
+    end function f4
+  end interface
+  interface
+    integer function f5 (a, b)
+      use m
+      import :: t
+      !$omp declare simd (f5) uniform (a)
+      implicit none
+      type (t) :: a
+      integer :: b
+    end function f5
+  end interface
+  interface
+    integer function f6 (a, b)
+      use m
+      import :: t
+      implicit none
+      !$omp declare simd (f6) uniform (a)
+      type (t) :: a
+      integer :: b
+    end function f6
+  end interface
+  interface
+    integer function f7 (a, b)
+      use m
+      import :: t
+      implicit none
+      type (t) :: a
+      !$omp declare simd (f7) uniform (a)
+      integer :: b
+    end function f7
+  end interface
+  call f2
+contains
+  subroutine f2
+    !$omp threadprivate (t1)
+    use m
+    !$omp threadprivate (t2)
+    implicit none
+    !$omp threadprivate (t3)
+    integer, save :: t1, t2, t3, t4
+    !$omp threadprivate (t4)
+    t1 = 1; t2 = 2; t3 = 3; t4 = 4
+  end subroutine f2
+  subroutine f8
+    !$omp declare reduction (f8_1:real:omp_out = omp_out + omp_in)
+    use m
+    !$omp declare reduction (f8_2:real:omp_out = omp_out + omp_in)
+    implicit none
+    !$omp declare reduction (f8_3:real:omp_out = omp_out + omp_in)
+    integer :: j
+    !$omp declare reduction (f8_4:real:omp_out = omp_out + omp_in)
+  end subroutine f8
+  subroutine f9
+    !$omp declare target (f9_1)
+    use m
+    !$omp declare target (f9_2)
+    implicit none
+    !$omp declare target (f9_3)
+    !$omp declare target
+    integer, save :: f9_1, f9_2, f9_3, f9_4
+    !$omp declare target (f9_4)
+    f9_1 = 1; f9_2 = 2; f9_3 = 3; f9_4 = 4
+  end subroutine f9
+end subroutine f1
diff --git a/gcc/testsuite/gfortran.dg/gomp/order-2.f90 b/gcc/testsuite/gfortran.dg/gomp/order-2.f90
new file mode 100644
index 00000000000..4ee3a82d518
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/order-2.f90
@@ -0,0 +1,37 @@
+! { dg-do compile }
+
+module m
+  integer :: i
+end module m
+subroutine f1
+  call f2
+contains
+  subroutine f2
+    use m
+    implicit none
+    integer, save :: t
+    t = 1
+    !$omp threadprivate (t1)	! { dg-error "Unexpected" }
+  end subroutine f2
+  subroutine f3
+    use m
+    implicit none
+    integer :: j
+    j = 1
+    !$omp declare reduction (foo:real:omp_out = omp_out + omp_in)	! { dg-error "Unexpected" }
+  end subroutine f3
+  subroutine f4
+    use m
+    implicit none
+    !$omp declare target
+    integer, save :: f4_1
+    f4_1 = 1
+    !$omp declare target (f4_1)	! { dg-error "Unexpected" }
+    !$omp declare target	! { dg-error "Unexpected" }
+  end subroutine f4
+  integer function f5 (a, b)
+    integer :: a, b
+    a = 1; b = 2
+    !$omp declare simd (f5) notinbranch	! { dg-error "Unexpected" }
+  end function f5
+end subroutine f1
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr70855.f90 b/gcc/testsuite/gfortran.dg/gomp/pr70855.f90
new file mode 100644
index 00000000000..247e4edd6ff
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr70855.f90
@@ -0,0 +1,18 @@
+! PR fortran/70855
+! { dg-do compile }
+! { dg-additional-options "-O2" }
+
+program pr70855
+   integer, parameter :: m = 4
+   integer, parameter :: n = 2
+   real :: a(m,n)
+   real :: x(n)
+   real :: y(m)
+   a = 1.0
+   x = 1.0
+!$omp parallel
+!$omp workshare
+   y(1:m) = matmul ( a(1:m,1:n), x(1:n) )
+!$omp end workshare
+!$omp end parallel
+end program pr70855
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71687.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71687.f90
new file mode 100644
index 00000000000..3971263752e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71687.f90
@@ -0,0 +1,11 @@
+! PR fortran/71687
+! { dg-do compile }
+! { dg-additional-options "-fstack-arrays -O2" }
+
+subroutine s (n, x)
+   integer :: n
+   real :: x(n)
+!$omp parallel
+   x(1:n) = x(n:1:-1)
+!$omp end parallel
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71704.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71704.f90
new file mode 100644
index 00000000000..5c1c003ca57
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71704.f90
@@ -0,0 +1,58 @@
+! PR fortran/71704
+! { dg-do compile }
+
+real function f0 ()
+!$omp declare simd (f0)
+  f0 = 1
+end
+
+real function f1 ()
+!$omp declare target (f1)
+  f1 = 1
+end
+
+real function f2 ()
+!$omp declare reduction (foo : integer : omp_out = omp_out + omp_in) &
+!$omp & initializer (omp_priv = 0)
+  f2 = 1
+end
+
+real function f3 ()
+  real, save :: t
+!$omp threadprivate (t)
+  f3 = 1
+end
+
+real function f4 ()
+!$omp taskwait
+  f4 = 1
+end
+
+real function f5 ()
+!$omp barrier
+  f5 = 1
+end
+
+real function f6 ()
+!$omp parallel
+!$omp end parallel
+  f6 = 1
+end
+
+real function f7 ()
+!$omp single
+!$omp end single
+  f7 = 1
+end
+
+real function f8 ()
+!$omp critical
+!$omp end critical
+  f8 = 1
+end
+
+real function f9 ()
+!$omp critical
+!$omp end critical
+  f9 = 1
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71705.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71705.f90
new file mode 100644
index 00000000000..4813aacfdc3
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71705.f90
@@ -0,0 +1,7 @@
+! PR fortran/71705
+! { dg-do compile }
+
+  real :: x
+  x = 0.0
+  !$omp target update to(x)
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71758.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71758.f90
new file mode 100644
index 00000000000..47215ba5cd9
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71758.f90
@@ -0,0 +1,10 @@
+! PR middle-end/71758
+
+subroutine pr71758 (p)
+  integer(8) :: i
+  integer :: p(20)
+  i = 0
+  !$omp target device(i)
+  !$omp end target
+  !$omp target update to(p(1:1)) device(i)
+end subroutine
diff --git a/gcc/testsuite/gfortran.dg/namelist_90.f b/gcc/testsuite/gfortran.dg/namelist_90.f
new file mode 100644
index 00000000000..9c0ae5b72bb
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/namelist_90.f
@@ -0,0 +1,28 @@
+! { dg-do run }
+! PR71123 Namelist read failure on Windows 
+      implicit none
+      integer :: i, ierr
+      real(8), dimension(30) :: senid, res
+      character(2) :: crlf = char(13) // char(10)
+      namelist /fith/ senid
+      do i=1,30
+         res(i) = i
+      enddo
+      senid = 99.0
+      open(unit=7,file='test.out',form='formatted',
+     *         status='new',action='readwrite', access='stream')
+      write(7,'(a)') "&fith" // crlf
+      write(7,'(a)') "senid=  1.0 , 2.0 , 3.0 , 4.0  , 5.0 ," // crlf
+      write(7,'(a)') "6.0 , 7.0 ,  8.0 ,  9.0 ,  10.0 , 11.0 ," // crlf
+      write(7,'(a)') "12.0 , 13.0 , 14.0 , 15.0 , 16.0 , 17.0 ," // crlf
+      write(7,'(a)') "18.0 , 19.0 , 20.0 , 21.0 , 22.0 , 23.0 ," // crlf
+      write(7,'(a)') "24.0 , 25.0 , 26.0 , 27.0 , 28.0 , 29.0 ," // crlf
+      write(7,'(a)') "30.0 ," // crlf
+      write(7,'(a)') "/" // crlf
+      close(7)
+      open(unit=7,file='test.out',form='formatted')
+      read(7,nml=fith, iostat=ierr)
+      close(7, status="delete")
+      if (ierr.ne.0) call abort
+      if (any(senid.ne.res)) call abort
+      end
diff --git a/gcc/testsuite/gfortran.dg/null_9.f90 b/gcc/testsuite/gfortran.dg/null_9.f90
new file mode 100644
index 00000000000..9afd93801cc
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/null_9.f90
@@ -0,0 +1,30 @@
+! { dg-do run }
+
+MODULE fold_convert_loc_ice
+  IMPLICIT NONE
+  PRIVATE
+
+  TYPE, PUBLIC :: ta
+    PRIVATE
+    INTEGER :: a_comp
+  END TYPE ta
+
+  TYPE, PUBLIC :: tb
+    TYPE(ta), ALLOCATABLE :: b_comp
+  END TYPE tb
+
+  PUBLIC :: proc
+CONTAINS
+  SUBROUTINE proc
+    TYPE(tb) :: b
+
+    b = tb(null())
+    if (allocated( b%b_comp )) call abort()
+  END SUBROUTINE proc
+END MODULE fold_convert_loc_ice
+
+  USE fold_convert_loc_ice
+
+  call proc()
+END
+
diff --git a/gcc/testsuite/gfortran.dg/pr69603.f90 b/gcc/testsuite/gfortran.dg/pr69603.f90
new file mode 100644
index 00000000000..dca4eb15fc6
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr69603.f90
@@ -0,0 +1,16 @@
+! { dg-do compile }
+! { dg-options "-fimplicit-none" }
+! PR fortran/69603 - segfault with -fimplicit-none and proc_ptr_comp_24.f90
+! Based on reduced testcase by Dominique d'Humieres
+PROGRAM prog
+  implicit none
+  TYPE object
+     PROCEDURE(), POINTER, NOPASS :: f
+  END TYPE object
+  TYPE (object) :: o1
+  CALL set_func(o1%f)
+CONTAINS
+  SUBROUTINE set_func(f)
+    PROCEDURE(), POINTER :: f
+  END SUBROUTINE set_func
+END PROGRAM prog
diff --git a/gcc/testsuite/gfortran.dg/pr70040.f90 b/gcc/testsuite/gfortran.dg/pr70040.f90
new file mode 100644
index 00000000000..080083e3a5d
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr70040.f90
@@ -0,0 +1,19 @@
+! { dg-do compile }
+! PR 70040 - used to cause an ICE.
+! Test case by Martin Reinecke
+program bugrep
+  implicit none
+  type :: string
+    character (len=:), allocatable :: s
+  end type
+
+  integer l
+  type(string), allocatable, dimension(:) :: foo
+  character(len=:),allocatable ::tmp
+  allocate(foo(20))
+  do l= 1, 20
+    tmp = foo(5)%s
+    foo(5)%s = foo(l)%s
+    foo(l)%s = tmp
+  enddo
+end program
diff --git a/gcc/testsuite/gfortran.dg/pr70673.f90 b/gcc/testsuite/gfortran.dg/pr70673.f90
new file mode 100644
index 00000000000..67856e0332e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr70673.f90
@@ -0,0 +1,25 @@
+! { dg-do run }
+!
+! Test the fix for PR70673
+!
+! Contributed by David Kinniburgh  <davidgkinniburgh@yahoo.co.uk>
+!
+module m
+contains
+  subroutine s(inp)
+    character(*), intent(in) :: inp
+    character(:), allocatable :: a
+    a = a           ! This used to ICE.
+    a = inp
+    a = a           ! This used to ICE too
+    if ((len (a) .ne. 5) .or. (a .ne. "hello")) call abort
+    a = a(2:3)      ! Make sure that temporary creation is not broken.
+    if ((len (a) .ne. 2) .or. (a .ne. "el")) call abort
+    deallocate (a)
+    a = a           ! This would ICE too.
+  end subroutine s
+end module m
+
+  use m
+  call s("hello")
+end
diff --git a/gcc/testsuite/gfortran.dg/pr70931.f90 b/gcc/testsuite/gfortran.dg/pr70931.f90
new file mode 100644
index 00000000000..08ecd687752
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr70931.f90
@@ -0,0 +1,10 @@
+! { dg-do compile }
+! { dg-options "-g" }
+program p
+   type t
+      integer :: a
+      integer :: b(0)
+   end type
+   type(t), parameter :: z = t(1, [2])
+   print *, z
+end
diff --git a/gcc/testsuite/gfortran.dg/pr71047.f08 b/gcc/testsuite/gfortran.dg/pr71047.f08
new file mode 100644
index 00000000000..61a0ad4dc31
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71047.f08
@@ -0,0 +1,48 @@
+! { dg-do compile }
+! { dg-options "-fdump-tree-original" }
+!
+! Fortran/PR71047
+!
+
+module m
+ implicit none
+
+ type, abstract :: c_abstr
+  integer :: i = 0
+ end type c_abstr
+
+ type, extends(c_abstr) :: t_a
+  class(c_abstr), allocatable :: f
+ end type t_a
+ 
+ type, extends(c_abstr) :: t_b
+ end type t_b
+
+contains
+
+ subroutine set(y,x)
+  class(c_abstr), intent(in)  :: x
+  type(t_a),      intent(out) :: y
+   allocate( y%f , source=x )
+ end subroutine set
+
+end module m
+
+
+program p
+ use m
+ implicit none
+
+ type(t_a) :: res
+ type(t_b) :: var
+
+  call set( res , var )
+  write(*,*) res%i
+
+end program p
+
+!
+! Check to ensure the vtable is actually initialized.
+!
+! { dg-final { scan-tree-dump "t_a\\.\\d+\\.f\\._vptr =" "original" } }
+!
diff --git a/gcc/testsuite/gfortran.dg/pr71204.f90 b/gcc/testsuite/gfortran.dg/pr71204.f90
new file mode 100644
index 00000000000..1d1ee5c34a1
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71204.f90
@@ -0,0 +1,17 @@
+! PR fortran/71204
+! { dg-do compile }
+! { dg-options "-O0" }
+
+module pr71204
+  character(10), allocatable :: z(:)
+end module
+
+subroutine s1
+  use pr71204
+  z(2) = z(1)
+end
+
+subroutine s2
+  use pr71204
+  z(2) = z(1)
+end
diff --git a/gcc/testsuite/gfortran.dg/pr71688.f90 b/gcc/testsuite/gfortran.dg/pr71688.f90
new file mode 100644
index 00000000000..dbb6d185cf4
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71688.f90
@@ -0,0 +1,13 @@
+! { dg-do compile }
+! { dg-options "-fcoarray=lib" }
+
+program p
+   call s
+contains
+   subroutine s
+      real :: x[*] = 1
+      block
+      end block
+      x = 2
+   end
+end
diff --git a/gcc/testsuite/gfortran.dg/pr71764.f90 b/gcc/testsuite/gfortran.dg/pr71764.f90
new file mode 100644
index 00000000000..48176f8297e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71764.f90
@@ -0,0 +1,34 @@
+! { dg-do run }
+! PR71764 
+program p
+   use iso_c_binding, only: c_ptr, c_null_ptr, c_ptr, c_associated, c_loc
+   logical, target :: rls
+   real, target :: t = 3.14
+   type(c_ptr) :: nullptr,c
+   real, pointer :: k
+   nullptr = c_null_ptr
+   c = nullptr
+   rls = c_associated(c)
+   if (rls) call abort
+   if (c_associated(c)) call abort
+   c = c_loc(rls)
+   if (.not. c_associated(c)) call abort
+   c = nullptr
+   if (c_associated(c)) call abort
+   c = c_loc(t)
+   k => t
+   call association_test(k, c)
+contains
+  subroutine association_test(a,b)
+    use iso_c_binding, only: c_associated, c_loc, c_ptr
+    implicit none
+    real, pointer :: a
+    type(c_ptr) :: b
+    if(c_associated(b, c_loc(a))) then
+       return
+    else
+       call abort
+    end if
+  end subroutine association_test
+end
+
diff --git a/gcc/testsuite/gfortran.dg/pr71883.f90 b/gcc/testsuite/gfortran.dg/pr71883.f90
new file mode 100644
index 00000000000..23ed6a680bd
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71883.f90
@@ -0,0 +1,38 @@
+! { dg-do compile }
+!
+! Test the fix for pr71883, in which an ICE would follow the error.
+!
+! Contributed by Gerhard Steinmetz  <gerhard.steinmetz.fortran@t-online.de>
+!
+program p
+   character(3), allocatable :: z(:,:)
+   z(1:2,1:2) = 'abc'
+   z(2,1) = z(12) ! { dg-error "Rank mismatch in array reference" }
+   z(21) = z(1,2) ! { dg-error "Rank mismatch in array reference" }
+contains
+   subroutine a
+      character(3), allocatable :: z(:,:)
+      z(1:2,1:2) = 'abc'
+      z(2,1) = z(-1) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(99) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(huge(0)) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(-huge(0)) ! { dg-error "Rank mismatch in array reference" }
+      z(-1) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+      z(99) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+      z(huge(0)) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+      z(-huge(0)) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+  end subroutine
+
+   subroutine b
+      character(:), allocatable :: z(:,:)
+      z(1:2,1:2) = 'abc'
+      z(2,1) = z(-1) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(99) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(huge(0)) ! { dg-error "Rank mismatch in array reference" }
+      z(2,1) = z(-huge(0)) ! { dg-error "Rank mismatch in array reference" }
+      z(-1) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+      z(99) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+     z(huge(0)) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+      z(-huge(0)) = z(2,1) ! { dg-error "Rank mismatch in array reference" }
+   end subroutine
+end
diff --git a/gcc/testsuite/gfortran.dg/select_type_35.f03 b/gcc/testsuite/gfortran.dg/select_type_35.f03
new file mode 100644
index 00000000000..92d2f275313
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/select_type_35.f03
@@ -0,0 +1,41 @@
+! { dg-do run }
+!
+! Contributed by Nathanael Huebbe
+! Check fix for PR/70842
+
+program foo
+
+  TYPE, ABSTRACT :: t_Intermediate
+  END TYPE t_Intermediate
+
+  type, extends(t_Intermediate) :: t_Foo
+    character(:), allocatable :: string
+  end type t_Foo
+
+  class(t_Foo), allocatable :: obj
+
+  allocate(obj)
+  obj%string = "blabarfoo"
+
+  call bar(obj)
+
+  deallocate(obj)
+contains
+  subroutine bar(me)
+    class(t_Intermediate), target :: me
+
+    class(*), pointer :: alias
+
+    select type(me)
+      type is(t_Foo)
+      if (len(me%string) /= 9) call abort()
+    end select
+
+    alias => me
+    select type(alias)
+      type is(t_Foo)
+        if (len(alias%string) /= 9) call abort()
+    end select
+  end subroutine bar
+end program foo
+
diff --git a/gcc/testsuite/gfortran.dg/submodule_16.f08 b/gcc/testsuite/gfortran.dg/submodule_16.f08
new file mode 100644
index 00000000000..6e555b60eff
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/submodule_16.f08
@@ -0,0 +1,53 @@
+! { dg-do compile }
+!
+! Tests the fix for PR71156 in which the valid code (f7, f8 and f9 below)
+! triggered an error, while the invalid code (f1 to f6) compiled.
+!
+! Contributed by Damian Rousn  <damian@sourceryinstitute.org>
+!
+module my_interface
+  implicit none
+  interface
+    module subroutine f1
+    end subroutine
+    module subroutine f2
+    end subroutine
+    module subroutine f3
+    end subroutine
+    elemental module subroutine f4
+    end subroutine
+    pure module subroutine f5
+    end subroutine
+    recursive module subroutine f6
+    end subroutine
+    elemental module subroutine f7
+    end subroutine
+    pure module subroutine f8
+    end subroutine
+    recursive module subroutine f9
+    end subroutine
+  end interface
+end module
+
+submodule(my_interface) my_implementation
+  implicit none
+contains
+    elemental module subroutine f1 ! { dg-error "Mismatch in ELEMENTAL attribute" }
+    end subroutine
+    pure module subroutine f2 ! { dg-error "Mismatch in PURE attribute" }
+    end subroutine
+    recursive module subroutine f3 ! { dg-error "Mismatch in RECURSIVE attribute" }
+    end subroutine
+    module subroutine f4 ! { dg-error "ELEMENTAL prefix" }
+    end subroutine
+    module subroutine f5 ! { dg-error "PURE prefix" }
+    end subroutine
+    module subroutine f6 ! { dg-error "RECURSIVE prefix" }
+    end subroutine
+    elemental module subroutine f7
+    end subroutine
+    pure module subroutine f8
+    end subroutine
+    recursive module subroutine f9
+    end subroutine
+end submodule
diff --git a/gcc/testsuite/gfortran.dg/unexpected_eof.f b/gcc/testsuite/gfortran.dg/unexpected_eof.f
new file mode 100644
index 00000000000..d3cdb99596a
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/unexpected_eof.f
@@ -0,0 +1,8 @@
+! { dg-do compile }
+! PR66461  ICE on missing end program in fixed source
+      program p
+         integer x(2)
+         x = -1
+         if ( x(1) < 0 .or.
+     &        x(2) < 0 ) print *, x
+! { dg-error "Unexpected end of file" "" { target *-*-* } 0 }
diff --git a/gcc/testsuite/gnat.dg/case_character.adb b/gcc/testsuite/gnat.dg/case_character.adb
new file mode 100644
index 00000000000..59c9b66987d
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/case_character.adb
@@ -0,0 +1,19 @@
+-- { dg-do run }
+
+procedure Case_Character is
+
+  function Test (C : Character) return Integer is
+  begin
+    case C is
+      when ASCII.HT | ' ' .. Character'Last => return 1;
+      when others => return 0;
+    end case;
+  end;
+
+begin
+
+  if Test ('A') /= 1 then
+    raise Program_Error;
+  end if;
+
+end;
diff --git a/gcc/testsuite/gnat.dg/loop_optimization23.adb b/gcc/testsuite/gnat.dg/loop_optimization23.adb
new file mode 100644
index 00000000000..4f3af5044c9
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/loop_optimization23.adb
@@ -0,0 +1,14 @@
+-- { dg-do run }
+-- { dg-options "-O3" }
+-- PR tree-optimization/71083
+with Loop_Optimization23_Pkg;
+use Loop_Optimization23_Pkg;
+procedure Loop_Optimization23 is
+  Test : ArrayOfStructB;
+begin
+  Test (0).b.b := 9999;
+  Foo (Test);
+  if Test (100).b.b /= 9999 then
+    raise Program_Error;
+  end if;
+end;
diff --git a/gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb b/gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb
new file mode 100644
index 00000000000..a5fc90d7205
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/loop_optimization23_pkg.adb
@@ -0,0 +1,11 @@
+-- { dg-do compile }
+-- { dg-options "-O3" }
+-- PR tree-optimization/71083
+package body Loop_Optimization23_Pkg is
+  procedure Foo (X : in out ArrayOfStructB) is
+  begin
+    for K in 0..99 loop
+      X (K+1).b.b := X (K).b.b;
+    end loop;
+  end Foo;
+end Loop_Optimization23_Pkg;
diff --git a/gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads b/gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads
new file mode 100644
index 00000000000..016ad82ef84
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/loop_optimization23_pkg.ads
@@ -0,0 +1,17 @@
+-- PR tree-optimization/71083
+package Loop_Optimization23_Pkg is
+  type Nibble is mod 2**4;
+  type Int24  is mod 2**24;
+  type StructA is record
+    a : Nibble;
+    b : Int24;
+  end record;
+  pragma Pack(StructA);
+  type StructB is record
+    a : Nibble;
+    b : StructA;
+  end record;
+  pragma Pack(StructB);
+  type ArrayOfStructB is array(0..100) of StructB;
+  procedure Foo (X : in out ArrayOfStructB);
+end Loop_Optimization23_Pkg;
diff --git a/gcc/testsuite/gnat.dg/opt56.adb b/gcc/testsuite/gnat.dg/opt56.adb
new file mode 100644
index 00000000000..9566f51c86b
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/opt56.adb
@@ -0,0 +1,15 @@
+-- { dg-do compile }
+-- { dg-options "-O3" }
+
+package body Opt56 is
+
+   function F (Values : Vector) return Boolean is
+      Result : Boolean := True;
+   begin
+      for I in Values'Range loop
+         Result := Result and Values (I) >= 0.0;
+     end loop;
+     return Result;
+   end;
+
+end Opt56;
diff --git a/gcc/testsuite/gnat.dg/opt56.ads b/gcc/testsuite/gnat.dg/opt56.ads
new file mode 100644
index 00000000000..31ee1953254
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/opt56.ads
@@ -0,0 +1,7 @@
+package Opt56 is
+
+   type Vector is array (Positive range <>) of Float;
+
+   function F (Values : Vector) return Boolean;
+
+end Opt56;
diff --git a/gcc/testsuite/gnat.dg/renaming10.adb b/gcc/testsuite/gnat.dg/renaming10.adb
new file mode 100644
index 00000000000..07d4312b060
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/renaming10.adb
@@ -0,0 +1,12 @@
+-- { dg-do compile }
+
+package body Renaming10 is
+
+   function F (Input : Rec) return Natural is
+      Position : Natural renames Input.Position;
+      Index : Natural renames Natural'Succ(Position);
+   begin
+      return Index;
+   end;
+
+end Renaming10;
diff --git a/gcc/testsuite/gnat.dg/renaming10.ads b/gcc/testsuite/gnat.dg/renaming10.ads
new file mode 100644
index 00000000000..aeb9fc1a201
--- /dev/null
+++ b/gcc/testsuite/gnat.dg/renaming10.ads
@@ -0,0 +1,9 @@
+package Renaming10 is
+
+   type Rec is record
+      Position : Natural;
+   end record;
+
+   function F (Input : Rec) return Natural;
+
+end Renaming10;
diff --git a/gcc/testsuite/opt55.adb b/gcc/testsuite/opt55.adb
new file mode 100644
index 00000000000..70f486b2ee3
--- /dev/null
+++ b/gcc/testsuite/opt55.adb
@@ -0,0 +1,20 @@
+-- { dg-do compile }
+-- { dg-options "-O" }
+
+package body Opt55 is
+
+   function Cond (B : Boolean; If_True, If_False : Date) return Date is
+   begin
+      if B then
+         return If_True;
+      else
+         return If_False;
+      end if;
+   end;
+
+   function F (C : Rec2; B : Boolean) return Date is
+   begin
+      return Cond (B, C.D1, C.D2);
+   end;
+
+end Opt55;
diff --git a/gcc/testsuite/opt55.ads b/gcc/testsuite/opt55.ads
new file mode 100644
index 00000000000..fec3c9ae2ef
--- /dev/null
+++ b/gcc/testsuite/opt55.ads
@@ -0,0 +1,22 @@
+package Opt55 is
+
+   type Date is record
+      D : Float;
+   end record;
+
+   type Rec1 (Kind : Boolean := False) is record
+      case Kind is
+         when True => N : Natural;
+         when False => null;
+      end case;
+   end record;
+
+   type Rec2 (D : Positive) is record
+      R  : Rec1;
+      D1 : Date;
+      D2 : Date;
+   end record;
+
+   function F (C : Rec2; B : Boolean) return Date;
+
+end Opt55;
diff --git a/libgomp/testsuite/libgomp.c++/target-20.C b/libgomp/testsuite/libgomp.c++/target-20.C
new file mode 100644
index 00000000000..a722ec00c59
--- /dev/null
+++ b/libgomp/testsuite/libgomp.c++/target-20.C
@@ -0,0 +1,80 @@
+extern "C" void abort ();
+struct S { int a, b, c, d; };
+
+void
+foo (S &s)
+{
+  int err;
+  #pragma omp target map (s.b, s.d) map (from: err)
+  {
+    err = s.b != 21 || s.d != 24;
+    s.b++; s.d++;
+  }
+  if (err || s.b != 22 || s.d != 25)
+    abort ();
+  #pragma omp target data map (s.b, s.d)
+  {
+    #pragma omp target map (alloc: s.b, s.d) map (from: err)
+    {
+      err = s.b != 22 || s.d != 25;
+      s.b++; s.d++;
+    }
+  }
+  if (err || s.b != 23 || s.d != 26)
+    abort ();
+  #pragma omp target data map (s)
+  {
+    #pragma omp target map (alloc: s.b, s.d) map (from: err)
+    {
+      err = s.b != 23 || s.d != 26;
+      s.b++; s.d++;
+    }
+  }
+  if (err || s.b != 24 || s.d != 27)
+    abort ();
+}
+
+template <typename T, typename U>
+void
+bar (S &s, T &t, U u)
+{
+  int err;
+  #pragma omp target map (s.b, s.d, t.b, t.d, u.b, u.d) map (from: err)
+  {
+    err = s.b != 21 || s.d != 24 || t.b != 73 || t.d != 82 || u.b != 31 || u.d != 37;
+    s.b++; s.d++; t.b++; t.d++; u.b++; u.d++;
+  }
+  if (err || s.b != 22 || s.d != 25 || t.b != 74 || t.d != 83 || u.b != 32 || u.d != 38)
+    abort ();
+  #pragma omp target data map (s.b, s.d, t.b, t.d, u.b, u.d)
+  {
+    #pragma omp target map (alloc: s.b, s.d, t.b, t.d, u.b, u.d) map (from: err)
+    {
+      err = s.b != 22 || s.d != 25 || t.b != 74 || t.d != 83 || u.b != 32 || u.d != 38;
+      s.b++; s.d++; t.b++; t.d++; u.b++; u.d++;
+    }
+  }
+  if (err || s.b != 23 || s.d != 26 || t.b != 75 || t.d != 84 || u.b != 33 || u.d != 39)
+    abort ();
+  #pragma omp target data map (s, t, u)
+  {
+    #pragma omp target map (alloc: s.b, s.d, t.b, t.d, u.b, u.d) map (from: err)
+    {
+      err = s.b != 23 || s.d != 26 || t.b != 75 || t.d != 84 || u.b != 33 || u.d != 39;
+      s.b++; s.d++; t.b++; t.d++; u.b++; u.d++;
+    }
+  }
+  if (err || s.b != 24 || s.d != 27 || t.b != 76 || t.d != 85 || u.b != 34 || u.d != 40)
+    abort ();
+}
+
+int
+main ()
+{
+  S s = { 1, 21, 2, 24 };
+  foo (s);
+  S s2 = { 3, 21, 4, 24 };
+  S t = { 5, 73, 6, 82 };
+  S u = { 7, 31, 8, 37 };
+  bar <S, S &> (s2, t, u);
+}
diff --git a/libgomp/testsuite/libgomp.c++/target-21.C b/libgomp/testsuite/libgomp.c++/target-21.C
new file mode 100644
index 00000000000..21a2f299bbb
--- /dev/null
+++ b/libgomp/testsuite/libgomp.c++/target-21.C
@@ -0,0 +1,173 @@
+extern "C" void abort ();
+struct T { char t[270]; };
+struct S { int (&x)[10]; int *&y; T t; int &z; S (); ~S (); };
+
+template <int N>
+void
+foo (S s)
+{
+  int err;
+  #pragma omp target map (s.x[0:N], s.y[0:N]) map (s.t.t[16:3]) map (from: err)
+  {
+    err = s.x[2] != 28 || s.y[2] != 37 || s.t.t[17] != 81;
+    s.x[2]++;
+    s.y[2]++;
+    s.t.t[17]++;
+  }
+  if (err || s.x[2] != 29 || s.y[2] != 38 || s.t.t[17] != 82)
+    abort ();
+}
+
+template <int N>
+void
+bar (S s)
+{
+  int err;
+  #pragma omp target map (s.x, s.z)map(from:err)
+  {
+    err = s.x[2] != 29 || s.z != 6;
+    s.x[2]++;
+    s.z++;
+  }
+  if (err || s.x[2] != 30 || s.z != 7)
+    abort ();
+}
+
+template <int N>
+void
+foo2 (S &s)
+{
+  int err;
+  #pragma omp target map (s.x[N:10], s.y[N:10]) map (from: err) map (s.t.t[N+16:N+3])
+  {
+    err = s.x[2] != 30 || s.y[2] != 38 || s.t.t[17] != 81;
+    s.x[2]++;
+    s.y[2]++;
+    s.t.t[17]++;
+  }
+  if (err || s.x[2] != 31 || s.y[2] != 39 || s.t.t[17] != 82)
+    abort ();
+}
+
+template <int N>
+void
+bar2 (S &s)
+{
+  int err;
+  #pragma omp target map (s.x, s.z)map(from:err)
+  {
+    err = s.x[2] != 31 || s.z != 7;
+    s.x[2]++;
+    s.z++;
+  }
+  if (err || s.x[2] != 32 || s.z != 8)
+    abort ();
+}
+
+template <typename U>
+void
+foo3 (U s)
+{
+  int err;
+  #pragma omp target map (s.x[0:10], s.y[0:10]) map (from: err) map (s.t.t[16:3])
+  {
+    err = s.x[2] != 32 || s.y[2] != 39 || s.t.t[17] != 82;
+    s.x[2]++;
+    s.y[2]++;
+    s.t.t[17]++;
+  }
+  if (err || s.x[2] != 33 || s.y[2] != 40 || s.t.t[17] != 83)
+    abort ();
+}
+
+template <typename U>
+void
+bar3 (U s)
+{
+  int err;
+  #pragma omp target map (s.x, s.z)map(from:err)
+  {
+    err = s.x[2] != 33 || s.z != 8;
+    s.x[2]++;
+    s.z++;
+  }
+  if (err || s.x[2] != 34 || s.z != 9)
+    abort ();
+}
+
+template <typename U>
+void
+foo4 (U &s)
+{
+  int err;
+  #pragma omp target map (s.x[0:10], s.y[0:10]) map (from: err) map (s.t.t[16:3])
+  {
+    err = s.x[2] != 34 || s.y[2] != 40 || s.t.t[17] != 82;
+    s.x[2]++;
+    s.y[2]++;
+    s.t.t[17]++;
+  }
+  if (err || s.x[2] != 35 || s.y[2] != 41 || s.t.t[17] != 83)
+    abort ();
+}
+
+template <typename U>
+void
+bar4 (U &s)
+{
+  int err;
+  #pragma omp target map (s.x, s.z)map(from:err)
+  {
+    err = s.x[2] != 35 || s.z != 9;
+    s.x[2]++;
+    s.z++;
+  }
+  if (err || s.x[2] != 36 || s.z != 10)
+    abort ();
+}
+
+int xt[10] = { 1, 2, 28, 3, 4, 5, 6, 7, 8, 9 };
+int yt[10] = { 1, 2, 37, 3, 4, 5, 6, 7, 8, 9 };
+int *yp = yt;
+int zt = 6;
+
+S::S () : x (xt), y (yp), z (zt)
+{
+}
+
+S::~S ()
+{
+}
+
+int
+main ()
+{
+  S s;
+  s.t.t[16] = 5;
+  s.t.t[17] = 81;
+  s.t.t[18] = 9;
+  foo <10> (s);
+  if (s.t.t[17] != 81)
+    abort ();
+  bar <7> (s);
+  foo2 <0> (s);
+  if (s.t.t[17] != 82)
+    abort ();
+  bar2 <21> (s);
+  foo3 <S> (s);
+  if (s.t.t[17] != 82)
+    abort ();
+  bar3 <S> (s);
+  foo4 <S> (s);
+  if (s.t.t[17] != 83)
+    abort ();
+  bar4 <S> (s);
+  s.x[2] -= 4;
+  s.y[2] -= 2;
+  s.z -= 2;
+  s.t.t[17]--;
+  foo3 <S &> (s);
+  if (s.t.t[17] != 83)
+    abort ();
+  bar3 <S &> (s);
+}
diff --git a/libgomp/testsuite/libgomp.fortran/associate3.f90 b/libgomp/testsuite/libgomp.fortran/associate3.f90
new file mode 100644
index 00000000000..ec3d8dc33b9
--- /dev/null
+++ b/libgomp/testsuite/libgomp.fortran/associate3.f90
@@ -0,0 +1,20 @@
+! PR fortran/71717
+! { dg-do run }
+
+  type t
+    real, allocatable :: f(:)
+  end type
+  type (t) :: v
+  integer :: i, j
+  allocate (v%f(4))
+  v%f = 19.
+  i = 5
+  associate (u => v, k => i)
+  !$omp parallel do
+  do j = 1, 4
+    u%f(j) = 21.
+    if (j.eq.1) k = 7
+  end do
+  end associate
+  if (any (v%f(:).ne.21.) .or. i.ne.7) call abort
+end
diff --git a/libgomp/testsuite/libgomp.hsa.c/complex-align-2.c b/libgomp/testsuite/libgomp.hsa.c/complex-align-2.c
new file mode 100644
index 00000000000..b2d7acff443
--- /dev/null
+++ b/libgomp/testsuite/libgomp.hsa.c/complex-align-2.c
@@ -0,0 +1,27 @@
+#pragma omp declare target
+    _Complex int *g;
+#pragma omp end declare target
+
+
+
+_Complex float f(void);
+
+int
+main ()
+{
+  _Complex int y;
+#pragma omp target map(from:y)
+  {
+    _Complex int x;
+    g = &x;
+    __imag__ x = 1;
+    __real__ x = 2;
+    y = x;
+  }
+
+  if ((__imag__ y != 1)
+      || (__real__ y != 2))
+    __builtin_abort ();
+  return 0;
+}
+
diff --git a/libgomp/testsuite/libgomp.hsa.c/switch-sbr-2.c b/libgomp/testsuite/libgomp.hsa.c/switch-sbr-2.c
new file mode 100644
index 00000000000..06990d1c2c0
--- /dev/null
+++ b/libgomp/testsuite/libgomp.hsa.c/switch-sbr-2.c
@@ -0,0 +1,59 @@
+/* { dg-additional-options "-fno-tree-switch-conversion" } */
+
+#pragma omp declare target
+int
+foo (unsigned a)
+{
+  switch (a)
+    {
+    case 1 ... 5:
+      return 1;
+    case 9 ... 11:
+      return a + 3;
+    case 12 ... 13:
+      return a + 3;
+    default:
+      return 44;
+    }
+}
+#pragma omp end declare target
+
+#define s 100
+
+void __attribute__((noinline, noclone))
+verify(int *a)
+{
+  if (a[0] != 44)
+    __builtin_abort ();
+  
+  for (int i = 1; i <= 5; i++)
+    if (a[i] != 1)
+      __builtin_abort ();
+
+  for (int i = 6; i <= 8; i++)
+    if (a[i] != 44)
+      __builtin_abort ();
+
+  for (int i = 9; i <= 13; i++)
+    if (a[i] != i + 3)
+      __builtin_abort ();
+
+  for (int i = 14; i < s; i++)
+    if (a[i] != 44)
+      __builtin_abort ();
+}
+
+int main(int argc)
+{
+  int array[s];
+#pragma omp target
+  {
+    for (int i = 0; i < s; i++)
+      {
+	int v = foo (i);
+	array[i] = v;
+      }
+  }
+  verify (array);
+  return 0;
+}
diff --git a/libgomp/testsuite/libgomp.oacc-c/nested-function-1.c b/libgomp/testsuite/libgomp.oacc-c/nested-function-1.c
new file mode 100644
index 00000000000..fb2a3acdfa9
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-c/nested-function-1.c
@@ -0,0 +1,52 @@
+/* Exercise nested function decomposition, gcc/tree-nested.c.  */
+
+int
+main (void)
+{
+  void test1 ()
+  {
+    int i, j, k;
+    int a[4][7][8];
+
+    __builtin_memset (a, 0, sizeof (a));
+
+#pragma acc parallel
+#pragma acc loop collapse(4 - 1)
+    for (i = 1; i <= 3; i++)
+      for (j = 4; j <= 6; j++)
+	for (k = 5; k <= 7; k++)
+	  a[i][j][k] = i + j + k;
+
+    for (i = 1; i <= 3; i++)
+      for (j = 4; j <= 6; j++)
+	for (k = 5; k <= 7; k++)
+	  if (a[i][j][k] != i + j + k)
+	    __builtin_abort();
+  }
+
+  void test2 ()
+  {
+    int i, j, k;
+    int a[4][4][4];
+
+    __builtin_memset (a, 0, sizeof (a));
+
+#pragma acc parallel
+#pragma acc loop collapse(3)
+    for (i = 1; i <= 3; i++)
+      for (j = 1; j <= 3; j++)
+	for (k = 1; k <= 3; k++)
+	  a[i][j][k] = 1;
+
+    for (i = 1; i <= 3; i++)
+      for (j = 1; j <= 3; j++)
+	for (k = 1; k <= 3; k++)
+	  if (a[i][j][k] != 1)
+	    __builtin_abort ();
+  }
+
+  test1 ();
+  test2 ();
+
+  return 0;
+}
diff --git a/libgomp/testsuite/libgomp.oacc-c/nested-function-2.c b/libgomp/testsuite/libgomp.oacc-c/nested-function-2.c
new file mode 100644
index 00000000000..2c3f3feb7f8
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-c/nested-function-2.c
@@ -0,0 +1,155 @@
+/* Exercise nested function decomposition, gcc/tree-nested.c.  */
+
+int
+main (void)
+{
+  int p1 = 2, p2 = 6, p3 = 0, p4 = 4, p5 = 13, p6 = 18, p7 = 1, p8 = 1, p9 = 1;
+
+  void test1 ()
+  {
+    int i, j, k;
+    int a[4][4][4];
+
+    __builtin_memset (a, '\0', sizeof (a));
+
+#pragma acc parallel
+#pragma acc loop collapse(3)
+    for (i = 1; i <= 3; i++)
+      for (j = 1; j <= 3; j++)
+	for (k = 2; k <= 3; k++)
+	  a[i][j][k] = 1;
+
+    for (i = 1; i <= 3; i++)
+      for (j = 1; j <= 3; j++)
+	for (k = 2; k <= 3; k++)
+	  if (a[i][j][k] != 1)
+	    __builtin_abort();
+  }
+
+  void test2 (int v1, int v2, int v3, int v4, int v5, int v6)
+  {
+    int i, j, k, l = 0, r = 0;
+    int a[7][5][19];
+    int b[7][5][19];
+
+    __builtin_memset (a, '\0', sizeof (a));
+    __builtin_memset (b, '\0', sizeof (b));
+
+#pragma acc parallel reduction (||:l)
+#pragma acc loop reduction (||:l) collapse(3)
+    for (i = v1; i <= v2; i++)
+      for (j = v3; j <= v4; j++)
+	for (k = v5; k <= v6; k++)
+	  {
+	    l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!l)
+	      a[i][j][k] += 1;
+	  }
+
+    for (i = v1; i <= v2; i++)
+      for (j = v3; j <= v4; j++)
+	for (k = v5; k <= v6; k++)
+	  {
+	    r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!r)
+	      b[i][j][k] += 1;
+	  }
+
+    if (l != r)
+      __builtin_abort ();
+
+    for (i = v1; i <= v2; i++)
+      for (j = v3; j <= v4; j++)
+	for (k = v5; k <= v6; k++)
+	  if (b[i][j][k] != a[i][j][k])
+	    __builtin_abort ();
+  }
+
+  void test3 (int v1, int v2, int v3, int v4, int v5, int v6, int v7, int v8,
+      int v9)
+  {
+    int i, j, k, l = 0, r = 0;
+    int a[7][5][19];
+    int b[7][5][19];
+
+    __builtin_memset (a, '\0', sizeof (a));
+    __builtin_memset (b, '\0', sizeof (b));
+
+#pragma acc parallel reduction (||:l)
+#pragma acc loop reduction (||:l) collapse(3)
+    for (i = v1; i <= v2; i += v7)
+      for (j = v3; j <= v4; j += v8)
+	for (k = v5; k <= v6; k += v9)
+	  {
+	    l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!l)
+	      a[i][j][k] += 1;
+	  }
+
+    for (i = v1; i <= v2; i += v7)
+      for (j = v3; j <= v4; j += v8)
+	for (k = v5; k <= v6; k += v9)
+	  {
+	    r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!r)
+	      b[i][j][k] += 1;
+	  }
+
+    if (l != r)
+      __builtin_abort ();
+
+    for (i = v1; i <= v2; i++)
+      for (j = v3; j <= v4; j++)
+	for (k = v5; k <= v6; k++)
+	  if (b[i][j][k] != a[i][j][k])
+	    __builtin_abort ();
+  }
+
+  void test4 ()
+  {
+    int i, j, k, l = 0, r = 0;
+    int a[7][5][19];
+    int b[7][5][19];
+    int v1 = p1, v2 = p2, v3 = p3, v4 = p4, v5 = p5, v6 = p6, v7 = p7, v8 = p8,
+      v9 = p9;
+
+    __builtin_memset (a, '\0', sizeof (a));
+    __builtin_memset (b, '\0', sizeof (b));
+
+#pragma acc parallel reduction (||:l)
+#pragma acc loop reduction (||:l) collapse(3)
+    for (i = v1; i <= v2; i += v7)
+      for (j = v3; j <= v4; j += v8)
+	for (k = v5; k <= v6; k += v9)
+	  {
+	    l = l || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!l)
+	      a[i][j][k] += 1;
+	  }
+
+    for (i = v1; i <= v2; i += v7)
+      for (j = v3; j <= v4; j += v8)
+	for (k = v5; k <= v6; k += v9)
+	  {
+	    r = r || i < 2 || i > 6 || j < 0 || j > 4 || k < 13 || k > 18;
+	    if (!r)
+	      b[i][j][k] += 1;
+	  }
+
+    if (l != r)
+      __builtin_abort ();
+
+    for (i = v1; i <= v2; i++)
+      for (j = v3; j <= v4; j++)
+	for (k = v5; k <= v6; k++)
+	  if (b[i][j][k] != a[i][j][k])
+	    __builtin_abort ();
+  }
+
+  test1 ();
+  test2 (p1, p2, p3, p4, p5, p6);
+  test3 (p1, p2, p3, p4, p5, p6, p7, p8, p9);
+  test4 ();
+
+  return 0;
+}
diff --git a/libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95 b/libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95
new file mode 100644
index 00000000000..37313d8c44a
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-fortran/cache-1.f95
@@ -0,0 +1,6 @@
+! OpenACC cache directive.
+! { dg-do run }
+! { dg-additional-options "-std=f2008" }
+! { dg-additional-options "-cpp" }
+
+#include "../../../gcc/testsuite/gfortran.dg/goacc/cache-1.f95"
diff --git a/libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90 b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90
new file mode 100644
index 00000000000..fdbca4481f8
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-1.f90
@@ -0,0 +1,70 @@
+! Exercise nested function decomposition, gcc/tree-nested.c.
+
+! { dg-do run }
+
+program collapse2
+  call test1
+  call test2
+contains
+  subroutine test1
+    integer :: i, j, k, a(1:3, 4:6, 5:7)
+    logical :: l
+    l = .false.
+    a(:, :, :) = 0
+    !$acc parallel reduction (.or.:l)
+    !$acc loop worker vector collapse(4 - 1)
+      do 164 i = 1, 3
+        do 164 j = 4, 6
+          do 164 k = 5, 7
+            a(i, j, k) = i + j + k
+164      end do
+    !$acc loop worker vector reduction(.or.:l) collapse(2)
+firstdo: do i = 1, 3
+        do j = 4, 6
+          do k = 5, 7
+            if (a(i, j, k) .ne. (i + j + k)) l = .true.
+          end do
+        end do
+      end do firstdo
+    !$acc end parallel
+    if (l) call abort
+  end subroutine test1
+
+  subroutine test2
+    integer :: a(3,3,3), k, kk, kkk, l, ll, lll
+    a = 0
+    !$acc parallel
+    ! Use "gang(static:1)" here and below to effectively turn gang-redundant
+    ! execution mode into something like gang-single.
+    !$acc loop gang(static:1) collapse(1)
+      do 115 k=1,3
+         !$acc loop collapse(2)
+  dokk: do kk=1,3
+          do kkk=1,3
+            a(k,kk,kkk) = 1
+          enddo
+        enddo dokk
+115   continue
+    !$acc loop gang(static:1) collapse(1)
+      do k=1,3
+         if (any(a(k,1:3,1:3).ne.1)) call abort
+      enddo
+    ! Use "gang(static:1)" here and below to effectively turn gang-redundant
+    ! execution mode into something like gang-single.
+    !$acc loop gang(static:1) collapse(1)
+ dol: do 120 l=1,3
+    !$acc loop collapse(2)
+  doll: do ll=1,3
+          do lll=1,3
+            a(l,ll,lll) = 2
+          enddo
+        enddo doll
+120   end do dol
+    !$acc loop gang(static:1) collapse(1)
+     do l=1,3
+        if (any(a(l,1:3,1:3).ne.2)) call abort
+     enddo
+    !$acc end parallel
+  end subroutine test2
+
+end program collapse2
diff --git a/libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90 b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90
new file mode 100644
index 00000000000..4e2819641ea
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-2.f90
@@ -0,0 +1,173 @@
+! Exercise nested function decomposition, gcc/tree-nested.c.
+
+! { dg-do run }
+
+program collapse3
+  integer :: p1, p2, p3, p4, p5, p6, p7, p8, p9
+  p1 = 2
+  p2 = 6
+  p3 = -2
+  p4 = 4
+  p5 = 13
+  p6 = 18
+  p7 = 1
+  p8 = 1
+  p9 = 1
+  call test1
+  call test2 (p1, p2, p3, p4, p5, p6)
+  call test3 (p1, p2, p3, p4, p5, p6, p7, p8, p9)
+  call test4
+contains
+  subroutine test1
+    integer :: a(3,3,3), k, kk, kkk, l, ll, lll
+    !$acc parallel
+    !$acc loop collapse(3)
+      do 115 k=1,3
+dokk:   do kk=1,3
+          do kkk=1,3
+            a(k,kk,kkk) = 1
+          enddo
+        enddo dokk
+115   continue
+    !$acc end parallel
+    if (any(a(1:3,1:3,1:3).ne.1)) call abort
+    !$acc parallel
+    !$acc loop collapse(3)
+dol:  do 120 l=1,3
+doll:   do ll=1,3
+          do lll=1,3
+            a(l,ll,lll) = 2
+          enddo
+        enddo doll
+120   end do dol
+    !$acc end parallel
+    if (any(a(1:3,1:3,1:3).ne.2)) call abort
+    end subroutine test1
+
+  subroutine test2(v1, v2, v3, v4, v5, v6)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2
+        do j = v3, v4
+          do k = v5, v6
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.l) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test2
+
+  subroutine test3(v1, v2, v3, v4, v5, v6, v7, v8, v9)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2, v7
+        do j = v3, v4, v8
+          do k = v5, v6, v9
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.l) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test3
+
+  subroutine test4
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    v1 = p1
+    v2 = p2
+    v3 = p3
+    v4 = p4
+    v5 = p5
+    v6 = p6
+    v7 = p7
+    v8 = p8
+    v9 = p9
+    !$acc parallel reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2, v7
+        do j = v3, v4, v8
+          do k = v5, v6, v9
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.r) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+         do k = v5, v6, v9
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+         end do
+      end do
+    end do
+  end subroutine test4
+
+end program collapse3
diff --git a/libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90 b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90
new file mode 100644
index 00000000000..2f6485ef8cf
--- /dev/null
+++ b/libgomp/testsuite/libgomp.oacc-fortran/nested-function-3.f90
@@ -0,0 +1,244 @@
+! Exercise nested function decomposition, gcc/tree-nested.c.
+
+! { dg-do run }
+
+program sub_collapse_3
+  call test1
+  call test2 (2, 6, -2, 4, 13, 18)
+  call test3 (2, 6, -2, 4, 13, 18, 1, 1, 1)
+  call test4
+  call test5 (2, 6, -2, 4, 13, 18)
+  call test6 (2, 6, -2, 4, 13, 18, 1, 1, 1)
+contains
+  subroutine test1
+    integer :: a(3,3,3), k, kk, kkk, l, ll, lll
+    !$acc parallel
+    !$acc loop collapse(3)
+      do 115 k=1,3
+dokk:   do kk=1,3
+          do kkk=1,3
+            a(k,kk,kkk) = 1
+          enddo
+        enddo dokk
+115   continue
+    !$acc end parallel
+    if (any(a(1:3,1:3,1:3).ne.1)) call abort
+    !$acc parallel
+    !$acc loop collapse(3)
+dol:  do 120 l=1,3
+doll:   do ll=1,3
+          do lll=1,3
+            a(l,ll,lll) = 2
+          enddo
+        enddo doll
+120   end do dol
+    !$acc end parallel
+    if (any(a(1:3,1:3,1:3).ne.2)) call abort
+  end subroutine test1
+
+  subroutine test2(v1, v2, v3, v4, v5, v6)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6) reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2
+        do j = v3, v4
+          do k = v5, v6
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.l) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test2
+
+  subroutine test3(v1, v2, v3, v4, v5, v6, v7, v8, v9)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2, v7
+        do j = v3, v4, v8
+          do k = v5, v6, v9
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.l) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test3
+
+  subroutine test4
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    v1 = 2
+    v2 = 6
+    v3 = -2
+    v4 = 4
+    v5 = 13
+    v6 = 18
+    v7 = 1
+    v8 = 1
+    v9 = 1
+    !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2, v7
+        do j = v3, v4, v8
+          do k = v5, v6, v9
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.r) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+         do k = v5, v6, v9
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+         end do
+      end do
+    end do
+  end subroutine test4
+
+  subroutine test5(v1, v2, v3, v4, v5, v6)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6) reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2
+        do j = v3, v4
+          do k = v5, v6
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.r) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2
+      do j = v3, v4
+        do k = v5, v6
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test5
+
+  subroutine test6(v1, v2, v3, v4, v5, v6, v7, v8, v9)
+    integer :: i, j, k, a(1:7, -3:5, 12:19), b(1:7, -3:5, 12:19)
+    integer :: v1, v2, v3, v4, v5, v6, v7, v8, v9
+    logical :: l, r
+    l = .false.
+    r = .false.
+    a(:, :, :) = 0
+    b(:, :, :) = 0
+    !$acc parallel pcopyin (v1, v2, v3, v4, v5, v6, v7, v8, v9) reduction (.or.:l)
+    !$acc loop reduction (.or.:l) collapse (3)
+      do i = v1, v2, v7
+        do j = v3, v4, v8
+          do k = v5, v6, v9
+            l = l.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+            l = l.or.k.lt.13.or.k.gt.18
+            if (.not.l) a(i, j, k) = a(i, j, k) + 1
+            m = i * 100 + j * 10 + k
+          end do
+        end do
+      end do
+    !$acc end parallel
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+          r = r.or.i.lt.2.or.i.gt.6.or.j.lt.-2.or.j.gt.4
+          r = r.or.k.lt.13.or.k.gt.18
+          if (.not.r) b(i, j, k) = b(i, j, k) + 1
+        end do
+      end do
+    end do
+    if (l .neqv. r) call abort
+    do i = v1, v2, v7
+      do j = v3, v4, v8
+        do k = v5, v6, v9
+           if (a(i, j, k) .ne. b(i, j, k)) call abort
+        end do
+      end do
+    end do
+  end subroutine test6
+
+end program sub_collapse_3
diff --git a/libstdc++-v3/testsuite/20_util/function/cons/refqual.cc b/libstdc++-v3/testsuite/20_util/function/cons/refqual.cc
new file mode 100644
index 00000000000..d3744eefc80
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/function/cons/refqual.cc
@@ -0,0 +1,31 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11" }
+
+#include <functional>
+
+struct F {
+  void operator()() && { }
+  int operator()() & { return 0; }
+};
+
+int main() {
+  F f;
+  std::function<int()> ff{f};
+  return ff();
+}
diff --git a/libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc b/libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc
new file mode 100644
index 00000000000..fe9bea678a4
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/tuple/cons/element_accepts_anything_byval.cc
@@ -0,0 +1,30 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <tuple>
+using namespace std;
+
+struct Something {
+    Something() { }
+    template <typename T> Something(T) { }
+};
+
+int main() {
+    tuple<Something> t1;
+    tuple<Something> t2 = t1;
+}
+
diff --git a/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/69703.cc b/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/69703.cc
new file mode 100644
index 00000000000..745d2c27917
--- /dev/null
+++ b/libstdc++-v3/testsuite/22_locale/codecvt/codecvt_utf8/69703.cc
@@ -0,0 +1,103 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11" }
+
+#include <codecvt>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+  bool test __attribute__((unused)) = true;
+
+  const char out[] = "abc";
+  char16_t in[4];
+  std::codecvt_utf8<char16_t> cvt;
+  std::mbstate_t st;
+  const char* no;
+  char16_t* ni;
+  auto res = cvt.in(st, out, out+3, no, in, in+3, ni);
+  VERIFY( res == std::codecvt_base::ok );
+  VERIFY( in[0] == u'a' );
+  VERIFY( in[1] == u'b' );
+  VERIFY( in[2] == u'c' );
+}
+
+void
+test02()
+{
+  bool test __attribute__((unused)) = true;
+
+  const char out[] = "abc";
+  char16_t in[4];
+  std::codecvt_utf8<char16_t, 0x10ffff, std::little_endian> cvt;
+  std::mbstate_t st;
+  const char* no;
+  char16_t* ni;
+  auto res = cvt.in(st, out, out+3, no, in, in+3, ni);
+  VERIFY( res == std::codecvt_base::ok );
+  VERIFY( in[0] == u'a' );
+  VERIFY( in[1] == u'b' );
+  VERIFY( in[2] == u'c' );
+}
+
+void
+test03()
+{
+  bool test __attribute__((unused)) = true;
+
+  const char out[] = "abc";
+  char32_t in[4];
+  std::codecvt_utf8<char32_t> cvt;
+  std::mbstate_t st;
+  const char* no;
+  char32_t* ni;
+  auto res = cvt.in(st, out, out+3, no, in, in+3, ni);
+  VERIFY( res == std::codecvt_base::ok );
+  VERIFY( in[0] == U'a' );
+  VERIFY( in[1] == U'b' );
+  VERIFY( in[2] == U'c' );
+}
+
+
+void
+test04()
+{
+  bool test __attribute__((unused)) = true;
+
+  const char out[] = "abc";
+  char32_t in[4];
+  std::codecvt_utf8<char32_t, 0x10ffff, std::little_endian> cvt;
+  std::mbstate_t st;
+  const char* no;
+  char32_t* ni;
+  auto res = cvt.in(st, out, out+3, no, in, in+3, ni);
+  VERIFY( res == std::codecvt_base::ok );
+  VERIFY( in[0] == U'a' );
+  VERIFY( in[1] == U'b' );
+  VERIFY( in[2] == U'c' );
+}
+
+int
+main()
+{
+  test01();
+  test02();
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc b/libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc
new file mode 100644
index 00000000000..f13828feffd
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/set/allocator/71964.cc
@@ -0,0 +1,71 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11" }
+
+#include <set>
+#include <testsuite_hooks.h>
+
+template<typename T>
+  struct mv_allocator
+  {
+    using value_type = T;
+    using size_type = unsigned;
+
+    mv_allocator()
+    : moved_to(false), moved_from(false) { }
+
+    template<typename U>
+      mv_allocator(const mv_allocator<U> & a)
+      : moved_to(a.moved_to), moved_from(a.moved_from) { }
+
+    mv_allocator(const mv_allocator &) = default;
+
+    mv_allocator(mv_allocator && a) noexcept : moved_to(true)
+    {
+      a.moved_from = true;
+    }
+
+    T* allocate(unsigned n) { return std::allocator<T>{}.allcoate(n); }
+    void deallocate(T* p, unsigned n) { std::allocator<T>{}.deallocate(p, n); }
+
+    bool moved_to;
+    bool moved_from;
+  };
+
+template<typename T, typename U>
+bool
+operator==(const mv_allocator<T>&, const mv_allocator<U>&) { return true; }
+
+template<typename T, typename U>
+bool
+operator!=(const mv_allocator<T>&, const mv_allocator<U>&) { return false; }
+
+void
+test01()
+{
+  std::set<int, std::less<int>, mv_allocator<int>> s;
+  auto t = std::move(s);
+  VERIFY( s.get_allocator().moved_from );
+  VERIFY( t.get_allocator().moved_to );
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc b/libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc
new file mode 100644
index 00000000000..63a6cada97e
--- /dev/null
+++ b/libstdc++-v3/testsuite/25_algorithms/binary_search/partitioned.cc
@@ -0,0 +1,67 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
+
+#include <algorithm>
+#include <functional>
+#include <testsuite_iterators.h>
+#include <testsuite_hooks.h>
+
+using __gnu_test::test_container;
+using __gnu_test::forward_iterator_wrapper;
+
+struct X
+{
+  int val;
+
+  bool odd() const { return val % 2; }
+
+  // Partitioned so that all odd values come before even values:
+  bool operator<(const X& x) const { return this->odd() && !x.odd(); }
+};
+
+void
+test01()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test with range that is partitioned, but not sorted.
+  X seq[] = { 1, 3, 5, 7, 1, 6, 4 };
+  test_container<X, forward_iterator_wrapper> c(seq);
+
+  auto b1 = std::binary_search(c.begin(), c.end(), X{2});
+  VERIFY( b1 );
+  auto b2 = std::binary_search(c.begin(), c.end(), X{2}, std::less<X>{});
+  VERIFY( b2 );
+
+  auto b3 = std::binary_search(c.begin(), c.end(), X{9});
+  VERIFY( b3 );
+  auto b4 = std::binary_search(c.begin(), c.end(), X{9}, std::less<X>{});
+  VERIFY( b4 );
+
+  auto b5 = std::binary_search(seq, seq+5, X{2});
+  VERIFY( !b5 );
+  auto b6 = std::binary_search(seq, seq+5, X{2}, std::less<X>{});
+  VERIFY( !b6 );
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc b/libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc
new file mode 100644
index 00000000000..d3a43d06a58
--- /dev/null
+++ b/libstdc++-v3/testsuite/25_algorithms/equal_range/partitioned.cc
@@ -0,0 +1,66 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
+
+#include <algorithm>
+#include <functional>
+#include <testsuite_iterators.h>
+#include <testsuite_hooks.h>
+
+using __gnu_test::test_container;
+using __gnu_test::forward_iterator_wrapper;
+
+struct X
+{
+  int val;
+
+  bool odd() const { return val % 2; }
+
+  // Partitioned so that all odd values come before even values:
+  bool operator<(const X& x) const { return this->odd() && !x.odd(); }
+};
+
+void
+test01()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test with range that is partitioned, but not sorted.
+  X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
+  test_container<X, forward_iterator_wrapper> c(seq);
+
+  auto part1 = std::equal_range(c.begin(), c.end(), X{2});
+  VERIFY( part1.first != c.end() && part1.second == c.end() );
+  VERIFY( part1.first->val == 6 );
+  auto part2 = std::equal_range(c.begin(), c.end(), X{2}, std::less<X>{});
+  VERIFY( part2.first != c.end() && part1.second == c.end() );
+  VERIFY( part2.first->val == 6 );
+
+  auto part3 = std::equal_range(c.begin(), c.end(), X{9});
+  VERIFY( part3.first == c.begin() && part3.second != c.end() );
+  VERIFY( part3.second->val == 6 );
+  auto part4 = std::equal_range(c.begin(), c.end(), X{9}, std::less<X>{});
+  VERIFY( part4.first == c.begin() && part4.second != c.end() );
+  VERIFY( part4.second->val == 6 );
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc b/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc
new file mode 100644
index 00000000000..6c9cd12cfef
--- /dev/null
+++ b/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/71545.cc
@@ -0,0 +1,35 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
+// { dg-do link }
+
+#include <algorithm>
+
+struct X { };
+
+bool operator<(X, int) { return true; }
+bool operator<(int, X) { return false; }
+
+bool operator<(X, X); // undefined (PR libstdc++/71545)
+
+int main()
+{
+  X x[1];
+  int i[1];
+  std::lexicographical_compare(x, x+1, i, i+1);
+}
diff --git a/libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc b/libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc
new file mode 100644
index 00000000000..bba0b66ea80
--- /dev/null
+++ b/libstdc++-v3/testsuite/25_algorithms/lower_bound/partitioned.cc
@@ -0,0 +1,100 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
+
+#include <algorithm>
+#include <functional>
+#include <testsuite_iterators.h>
+#include <testsuite_hooks.h>
+
+using __gnu_test::test_container;
+using __gnu_test::forward_iterator_wrapper;
+
+struct X
+{
+  int val;
+
+  bool odd() const { return val % 2; }
+
+  // Partitioned so that all odd values come before even values:
+  bool operator<(const X& x) const { return this->odd() && !x.odd(); }
+};
+
+void
+test01()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test with range that is partitioned, but not sorted.
+  X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
+  test_container<X, forward_iterator_wrapper> c(seq);
+
+  auto part1 = std::lower_bound(c.begin(), c.end(), X{2});
+  VERIFY( part1 != c.end() );
+  VERIFY( part1->val == 6 );
+  auto part2 = std::lower_bound(c.begin(), c.end(), X{2}, std::less<X>{});
+  VERIFY( part2 != c.end() );
+  VERIFY( part2->val == 6 );
+
+  auto part3 = std::lower_bound(c.begin(), c.end(), X{9});
+  VERIFY( part3 != c.end() );
+  VERIFY( part3->val == 1 );
+  auto part4 = std::lower_bound(c.begin(), c.end(), X{9}, std::less<X>{});
+  VERIFY( part4 != c.end() );
+  VERIFY( part4->val == 1 );
+}
+
+struct Y
+{
+  double val;
+
+  // Not irreflexive, so not a strict weak order.
+  bool operator<(const Y& y) const { return val < int(y.val); }
+};
+
+void
+test02()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test that Debug Mode checks don't fire (libstdc++/71545)
+
+  Y seq[] = { -0.1, 1.2, 5.0, 5.2, 5.1, 5.9, 5.5, 6.0 };
+  test_container<Y, forward_iterator_wrapper> c(seq);
+
+  auto part1 = std::lower_bound(c.begin(), c.end(), Y{5.5});
+  VERIFY( part1 != c.end() );
+  VERIFY( part1->val == 5.0 );
+  auto part2 = std::lower_bound(c.begin(), c.end(), Y{5.5}, std::less<Y>{});
+  VERIFY( part2 != c.end() );
+  VERIFY( part2->val == 5.0 );
+
+  auto part3 = std::lower_bound(c.begin(), c.end(), Y{1.0});
+  VERIFY( part3 != c.end() );
+  VERIFY( part3->val == 1.2 );
+  auto part4 = std::lower_bound(c.begin(), c.end(), Y{1.0}, std::less<Y>{});
+  VERIFY( part4 != c.end() );
+  VERIFY( part4->val == 1.2 );
+}
+
+int
+main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc b/libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc
new file mode 100644
index 00000000000..96cfb2e2ded
--- /dev/null
+++ b/libstdc++-v3/testsuite/25_algorithms/upper_bound/partitioned.cc
@@ -0,0 +1,98 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -D_GLIBCXX_DEBUG" }
+
+#include <algorithm>
+#include <functional>
+#include <testsuite_iterators.h>
+#include <testsuite_hooks.h>
+
+using __gnu_test::test_container;
+using __gnu_test::forward_iterator_wrapper;
+
+struct X
+{
+  int val;
+
+  bool odd() const { return val % 2; }
+
+  // Partitioned so that all odd values come before even values:
+  bool operator<(const X& x) const { return this->odd() && !x.odd(); }
+};
+
+void
+test01()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test with range that is partitioned, but not sorted.
+  X seq[] = { 1, 3, 5, 7, 1, 6, 4, 2 };
+  test_container<X, forward_iterator_wrapper> c(seq);
+
+  auto part1 = std::upper_bound(c.begin(), c.end(), X{2});
+  VERIFY( part1 == c.end() );
+  auto part2 = std::upper_bound(c.begin(), c.end(), X{2}, std::less<X>{});
+  VERIFY( part2 == c.end() );
+
+  auto part3 = std::upper_bound(c.begin(), c.end(), X{9});
+  VERIFY( part3 != c.end() );
+  VERIFY( part3->val == 6 );
+  auto part4 = std::upper_bound(c.begin(), c.end(), X{9}, std::less<X>{});
+  VERIFY( part3 != c.end() );
+  VERIFY( part4->val == 6 );
+}
+
+struct Y
+{
+  double val;
+
+  // Not irreflexive, so not a strict weak order.
+  bool operator<(const Y& y) const { return val < (int)y.val; }
+};
+
+void
+test02()
+{
+  bool test __attribute((unused)) = true;
+
+  // Test that Debug Mode checks don't fire (libstdc++/71545)
+
+  Y seq[] = { -0.1, 1.2, 5.0, 5.2, 5.1, 5.9, 5.5, 6.0 };
+  test_container<Y, forward_iterator_wrapper> c(seq);
+
+  auto part1 = std::upper_bound(c.begin(), c.end(), Y{5.5});
+  VERIFY( part1 != c.end() );
+  VERIFY( part1->val == 6.0 );
+  auto part2 = std::upper_bound(c.begin(), c.end(), Y{5.5}, std::less<Y>{});
+  VERIFY( part2 != c.end() );
+  VERIFY( part2->val == 6.0 );
+
+  auto part3 = std::upper_bound(c.begin(), c.end(), Y{1.0});
+  VERIFY( part3 != c.end() );
+  VERIFY( part3->val == 5.0 );
+  auto part4 = std::upper_bound(c.begin(), c.end(), Y{1.0}, std::less<Y>{});
+  VERIFY( part4 != c.end() );
+  VERIFY( part4->val == 5.0 );
+}
+
+int
+main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/experimental/filesystem/operations/copy_file.cc b/libstdc++-v3/testsuite/experimental/filesystem/operations/copy_file.cc
new file mode 100644
index 00000000000..cdb79111351
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/filesystem/operations/copy_file.cc
@@ -0,0 +1,82 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -lstdc++fs" }
+// { dg-require-filesystem-ts "" }
+
+// 15.4 Copy [fs.op.copy_file]
+
+#include <experimental/filesystem>
+#include <fstream>
+#include <testsuite_fs.h>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+  bool test __attribute__((unused)) = false;
+  using std::experimental::filesystem::copy_options;
+  std::error_code ec;
+
+  auto from = __gnu_test::nonexistent_path();
+  auto to = __gnu_test::nonexistent_path();
+
+  // test non-existent file
+  bool b = copy_file(from, to, ec);
+  VERIFY( !b );
+  VERIFY( ec );
+  VERIFY( !exists(to) );
+
+  // test empty file
+  std::ofstream{from.native()};
+  VERIFY( exists(from) );
+  VERIFY( file_size(from) == 0 );
+
+  b = copy_file(from, to);
+  VERIFY( b );
+  VERIFY( exists(to) );
+  VERIFY( file_size(to) == 0 );
+  remove(to);
+  VERIFY( !exists(to) );
+  b = copy_file(from, to, copy_options::none, ec);
+  VERIFY( b );
+  VERIFY( !ec );
+  VERIFY( exists(to) );
+  VERIFY( file_size(to) == 0 );
+
+  std::ofstream{from.native()} << "Hello, filesystem!";
+  VERIFY( file_size(from) != 0 );
+  remove(to);
+  VERIFY( !exists(to) );
+  b = copy_file(from, to);
+  VERIFY( b );
+  VERIFY( exists(to) );
+  VERIFY( file_size(to) == file_size(from) );
+  remove(to);
+  VERIFY( !exists(to) );
+  b = copy_file(from, to);
+  VERIFY( b );
+  VERIFY( !ec );
+  VERIFY( exists(to) );
+  VERIFY( file_size(to) == file_size(from) );
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc b/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
new file mode 100644
index 00000000000..66c2b3fb796
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directory.cc
@@ -0,0 +1,63 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -lstdc++fs" }
+// { dg-require-filesystem-ts "" }
+
+#include <experimental/filesystem>
+#include <testsuite_hooks.h>
+#include <testsuite_fs.h>
+
+namespace fs = std::experimental::filesystem;
+
+void
+test01()
+{
+  bool test __attribute__((unused)) = false;
+  std::error_code ec;
+
+  // Test empty path.
+  fs::path p;
+  bool b = create_directory( p, ec );
+  VERIFY( ec );
+  VERIFY( !b );
+
+  // Test non-existent path
+  p = __gnu_test::nonexistent_path();
+  VERIFY( !exists(p) );
+
+  b = create_directory(p, ec); // create the directory once
+  VERIFY( !ec );
+  VERIFY( b );
+  VERIFY( exists(p) );
+
+  // Test existing path (libstdc++/71036).
+  b = create_directory(p, ec);
+  VERIFY( !ec );
+  VERIFY( !b );
+  b = create_directory(p);
+  VERIFY( !ec );
+  VERIFY( !b );
+
+  remove_all(p, ec);
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc b/libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc
new file mode 100644
index 00000000000..e4148609c2b
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/filesystem/operations/permissions.cc
@@ -0,0 +1,51 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -lstdc++fs" }
+// { dg-require-filesystem-ts "" }
+
+// 15.26 Permissions [fs.op.permissions]
+
+#include <experimental/filesystem>
+#include <fstream>
+#include <testsuite_fs.h>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+  bool test __attribute__((unused)) = true;
+  using perms = std::experimental::filesystem::perms;
+
+  auto p = __gnu_test::nonexistent_path();
+  std::ofstream{p.native()};
+  VERIFY( exists(p) );
+  permissions(p, perms::owner_all);
+  VERIFY( status(p).permissions() == perms::owner_all );
+  permissions(p, perms::group_read | perms::add_perms);
+  VERIFY( status(p).permissions() == (perms::owner_all | perms::group_read) );
+  permissions(p, perms::group_read | perms::remove_perms);
+  VERIFY( status(p).permissions() == perms::owner_all );
+
+  remove(p);
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc b/libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc
new file mode 100644
index 00000000000..e56fda7b95f
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/filesystem/path/native/string.cc
@@ -0,0 +1,73 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11 -lstdc++fs" }
+// { dg-require-filesystem-ts "" }
+
+#include <experimental/filesystem>
+#include <string>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+  bool test __attribute__((unused)) = true;
+
+  using namespace std::experimental::filesystem;
+  const std::string s = "abc";
+  path p(s);
+
+  VERIFY( p.native() == s );
+  VERIFY( p.c_str() == s );
+  VERIFY( static_cast<std::string>(p) == s );
+
+  std::string s2 = p; // implicit conversion
+  VERIFY( s2 == p.native() );
+}
+
+void
+test02()
+{
+  bool test __attribute__((unused)) = true;
+
+  using namespace std::experimental::filesystem;
+  const char* s = "abc";
+  path p(s);
+
+  auto str = p.string<char>();
+  VERIFY( str == u"abc" );
+  VERIFY( str == p.string() );
+
+  auto strw = p.string<wchar_t>();
+  VERIFY( strw == L"abc" );
+  VERIFY( strw == p.wstring() );
+
+  auto str16 = p.string<char16_t>();
+  VERIFY( str16 == u"abc" );
+  VERIFY( str16 == p.u16string() );
+
+  auto str32 = p.string<char32_t>();
+  VERIFY( str32 == U"abc" );
+  VERIFY( str32 == p.u32string() );
+}
+
+int
+main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/experimental/memory_resource/1.cc b/libstdc++-v3/testsuite/experimental/memory_resource/1.cc
new file mode 100644
index 00000000000..08c02e5e31b
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/memory_resource/1.cc
@@ -0,0 +1,162 @@
+// { dg-options "-std=gnu++14" }
+// { dg-require-atomic-builtins "" }
+
+// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <experimental/memory_resource>
+#include <vector>
+#include <cstdlib>
+#include <testsuite_hooks.h>
+#include <testsuite_allocator.h>
+
+using std::experimental::pmr::polymorphic_allocator;
+using std::experimental::pmr::memory_resource;
+using std::experimental::pmr::new_delete_resource;
+using std::experimental::pmr::get_default_resource;
+using std::experimental::pmr::set_default_resource;
+
+struct A
+{
+  A() { ++ctor_count; }
+  ~A() { ++dtor_count; }
+  static int ctor_count;
+  static int dtor_count;
+};
+
+int A::ctor_count = 0;
+int A::dtor_count = 0;
+
+struct CountedResource : public memory_resource
+{
+public:
+  CountedResource() = default;
+  ~CountedResource() = default;
+
+  static size_t get_alloc_count()  { return alloc_count;  }
+  static size_t get_dalloc_count() { return dalloc_count; }
+
+  static size_t  alloc_count;
+  static size_t  dalloc_count;
+protected:
+  void* do_allocate(size_t bytes, size_t alignment)
+  {
+    alloc_count += bytes;
+    if (auto ptr = std::malloc(bytes))
+      return ptr;
+    throw std::bad_alloc();
+  }
+
+  void do_deallocate(void *p, size_t bytes, size_t alignment)
+  {
+    dalloc_count += bytes;
+    std::free(p);
+  }
+
+  bool do_is_equal(const memory_resource& __other) const noexcept
+  { return this == &__other; }
+};
+
+size_t CountedResource::alloc_count  = 0;
+size_t CountedResource::dalloc_count = 0;
+
+void clear()
+{
+  CountedResource::alloc_count  = 0;
+  CountedResource::dalloc_count = 0;
+  A::ctor_count = 0;
+  A::dtor_count = 0;
+}
+
+// memory resource
+void
+test01()
+{
+  bool test __attribute((unused)) = false;
+
+  memory_resource* r = new_delete_resource();
+  VERIFY(get_default_resource() == r);
+  void *p = get_default_resource()->allocate(5);
+  VERIFY(p);
+  get_default_resource()->deallocate(p, 5);
+
+  clear();
+  CountedResource* cr = new CountedResource();
+  set_default_resource(cr);
+  VERIFY(get_default_resource() == cr);
+  void *pc = get_default_resource()->allocate(5);
+  VERIFY(pc);
+  get_default_resource()->deallocate(pc, 5);
+  VERIFY(CountedResource::get_alloc_count()  == 5);
+  VERIFY(CountedResource::get_dalloc_count() == 5);
+}
+
+// polymorphic_allocator
+void
+test02()
+{
+  bool test __attribute((unused)) = false;
+
+  clear();
+  {
+    CountedResource cr;
+    polymorphic_allocator<A> pa(&cr);
+    std::vector<A, polymorphic_allocator<A>> v(5, A(), pa);
+  }
+  VERIFY(A::ctor_count == 1);
+  VERIFY(A::dtor_count == 6);
+  VERIFY(CountedResource::get_alloc_count()  == 5);
+  VERIFY(CountedResource::get_dalloc_count() == 5);
+}
+
+void
+test03()
+{
+  bool test __attribute((unused)) = false;
+
+  clear();
+  CountedResource cr;
+  polymorphic_allocator<A> pa(&cr);
+  A* p = pa.allocate(1);
+  pa.construct(p);
+  pa.destroy(p);
+  pa.deallocate(p, 1);
+  VERIFY(A::ctor_count == 1);
+  VERIFY(A::dtor_count == 1);
+  VERIFY(CountedResource::get_alloc_count()  == 1);
+  VERIFY(CountedResource::get_dalloc_count() == 1);
+}
+
+void
+test04()
+{
+  bool test __attribute((unused)) = false;
+
+  polymorphic_allocator<A> pa1(get_default_resource());
+  polymorphic_allocator<A> pa2(get_default_resource());
+  VERIFY(pa1 == pa2);
+  polymorphic_allocator<A> pa3 = pa2.select_on_container_copy_construction();
+  VERIFY(pa1 == pa3);
+}
+
+int main()
+{
+  test01();
+  test02();
+  test03();
+  test04();
+}
diff --git a/libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc b/libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc
new file mode 100644
index 00000000000..09d9af0ba8c
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/memory_resource/null_memory_resource.cc
@@ -0,0 +1,53 @@
+// { dg-options "-std=gnu++14" }
+
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <experimental/memory_resource>
+#include <bits/uses_allocator.h>
+#include <testsuite_hooks.h>
+
+using std::experimental::pmr::memory_resource;
+using std::experimental::pmr::null_memory_resource;
+using std::experimental::pmr::new_delete_resource;
+
+// null_memory_resource
+void
+test06()
+{
+  bool test __attribute((unused)) = false;
+
+  memory_resource* r = null_memory_resource();
+  bool caught = false;
+
+  void* p = nullptr;
+  try {
+    p = r->allocate(1);
+  } catch (const std::bad_alloc&) {
+    caught = true;
+  }
+  VERIFY( caught );
+
+  VERIFY( *r == *r );
+  VERIFY( r->is_equal(*r) );
+  VERIFY( !r->is_equal(*new_delete_resource()) );
+}
+
+int main()
+{
+  test06();
+}
diff --git a/libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc b/libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc
new file mode 100644
index 00000000000..299bb72ea4b
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/memory_resource/resource_adaptor.cc
@@ -0,0 +1,87 @@
+// { dg-options "-std=gnu++14" }
+
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <experimental/memory_resource>
+#include <testsuite_hooks.h>
+#include <testsuite_allocator.h>
+
+using std::experimental::pmr::memory_resource;
+using std::experimental::pmr::resource_adaptor;
+
+template<typename T>
+  struct Allocator : __gnu_test::SimpleAllocator<T>
+  {
+    Allocator(int) { } // not default constructible
+
+    template<typename U>
+      Allocator(const Allocator<U>&) { }
+  };
+
+template<typename T>
+  bool aligned(void* p)
+  {
+    return (reinterpret_cast<std::uintptr_t>(p) % alignof(T)) == 0;
+  }
+
+// resource_adaptor
+void
+test05()
+{
+  bool test __attribute((unused)) = false;
+  using std::max_align_t;
+  using std::uintptr_t;
+  void* p = nullptr;
+
+  Allocator<int> a1(1), a2(2); // minimal interface allocators
+  resource_adaptor<decltype(a1)> r1(a1), r2(a2);
+  VERIFY( r1 == r1 );
+  VERIFY( r1 == r2 );
+  p = r1.allocate(1);
+  VERIFY( aligned<max_align_t>(p) );
+  r1.deallocate(p, 1);
+  p = r1.allocate(1, alignof(short));
+  VERIFY( aligned<short>(p) );
+  r1.deallocate(p, 1, alignof(short));
+  p = r1.allocate(1, alignof(long));
+  VERIFY( aligned<long>(p) );
+  r1.deallocate(p, 1, alignof(long));
+
+  __gnu_test::uneq_allocator<double> a3(3), a4(4); // non-equal allocators
+  resource_adaptor<decltype(a3)> r3(a3), r4(a4);
+  VERIFY( r3 == r3 );
+  VERIFY( r4 == r4 );
+  VERIFY( r3 != r4 );
+  p = r3.allocate(1);
+  VERIFY( aligned<max_align_t>(p) );
+  r3.deallocate(p, 1);
+  p = r3.allocate(1, alignof(short));
+  VERIFY( aligned<short>(p) );
+  r3.deallocate(p, 1, alignof(short));
+  p = r3.allocate(1, alignof(long));
+  VERIFY( aligned<long>(p) );
+  r3.deallocate(p, 1, alignof(long));
+
+  // TODO test with an allocator that doesn't use new or malloc, so
+  // returns pointers that are not suitably aligned for any type.
+}
+
+int main()
+{
+  test05();
+}
diff --git a/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc b/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc
new file mode 100644
index 00000000000..c862a04986a
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc
@@ -0,0 +1,39 @@
+// { dg-options "-std=gnu++14" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <experimental/optional>
+#include <testsuite_hooks.h>
+
+#include <string>
+#include <memory>
+
+int main()
+{
+  {
+    struct X
+    {
+      explicit X(int) {}
+    };
+    std::experimental::optional<X> ox{42};
+    std::experimental::optional<X> ox2 = 42; // { dg-error "conversion" }
+    std::experimental::optional<std::unique_ptr<int>> oup{new int};
+    std::experimental::optional<std::unique_ptr<int>> oup2 = new int;  // { dg-error "conversion" }
+  }
+}
-- 
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