From 287c39821ffd052f1f9eb19f2baebe6c2aee728b Mon Sep 17 00:00:00 2001 From: jakub Date: Thu, 28 Apr 2016 17:10:14 +0000 Subject: PR target/70821 * config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp): Add new peephole2 where the first insn is *mov_or instead of *mov_internal. * gcc.target/i386/pr70821.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@235586 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 7 +++++++ gcc/config/i386/sync.md | 30 ++++++++++++++++++++++++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr70821.c | 16 ++++++++++++++++ 4 files changed, 58 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr70821.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a1de895e61..d18013ef8a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-04-28 Jakub Jelinek + + PR target/70821 + * config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp): + Add new peephole2 where the first insn is *mov_or instead of + *mov_internal. + 2016-04-28 Segher Boesssenkool * tracer.c (bb_seen): Make static. diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 85a2b9ad630..bc4fd34e6d5 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -467,6 +467,36 @@ (plus:SWI (match_dup 1) (match_dup 2)))])]) +;; Likewise, but for the -Os special case of *mov_or. +(define_peephole2 + [(parallel [(set (match_operand:SWI 0 "register_operand") + (match_operand:SWI 2 "constm1_operand")) + (clobber (reg:CC FLAGS_REG))]) + (parallel [(set (match_dup 0) + (unspec_volatile:SWI + [(match_operand:SWI 1 "memory_operand") + (match_operand:SI 4 "const_int_operand")] + UNSPECV_XCHG)) + (set (match_dup 1) + (plus:SWI (match_dup 1) + (match_dup 0))) + (clobber (reg:CC FLAGS_REG))]) + (set (reg:CCZ FLAGS_REG) + (compare:CCZ (match_dup 0) + (match_operand:SWI 3 "const_int_operand")))] + "peep2_reg_dead_p (3, operands[0]) + && (unsigned HOST_WIDE_INT) INTVAL (operands[2]) + == -(unsigned HOST_WIDE_INT) INTVAL (operands[3]) + && !reg_overlap_mentioned_p (operands[0], operands[1])" + [(parallel [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (unspec_volatile:SWI [(match_dup 1) (match_dup 4)] + UNSPECV_XCHG) + (match_dup 3))) + (set (match_dup 1) + (plus:SWI (match_dup 1) + (match_dup 2)))])]) + (define_insn "*atomic_fetch_add_cmp" [(set (reg:CCZ FLAGS_REG) (compare:CCZ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 00616c895e1..b787d4a3436 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-04-28 Jakub Jelinek + + PR target/70821 + * gcc.target/i386/pr70821.c: New test. + 2016-04-28 Bill Seurer * gcc.target/powerpc/vec-adde.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/pr70821.c b/gcc/testsuite/gcc.target/i386/pr70821.c new file mode 100644 index 00000000000..3b5de2fb182 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70821.c @@ -0,0 +1,16 @@ +/* PR target/70821 */ +/* { dg-do compile } */ +/* { dg-options "-Os" } */ +/* { dg-additional-options "-march=i686" { target ia32 } } */ + +void bar (void); + +void +foo (int *p) +{ + if (__atomic_sub_fetch (p, 1, __ATOMIC_SEQ_CST)) + bar (); +} + +/* { dg-final { scan-assembler "lock;? dec" } } */ +/* { dg-final { scan-assembler-not "lock;? xadd" } } */ -- cgit v1.2.3