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2016-01-13Merge branches/gcc-5-branch rev 232321.Yvan Roux
Change-Id: I69778250351f56596e2aa93cbd9fe5ee12b54548
2015-12-15Merge branches/gcc-5-branch rev 231642.Yvan Roux
Change-Id: I58832e31b4e58588e1d0800c3fc09a01f91b6320
2015-11-16 gcc/Yvan Roux
Backport from trunk r222767. 2015-05-04 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.h (TARGET_SUPPORTS_WIDE_INT): New define. * config/i386/i386.c (ix86_legitimate_constant_p): Handle TImode as CONST_WIDE_INT, not CONST_DOUBLE. (ix86_cannot_force_const_mem): Handle CONST_WIDE_INT. (output_pic_addr_const): Do not handle VOIDmode CONST_DOUBLEs. (ix86_find_base_term): Do not check for CONST_DOUBLE. (ix86_print_operand): Do not handle non-FPmode CONST_DOUBLEs. (ix86_build_signbit_mask): Rewrite using wide ints. (ix86_split_to_parts) [HOST_BITS_PER_WIDE_INT < 64]: Remove. (ix86_rtx_costs): Handle CONST_WIDE_INT. (find_constant): Ditto. * config/i386/i386.md (bts, btr, btc peepholes): Rewrite using gen_int_mode. * config/i386/predicates.md (x86_64_immediate_operand) <case CONST_INT>: Remove HOST_BITS_PER_WIDE_INT == 32 code. (x86_64_zext_immediate_operand): Remove CONST_DOUBLE handling. <case CONST_INT>: Remove HOST_BITS_PER_WIDE_INT == 32 code. (const0_operand): Also match const_wide_int. (constm1_operand): Ditto. (const1_operand): Ditto. gcc/ Backport from trunk r226328. 2015-07-28 David Sherwood <david.sherwood@arm.com> * config/arm/arm.c (neon_element_bits, neon_valid_immediate): Call GET_MODE_INNER unconditionally. * config/spu/spu.c (arith_immediate_p): Likewise. * config/i386/i386.c (ix86_build_signbit_mask): Likewise. * expmed.c (synth_mult): Remove check for VOIDmode result from GET_MODE_INNER. (expand_mult_const): Likewise. * fold-const.c (fold_binary_loc): Replace call to element_precision with call to GET_MODE_PRECISION. * genmodes.c (emit_mode_inner_inline): Replace void_mode->name with m->name. (emit_mode_inner): Likewise. * lto-streamer-out.c (lto_write_mode_table): Update GET_MODE_INNER result check. * machmode.h (GET_MODE_UNIT_SIZE): Simplify. (GET_MODE_UNIT_PRECISION): Likewise. * rtlanal.c (subreg_get_info): Call GET_MODE_INNER unconditionally. * simplify-rtx.c (simplify_immed_subreg): Likewise. * stor-layout.c (bitwise_type_for_mode): Update assert. (element_precision): Remove. gcc/ Backport from trunk r226403. 2015-07-30 David Sherwood <david.sherwood@arm.com> * config/aarch64/aarch64-simd.md (aarch64_ext<mode>): Replace call to GET_MODE_SIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_SIZE (m). * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Likewise. * config/arm/arm.c (neon_valid_immediate): Likewise. * config/i386/i386.c (classify_argument, ix86_expand_int_vcond) (expand_vec_perm_blend, expand_vec_perm_pshufb): Likewise. (expand_vec_perm_pshufb2, expand_vec_perm_vpshufb2_vpermq): Likewise. (expand_vec_perm_vpshufb2_vpermq): Likewise. (expand_vec_perm_vpshufb2_vpermq_even_odd): Likewise. (expand_vec_perm_vpshufb4_vpermq2): Likewise. * config/i386/sse.md (<extract_type>_vinsert<shuffletype><extract_suf>_mask): Likewise. (*ssse3_palignr<mode>_perm): Likewise. * config/rs6000/rs6000.c (rs6000_complex_function_value): Likewise. * config/spu/spu.c (arith_immediate_p): Likewise. * simplify-rtx.c (simplify_const_unary_operation): Likewise. (simplify_binary_operation_1, simplify_ternary_operation): Likewise. gcc/ Backport from trunk r226936. 2015-08-17 David Sherwood <david.sherwood@arm.com> * config/arm/arm.c (neon_element_bits): Replace call to GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m). * config/arm/neon.md (neon_vget_lane<mode>): Likewise. (neon_vget_laneu<mode>, neon_vset_lane<mode>): Likewise (neon_vdup_lane<mode>): Likewise. * config/i386/i386.c (ix86_expand_int_vcond): Likewise. (ix86_expand_multi_arg_builtin, ix86_expand_reduc): Likewise. (expand_vec_perm_palignr, ix86_expand_sse2_abs): Likewise. * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise. * config/spu/spu.c (arith_immediate_p): Likewise. * expmed.c (store_bit_field_1, extract_bit_field_1): Likewise. * expr.c (expand_expr_real_2): Likewise. * optabs.c (shift_amt_for_vec_perm_mask): Likewise. * simplify-rtx.c (simplify_immed_subreg): Likewise. * tree-cfg.c (verify_gimple_assign_ternary): Likewise. * tree-vect-patterns.c (vect_recog_mixed_size_cond_pattern): Likewise. New variable. * fold-const.c (fold_binary_loc): Replace call to GET_MODE_PRECISION (GET_MODE_INNER (m)) with GET_MODE_UNIT_PRECISION (m). gcc/ Backport from trunk r227013. 2015-08-19 David Sherwood <david.sherwood@arm.com> * genmodes.c (emit_mode_unit_size_inline): New function. (emit_mode_unit_precision_inline): New function. (emit_insn_modes_h): Emit new #define. Emit new functions. (emit_mode_unit_size): New function. (emit_mode_unit_precision): New function. (emit_mode_adjustments): Add mode_unit_size adjustments. (emit_insn_modes_c): Emit new arrays. * machmode.h (GET_MODE_UNIT_SIZE, GET_MODE_UNIT_PRECISION): Update to use new inline methods. Change-Id: Ic5a8a96f8fc5e8adc144ca539430d7c4f463cf35
2015-11-12Merge branches/gcc-5-branch rev 230068.Yvan Roux
Change-Id: I95e1aeee6fd98bc5771de9c6c3c8e7fcfad72976
2015-10-06Merge branches/gcc-5-branch rev 228499.Yvan Roux
Change-Id: I4e83b66fdc6bceb6b3b5f23c426b96f1e5618d1c
2015-09-16Merge branches/gcc-5-branch rev 227732.linaro-local/gcc-5-integration-branch-newYvan Roux
Change-Id: I2f59904b28323b1c72a8cf1bd62c9e460d95bcea
2015-08-21 libitm/Yvan Roux
Backport from trunk r222325. 2015-04-22 Gregor Richards <gregor.richards@uwaterloo.ca> * config/arm/hwcap.cc: Use fcntl.h instead of sys/fcntl.h. * config/linux/x86/tls.h: Only use __GLIBC_PREREQ if defined. fixincludes/ Backport from trunk r222327. 2015-04-22 Gregor Richards <gregor.richards@uwaterloo.ca> * mkfixinc.sh: Add *-musl* with no fixes. libgcc/ Backport from trunk r222328. 2015-04-22 Gregor Richards <gregor.richards@uwaterloo.ca> Szabolcs Nagy <szabolcs.nagy@arm.com> * unwind-dw2-fde-dip.c (USE_PT_GNU_EH_FRAME): Define it on Linux if target provides dl_iterate_phdr. libgfortran/ Backport from trunk r222329. 2015-04-22 Szabolcs Nagy <szabolcs.nagy@arm.com> * acinclude.m4 (GTHREAD_USE_WEAK): Define as 0 for *-*-musl*. * configure: Regenerate. libstdc++-v3/ Backport from trunk r222329. 2015-04-22 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/os/generic/os_defines.h (_GLIBCXX_GTHREAD_USE_WEAK): Define. * configure.host (os_include_dir): Set to "os/generic" for linux-musl*. gcc/ Backport from trunk r222904. 2015-05-08 Gregor Richards <gregor.richards@uwaterloo.ca> Szabolcs Nagy <szabolcs.nagy@arm.com> * config.gcc (LIBC_MUSL): New tm_defines macro. * config/linux.h (OPTION_MUSL): Define. (MUSL_DYNAMIC_LINKER, MUSL_DYNAMIC_LINKER32,) (MUSL_DYNAMIC_LINKER64, MUSL_DYNAMIC_LINKERX32,) (INCLUDE_DEFAULTS_MUSL_GPP, INCLUDE_DEFAULTS_MUSL_LOCAL,) (INCLUDE_DEFAULTS_MUSL_PREFIX, INCLUDE_DEFAULTS_MUSL_CROSS,) (INCLUDE_DEFAULTS_MUSL_TOOL, INCLUDE_DEFAULTS_MUSL_NATIVE): Define. * config/linux.opt (mmusl): New option. * doc/invoke.texi (GNU/Linux Options): Document -mmusl. * configure.ac (gcc_cv_libc_provides_ssp): Add *-*-musl*. (gcc_cv_target_dl_iterate_phdr): Add *-linux-musl*. * configure: Regenerate. gcc/ Backport from trunk r222905. 2015-05-08 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/glibc-stdint.h (OPTION_MUSL): Define. (INT_FAST16_TYPE, INT_FAST32_TYPE, UINT_FAST16_TYPE, UINT_FAST32_TYPE): Change the definition based on OPTION_MUSL for 64 bit targets. * config/linux.h (OPTION_MUSL): Redefine. * config/alpha/linux.h (OPTION_MUSL): Redefine. * config/rs6000/linux.h (OPTION_MUSL): Redefine. * config/rs6000/linux64.h (OPTION_MUSL): Redefine. gcc/ Backport from trunk r222915. 2015-05-08 Gregor Richards <gregor.richards@uwaterloo.ca> Szabolcs Nagy <szabolcs.nagy@arm.com> * config/mips/linux.h (MUSL_DYNAMIC_LINKER32): Define. (MUSL_DYNAMIC_LINKER64, MUSL_DYNAMIC_LINKERN32): Define. (GNU_USER_DYNAMIC_LINKERN32): Update. gcc/ Backport from trunk r223749. 2015-05-27 Gregor Richards <gregor.richards@uwaterloo.ca> * config/arm/linux-eabi.h (MUSL_DYNAMIC_LINKER): Define. gcc/ Backport from trunk r223766. 2015-05-27 Gregor Richards <gregor.richards@uwaterloo.ca> Szabolcs Nagy <szabolcs.nagy@arm.com> * config/aarch64/aarch64-linux.h (MUSL_DYNAMIC_LINKER): Define. Change-Id: Ibd2cd24e55b9665feb90d6ccba3074f440bd3a41
2015-06-13Merge branches/gcc-5-branch rev 224205.Christophe Lyon
Change-Id: Ibc4e9bab43a09106d387810a3de14c6ab0d5904c
2015-04-24[gcc]meissner
2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> Backport from mainline 2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65849 * config/rs6000/rs6000.opt (-mvsx-align-128): Make options that save to independent variables use the Save attribute. This will allow these options to be modified with the #pragma/attribute target support. (-mallow-movmisalign): Likewise. (-mallow-df-permute): Likewise. (-msched-groups): Likewise. (-malways-hint): Likewise. (-malign-branch-targets): Likewise. (-mvectorize-builtins): Likewise. (-msave-toc-indirect): Likewise. * config/rs6000/rs6000.c (rs6000_opt_masks): Add more options that can be set via the #pragma/attribute target support. (rs6000_opt_vars): Likewise. (rs6000_inner_target_options): If VSX was set, also set -mno-avoid-indexed-addresses. [gcc/testsuite] 2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> Backport from mainline 2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65849 * gcc.target/powerpc/pr65849-1.c: New test to verify being able to set new options. * gcc.target/powerpc/pr65849-2.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222421 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-242015-04-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com>wschmidt
Backport from mainline r222385 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/altivec.md (*altivec_lvx_<mode>_internal): Remove asterisk from name so this can be generated directly. (*altivec_stvx_<mode>_internal): Likewise. * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Add assert that this is never called during or after reload/lra. (rs6000_frame_related): Remove split_reg argument and logic that references it. (emit_frame_save): Remove last parameter from call to rs6000_frame_related. (rs6000_emit_prologue): Remove last parameter from eight calls to rs6000_frame_related. Force generation of stvx instruction for Altivec register saves. Remove split_reg handling, which is no longer needed. (rs6000_emit_epilogue): Force generation of lvx instruction for Altivec register restores. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222411 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-24[gcc]wschmidt
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222362 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/crypto.md (crypto_vpmsum<CR_char>): Change TARGET_CRYPTO to TARGET_P8_VECTOR> (crypto_vpermxor_<mode>): Likewise. * config/rs6000/rs6000-builtin.def (BU_CRYPTO_2A): New #define. (BU_CRYPTO_3A): Likewise. (BU_CRYPTO_OVERLOAD_2A): Rename from BU_CRYPTO_OVERLOAD_2. (BU_CRYPTO_OVERLOAD_3A): New #define. (VPMSUMB): Change from BU_CRYPTO_2 to BU_CRYPTO_2A. (VPMSUMH): Likewise. (VPMSUMW): Likewise. (VPMSUMD): Likewise. (VPERMXOR_V2DI): Change from BU_CRYPTO_3 to BU_CRYPTO_3A. (VPERMXOR_V4SI): Likewise. (VPERMXOR_V8HI): Likewise. (VPERMXOR_V16QI): Likewise. (VPMSUM): Change from BU_CRYPTO_OVERLOAD_2 to BU_CRYPTO_OVERLOAD_2A. (VPERMXOR): Change from BU_CRYPTO_OVERLOAD3 to BU_CRYPTO_OVERLOAD_3A. * config/rs6000/rs6000.opt (mcrypto): Change description of option. Backport from mainline r222362 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000.opt (mcrypto): Change option description to match category changes in ISA 2.07B. [gcc/testsuite] 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222362 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/crypto-builtin-2.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222397 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-24[gcc]wschmidt
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222351 2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary adjustments. (insn_is_swappable_p): Return 1 for a convert from double to single precision when all of its uses are splats of BE element zero. [gcc/testsuite] 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222351 2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/swaps-p8-18.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222394 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-23[gcc]wschmidt
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222349 2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/65456 * config/rs6000/rs6000.c (rs6000_option_override_internal): For VSX + POWER8, enable TARGET_ALLOW_MOVMISALIGN and TARGET_EFFICIENT_UNALIGNED_VSX if not selected by command line option. (rs6000_builtin_mask_for_load): Return 0 for targets with efficient unaligned VSX accesses so that the vectorizer will use direct unaligned loads. (rs6000_builtin_support_vector_misalignment): Always return true for targets with efficient unaligned VSX accesses. (rs6000_builtin_vectorization_cost): Cost of unaligned loads and stores on targets with efficient unaligned VSX accesses is almost always the same as the cost of an aligned load or store, so model it that way. * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Return 0 for unaligned vectors if we have efficient unaligned VSX accesses. * config/rs6000/rs6000.opt (mefficient-unaligned-vector): New undocumented option. [gcc/testsuite] 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r222349 2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/65456 * gcc.dg/vect/bb-slp-24.c: Exclude test for POWER8. * gcc.dg/vect/bb-slp-25.c: Likewise. * gcc.dg/vect/bb-slp-29.c: Likewise. * gcc.dg/vect/bb-slp-32.c: Replace vect_no_align with vect_no_align && { ! vect_hw_misalign }. * gcc.dg/vect/bb-slp-9.c: Likewise. * gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c: Exclude test for vect_hw_misalign. * gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c: Likewise. * gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c: Adjust tests to account for POWER8, where peeling for alignment is not needed. * gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c: Replace vect_no_align with vect_no_align && { ! vect_hw_misalign }. * gcc.dg.vect.if-cvt-stores-vect-ifcvt-18.c: Likewise. * gcc.dg/vect/no-scevccp-outer-6-global.c: Likewise. * gcc.dg/vect/no-scevccp-outer-6.c: Likewise. * gcc.dg/vect/no-vfa-vect-43.c: Likewise. * gcc.dg/vect/no-vfa-vect-57.c: Likewise. * gcc.dg/vect/no-vfa-vect-61.c: Likewise. * gcc.dg/vect/no-vfa-vect-depend-1.c: Likewise. * gcc.dg/vect/no-vfa-vect-depend-2.c: Likewise. * gcc.dg/vect/no-vfa-vect-depend-3.c: Likewise. * gcc.dg/vect/pr16105.c: Likewise. * gcc.dg/vect/pr20122.c: Likewise. * gcc.dg/vect/pr33804.c: Likewise. * gcc.dg/vect/pr33953.c: Likewise. * gcc.dg/vect/pr56787.c: Likewise. * gcc.dg/vect/pr58508.c: Likewise. * gcc.dg/vect/slp-25.c: Likewise. * gcc.dg/vect/vect-105-bit-array.c: Likewise. * gcc.dg/vect/vect-105.c: Likewise. * gcc.dg/vect/vect-27.c: Likewise. * gcc.dg/vect/vect-29.c: Likewise. * gcc.dg/vect/vect-33.c: Exclude unaligned access test for POWER8. * gcc.dg/vect/vect-42.c: Replace vect_no_align with vect_no_align && { ! vect_hw_misalign }. * gcc.dg/vect/vect-44.c: Likewise. * gcc.dg/vect/vect-48.c: Likewise. * gcc.dg/vect/vect-50.c: Likewise. * gcc.dg/vect/vect-52.c: Likewise. * gcc.dg/vect/vect-56.c: Likewise. * gcc.dg/vect/vect-60.c: Likewise. * gcc.dg/vect/vect-72.c: Likewise. * gcc.dg/vect/vect-75-big-array.c: Likewise. * gcc.dg/vect/vect-75.c: Likewise. * gcc.dg/vect/vect-77-alignchecks.c: Likewise. * gcc.dg/vect/vect-77-global.c: Likewise. * gcc.dg/vect/vect-78-alignchecks.c: Likewise. * gcc.dg/vect/vect-78-global.c: Likewise. * gcc.dg/vect/vect-93.c: Likewise. * gcc.dg/vect/vect-95.c: Likewise. * gcc.dg/vect/vect-96.c: Likewise. * gcc.dg/vect/vect-cond-1.c: Likewise. * gcc.dg/vect/vect-cond-3.c: Likewise. * gcc.dg/vect/vect-cond-4.c: Likewise. * gcc.dg/vect/vect-cselim-1.c: Likewise. * gcc.dg/vect/vect-multitypes-1.c: Likewise. * gcc.dg/vect/vect-multitypes-3.c: Likewise. * gcc.dg/vect/vect-multitypes-4.c: Likewise. * gcc.dg/vect/vect-multitypes-6.c: Likewise. * gcc.dg/vect/vect-nest-cycle-1.c: Likewise. * gcc.dg/vect/vect-nest-cycle-2.c: Likewise. * gcc.dg/vect/vect-outer-3a-big-array.c: Likewise. * gcc.dg/vect/vect-outer-3a.c: Likewise. * gcc.dg/vect/vect-outer-5.c: Likewise. * gcc.dg/vect/vect-outer-fir-big-array.c: Likewise. * gcc.dg/vect/vect-outer-fir-lb-big-array.c: Likewise. * gcc.dg/vect/vect-outer-fir-lb.c: Likewise. * gcc.dg/vect/vect-outer-fir.c: Likewise. * gcc.dg/vect/vect-peel-3.c: Likewise. * gcc.dg/vect/vect-peel-4.c: Likewise. * gcc.dg/vect/vect-pre-interact.c: Likewise. * gcc.target/powerpc/pr65456.c: New test. * gcc.target/powerpc/vsx-vectorize-2.c: Exclude test for POWER8. * gcc.target/powerpc/vsx-vectorize-4.c: Likewise. * gcc.target/powerpc/vsx-vectorize-6.c: Likewise. * gcc.target/powerpc/vsx-vectorize-7.c: Likewise. * gfortran.dg/vect/vect-2.f90: Replace vect_no_align with vect_no_align && { ! vect_hw_misalign }. * gfortran.dg/vect/vect-3.f90: Likewise. * gfortran.dg/vect/vect-4.f90: Likewise. * gfortran.dg/vect/vect-5.f90: Likewise. * lib/target-supports.exp (check_effective_target_vect_no_align): Return 1 for POWER8. (check_effective_target_vect_hw_misalign): Return 1 for POWER8. Backport from mainline r222372 2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c: Replace vect_no_align with vect_no_align && { ! vect_hw_misalign }. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222386 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-172015-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>wschmidt
PR target/65787 * config/rs6000/rs6000.c (rtx_is_swappable_p): Remove previous fix; ensure that a subsequent SH_NONE operand does not overwrite an existing *special value. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222198 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-17[gcc]wschmidt
2015-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/65787 * config/rs6000/rs6000.c (rtx_is_swappable_p): Handle case where vec_extract operation is wrapped in a PARALLEL with a CLOBBER. (adjust_extract): Likewise. [gcc/testsuite] 2015-04-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/65787 * gcc.target/powerpc/pr65787.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@222182 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-07[gcc]meissner
2015-04-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65614 * config/rs6000/rs6000.c (struct processor_costs): Add cost field for SF->DF conversions to make FLOAT_EXTEND more expensive, so that LFD is used to load double constants instead of LFS. Add defaults for all costs structures. Add comments for missing initialization fields. (size32_cost): Likewise. (size64_cost): Likewise. (rs64a_cost): Likewise. (mpccore_cost): Likewise. (ppc403_cost): Likewise. (ppc405_cost): Likewise. (ppc440_cost): Likewise. (ppc476_cost): Likewise. (ppc601_cost): Likewise. (ppc603_cost): Likewise. (ppc604_cost): Likewise. (ppc604e_cost): Likewise. (ppc620_cost): Likewise. (ppc630_cost): Likewise. (ppccell_cost): Likewise. (ppc750_cost): Likewise. (ppc7450_cost): Likewise. (ppc8540_cost): Likewise. (ppce300c2c3_cost): Likewise. (ppce500mc_cost): Likewise. (ppce500mc64_cost): Likewise. (ppce5500_cost): Likewise. (ppce6500_cost): Likewise. (titan_cost): Likewise. (power4_cost): Likewise. (power6_cost): Likewise. (power7_cost): Likewise. (power8_cost): Likewise. (ppca2_cost): Likewise. (rs6000_rtx_costs): Make FLOAT_EXTEND use SFDF_convert field. * config/rs6000/rs6000.md (extendsfdf2_fpr): Generate XSCPSGNDP instead of XXLOR to copy SFmode to clear out dirty bits created when SFmode denormals are generated. (mov<mode>_hardfloat, FMOVE32 case): Likewise. (truncdfsf2_fpr): Add support for ISA 2.07 XSRSP instruction. [gcc/testsuite] 2015-04-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65614 * gcc.target/powerpc/compress-float-ppc-pic.c: Run test on power5 to get floating point compression. * gcc.target/powerpc/compress-foat-ppc.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221888 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-03 PR target/65576amodra
PR target/65240 * config/rs6000/predicates.md (zero_reg_mem_operand): Exclude 0.0 constant unless TARGET_VSX. * config/rs6000/rs6000.md (extenddftf2_internal): Remove last alternative. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221862 138bc75d-0d04-0410-961f-82ee72b054a4
2015-04-02 PR preprocessor/61977jakub
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Don't predefine __vector/__bool/__pixel macros nor context sensitive macros for CLK_ASM. * config/spu/spu-c.c (spu_cpu_cpp_builtins): Similarly. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221838 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-262015-03-25 Michael Meissner <meissner@linux.vnet.ibm.com>meissner
PR target/65569 * config/rs6000/rs6000.md (extenddftf2_fprs): On VSX systems use XXLXOR to create 0.0. On pre-VSX systems make sure the constant 0.0 is correctly setup. (extenddftf2_internal): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221683 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-19[gcc]meissner
2015-03-19 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65240 * config/rs6000/predicates.md (easy_fp_constant): Remove special -ffast-math handling that kept non-0 constants live in the RTL until reload. Remove logic testing the number of instructions it took to create a constant in a GPR that was never used, due to a test for soft-float earlier. (memory_fp_constant): Delete, no longer used. * config/rs6000/rs6000.md (mov<MODE>_hardfloat): Remove alternatives for loading non-0 constants into GPRs for hard floating point that is no longer needed due to changes in easy_fp_constant. Add support for loading 0.0 into GPRs. (mov<mode>_hardfloat32): Likewise. (mov<mode>_hardfloat64): Likewise. (mov<mode>_64bit_dm): Likewise. (movtd_64bit_nodm): Likewise. (pre-reload move FP constant define_split): Delete define_split, since it is no longer used. (extenddftf2_internal): Remove GHF constraints that are not valid for extenddftf2. [gcc/testsuite] 2015-03-19 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65240 * gcc/testsuite/g++.dg/pr65240.h: Add tests for PR 65240. * gcc/testsuite/g++.dg/pr65240-1.C: Likewise. * gcc/testsuite/g++.dg/pr65240-2.C: Likewise. * gcc/testsuite/g++.dg/pr65240-3.C: Likewise. * gcc/testsuite/g++.dg/pr65240-4.C: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221524 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-16 PR target/63150amodra
gcc/ * config/rs6000/rs6000.md (bswapdi2): Remove one scratch reg. Modify Z->r bswapdi splitter to use dest in place of scratch. In r->Z and Z->r bswapdi splitter rename word_high, word_low to word1, word2 and rearrange logic to suit. (bswapdi2_64bit): Remove early clobber on Z->r alternative. (bswapdi2_ldbrx): Likewise. Remove '??' on r->r. (bswapdi2_32bit): Remove early clobber on Z->r alternative. Add one '?' on r->r. Modify Z->r splitter to avoid need for early clobber. gcc/testsuite/ * gcc.target/powerpc/pr53199.c: Add extra functions. Revert 2014-12-05 change. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221445 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-11[gcc]meissner
2015-03-09 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65242 * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Do not allow reloads of PLUS in floating point/VSX registers. [gcc/testsuite] 2015-03-09 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/65242 * g++.dg/pr65242.C: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221350 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-10 PR target/65286jakub
* config/rs6000/t-linux: For powerpc64* target set MULTILIB_OSDIRNAMES instead of MULTIARCH_DIRNAME. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221322 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-09 PR target/65286amodra
* config.gcc (powerpc*-*-linux*): Arrange for powerpc64le-linux to be single-arch by default. Set cpu_is_64bit for powerpc64 given --with-cpu=native. * config/rs6000/t-fprules: Do not set default MULTILIB vars. * config/rs6000/t-linux (MULTIARCH_DIRNAME): Support powerpc64 and powerpc64le. * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Test rs6000_isa_flags rather than TARGET_64BIT. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221288 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-042015-03-04 Andreas Tobler <andreast@gcc.gnu.org>andreast
* config/rs6000/t-freebsd64: Remove 32-bit soft-float multilibs. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221197 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-032015-03-03 Michael Meissner <meissner@linux.vnet.ibm.com>meissner
PR 65138/target * config/rs6000/rs6000-tables.opt: Regenerate table. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221155 138bc75d-0d04-0410-961f-82ee72b054a4
2015-03-032015-03-02 Michael Meissner <meissner@linux.vnet.ibm.com>meissner
PR 65138/target * config/rs6000/rs6000-cpus.def (powerpc64le): Add new generic processor type for 64-bit little endian PowerPC. * config/rs6000/rs6000.c (rs6000_option_override_internal): If -mdebug=reg, print TARGET_DEFAULT. Fix logic to use TARGET_DEFAULT if there is no default cpu. Fix -mdebug=reg printing built-in mask so it does not pass NULL pointers. * doc/invoke.texi (IBM RS/6000 and PowerPC options): Document -mcpu=powerpc64le. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221132 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-262015-02-26 Bill Schmidt <wschmidt@linux.vnet.ibm.com>wschmidt
PR target/65171 * config/rs6000/rs6000.c (rs6000_analyze_swaps): Ensure instructions with TImode operands are included in the analysis. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221022 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-25gcc/bergner
* config/rs6000/htm.md (tcheck): Fix assembly encoding. gcc/testsuite/ * gcc.target/powerpc/htm-builtin-1.c: Fix tcheck expect value. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220992 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-24PR target/65058: Drop unused variable.haubi
PR target/65058 * config/rs6000/xcoff.h (ASM_OUTPUT_EXTERNAL): Drop unused variable. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220947 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-24 PR target/65182amodra
* config/rs6000/rs6000.c (get_memref_parts): Only return true when *base is a reg. Handle nested plus addresses. Simplify pre_modify test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220924 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-162015-02-16 Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com>dje
David Edelsohn <dje.gcc@gmail.com> PR target/65058 * config/rs6000/rs6000.c (rs6000_output_symbol_ref): Append storage mapping class to external variable or function reference. * config/rs6000/xcoff.h (ASM_OUTPUT_EXTERNAL): Do not append storage mapping class. 2015-02-16 David Eelsohn <dje.gcc@gmail.com> PR target/53348 * config/rs6000/rs6000.c (rs6000_declare_alias): Only use ASM_WEAKEN_DECL if defined. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220737 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-13 * config/rs6000/rs6000.c (rs6000_emit_epilogue): Fix typo inamodra
code setting up r11 for out-of-line fp restore. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220672 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-12 * config/rs6000/rs6000.c (rs6000_emit_epilogue): Use addsi3_carryamodra
or adddi3_carry when restoring frame_reg_rtx from r0 after restvr. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220665 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-06[gcc]meissner
2015-02-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/64205 * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Do not add a general secondary reload handler for SDmode, unless we have both read/write support for SDmode. [gcc/testsuite] 2015-02-06 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/64205 * gcc.target/powerpc/pr64205.c: New file. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220485 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-05 PR target/64876amodra
* config/rs6000/rs6000.c (chain_already_loaded): New function. (rs6000_call_aix): Use it. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220463 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-04include/jakub
* dwarf2.h (enum dwarf_source_language): Add DW_LANG_Fortran03 and DW_LANG_Fortran08. gcc/ * dwarf2out.c (is_fortran): Also return true for DW_LANG_Fortran03 or DW_LANG_Fortran08. (lower_bound_default): Return 1 for DW_LANG_Fortran03 or DW_LANG_Fortran08. (gen_compile_unit_die): Handle "GNU Fortran2003" and "GNU Fortran2008" language strings. * dbxout.c (get_lang_number): Use lang_GNU_Fortran. * langhooks.h (lang_GNU_Fortran): New prototype. * langhooks.c (lang_GNU_Fortran): New function. * config/rs6000/rs6000.c (rs6000_output_function_epilogue): Use lang_GNU_Fortran. gcc/fortran/ * options.c: Include langhooks.h. (gfc_post_options): Change lang_hooks.name based on selected -std= mode. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220422 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-02gcc/amodra
* config/rs6000/rs6000.c (rs6000_call_aix): Use unspec rather than mem for toc_restore. * config/rs6000/rs6000.md (UNSPEC_TOCSLOT): Define. (call_indirect_aix, call_value_indirect_aix): Adjust to suit. (call_indirect_elfv2, call_value_indirect_elfv2): Likewise. gcc/testsuite/ * gcc.target/powerpc/cprophard.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220344 138bc75d-0d04-0410-961f-82ee72b054a4
2015-02-02 PR target/64047dje
* config/rs6000/rs6000.c (rs6000_set_current_function): Handle explicit default options. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220340 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-30Always pass explicit location to fatal_error.jsm28
The patch <https://gcc.gnu.org/ml/gcc-patches/2014-11/msg00698.html> adding an overload for fatal_error that passes an explicit location broke gcc.pot regeneration because xgettext cannot handle function overloads with the diagnostic string argument in different positions. As the desired direction is for all diagnostics to have explicit locations, this patch addresses the regression by removing the version of fatal_error that does not pass a location, passing explicit input_location everywhere (in the hope that those will incrementally be changed to other locations, much as with the addition of a location argument to pedwarn some time ago - a lot of cases aren't meaningfully associated with a source file so UNKNOWN_LOCATION may be better). Note that this patch does not attempt to fix any existing issues with these diagnostics (such as wrongly starting with capital letters or ending with '.' or '\n'); it just adds the input_location argument. Bootstrapped with no regressions for x86_64-unknown-linux-gnu (Go excluded). gcc: * diagnostic.c (fatal_error (const char *, ...)): Remove function. * diagnostic-core.h (fatal_error (const char *, ...)): Remove prototype. * toplev.h (init_asm_output): Update comment on use of UNKNOWN_LOCATION with fatal_error. * cgraph.c, collect-utils.c, collect2.c, config/arc/arc.c, config/arc/arc.md, config/avr/avr.c, config/c6x/c6x.h, config/darwin.c, config/host-darwin.c, config/i386/host-cygwin.c, config/i386/intelmic-mkoffload.c, config/nios2/nios2.c, config/nvptx/mkoffload.c, config/nvptx/nvptx.h, config/rs6000/host-darwin.c, config/rs6000/rs6000.c, config/s390/s390.c, gcc.c, gcov-io.h, gcov-tool.c, ggc-common.c, ggc-page.c, graph.c, ipa-inline-analysis.c, ipa-reference.c, lto-cgraph.c, lto-section-in.c, lto-streamer-in.c, lto-streamer.c, lto-wrapper.c, objc/objc-act.c, opts.c, passes.c, plugin.c, tlink.c, toplev.c, tree-streamer-in.c, varpool.c: All callers of fatal_error changed to pass input_location as first argument. gcc/c-family: * c-opts.c, c-pch.c, cppspec.c: All callers of fatal_error changed to pass input_location as first argument. gcc/cp: * class.c, except.c, parser.c, pt.c: All callers of fatal_error changed to pass input_location as first argument. gcc/fortran: * f95-lang.c, gfortranspec.c, trans-const.c, trans-expr.c: All callers of fatal_error changed to pass input_location as first argument. gcc/java: * class.c, expr.c, jcf-parse.c, jvspec.c: All callers of fatal_error changed to pass input_location as first argument. gcc/lto: * lto-object.c, lto-symtab.c, lto.c: All callers of fatal_error changed to pass input_location as first argument. libcc1: * plugin.cc: All callers of fatal_error changed to pass input_location as first argument. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220293 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-30 PR target/64580segher
* config.rs6000/rs6000.c (compute_vrsave_mask): Reverse loop order. (rs6000_stack_info): Add assert. (rs6000_output_savres_externs): New function, split off from... (rs6000_output_function_prologue): ... here. Do not call it for thunks. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220272 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-26 * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Addjakub
OPTION_MASK_QUAD_MEMORY_ATOMIC. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220120 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-23rs6000, jit: Unbreak libgccjit on ppc (rs6000_output_function_epilogue)dmalcolm
gcc/ChangeLog * config/rs6000/rs6000.c (rs6000_output_function_epilogue): Support the JIT by using 0 as the language type. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220065 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-22 * config/rs6000/rs6000.c (rs6000_file_start): Use rs6000_isa_flagsdje
not TARGET_DEFAULT. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219977 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-19 * config/rs6000/default64.h: Include rs6000-cpus.def.dje
(TARGET_DEFAULT) [LITTLE_ENDIAN]: Use ISA 2.7 (POWER8). (TARGET_DEFAULT) [BIG_ENDIAN]: Use POWER4. * config/rs6000/driver-rs6000.c (detect_processor_aix): Add POWER7 and POWER8. * config/rs6000/linux64.h (PROCESSOR_DEFAULT64): Always default to POWER8. * config/rs6000/rs6000.c (rs6000_file_start): Emit .machine pseudo-op to specify assembler dialect. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219854 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-17 * config/rs6000/rs6000.md (probe_stack): Delete.segher
(probe_stack_address): New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219806 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-17 * config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Use TARGET_32BITsegher
to test for 32-bit ABIs, not !TARGET_POWERPC64. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219805 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-17 * config/rs6000/rs6000.c (rs6000_parallel_return): New function.segher
(rs6000_function_value): Use it. Handle SCmode and TCmode as well, for TARGET_32BIT && TARGET_POWERPC64. Fix another BITS_PER_WORD snafu. (rs6000_libcall_value): Use the new function. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219804 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-16 * config/rs6000/rs6000.c (rs6000_scalar_mode_supported_p): Disallowsegher
TImode for TARGET_32BIT. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219754 138bc75d-0d04-0410-961f-82ee72b054a4
2015-01-16 * config/rs6000/rs6000.c (TARGET_LIBGCC_CMP_RETURN_MODE,segher
TARGET_LIBGCC_SHIFT_COUNT_MODE, TARGET_UNWIND_WORD_MODE): Implement as ... (rs6000_abi_word_mode): New function. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219753 138bc75d-0d04-0410-961f-82ee72b054a4
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