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path: root/gcc/config/i386/i386-expand.c
AgeCommit message (Expand)Author
2021-09-13Merged current trunk to branch.Thomas Koenig
2020-12-29i386: Rounding functions TLCUros Bizjak
2020-12-28i386: Fix __builtin_rint with FE_DOWNWARD rounding direction [PR96793]Uros Bizjak
2020-12-28i386: Use existing temporary register in rounding functionsUros Bizjak
2020-12-23i386: Fix __builtin_trunc with FE_DOWNWARD rounding direction [PR96793]Uros Bizjak
2020-12-22i386: Fix __builtin_floor with FE_DOWNWARD rounding direction [PR96793]Uros Bizjak
2020-12-03Fix incorrect replacement of vmovdqu32 with vpblendd which can cause fault.liuhongt
2020-12-01x86_64: Fix up -fpic -mcmodel=large -fno-plt [PR98063]Jakub Jelinek
2020-11-26i386: Cleanup argument handling in ix86_expand_*_builtin functions.Uros Bizjak
2020-11-26Delete dead code in ix86_expand_special_args_builtinliuhongt
2020-11-17Support variable index vec_set.liuhongt
2020-11-16Improve code generation for x86_64 [PR 92180]Roger Sayle
2020-11-11Support Intel AVX VNNIliuhongt
2020-11-03x86: Fix comment in ix86_expand_builtinUros Bizjak
2020-11-02x86: Also require MMX for __builtin_ia32_maskmovqH.J. Lu
2020-10-29Enable GCC to support Intel Key Locker ISAliuhongt
2020-10-26x86: Inline strncmp only with -minline-all-stringopsH.J. Lu
2020-10-26x86: Add cmpmemsi for -minline-all-stringopsH.J. Lu
2020-10-22Refactor implementation of *_bcst{_1,_2,_3} patterns.liuhongt
2020-10-21Simplify trivial VEC_COND_EXPR in expander.liuhongt
2020-10-15Enable Intel HRESET InstructionHongyu Wang
2020-10-15Enable gcc support for UINTRliuhongt
2020-10-14x86: Add missing intrinsics [PR95483]Sunil K Pandey
2020-08-28Add expander for movp2hi and movp2qi.liuhongt
2020-08-22Using gen_int_mode instead of GEN_INT to avoid ICE caused by type promotion.liuhongt
2020-08-19i386: Use code_for_ instead of gen_ for parameterized names more.Uros Bizjak
2020-08-18Don't use pinsr/pextr for struct initialization/extraction.liuhongt
2020-08-17i386: Use parametrized pattern names some more.Uros Bizjak
2020-08-14i386: Improve LWP builtin expanders.Uros Bizjak
2020-08-13i386: Improve CET builtin expanders.Uros Bizjak
2020-08-10i386: Improve code generation of smin(x,0) with -m32.Roger Sayle
2020-08-10Using UNSPEC for vector compare to mask register.liuhongt
2020-07-10x86: Check TARGET_AVX512VL when enabling FMAH.J. Lu
2020-07-09x86: Enable FMA in rsqrt<mode>2 expanderH.J. Lu
2020-06-18i386: Fix mode of ZERO_EXTRACT RTXes, remove ext_register_operand predicate.Uros Bizjak
2020-06-17Optimize V16QI/V32QI/V64QI shift by constant.liuhongt
2020-06-15Optimize multiplication for V8QI,V16QI,V32QI under TARGET_AVX512BW.liuhongt
2020-05-28Fix nonconforming memory_operand for vpmovq{d,w,b}/vpmovd{w,b}/vpmovwb.liuhongt
2020-05-27i386: Implement V2SF shufflesUros Bizjak
2020-05-26i386: Implement V2SI and V4HI shufflesUros Bizjak
2020-05-18i386: Avoid reversing a non-trapping comparison to a trapping one [PR95169]Uros Bizjak
2020-05-18i386: Improve vector mode and TFmode ABS and NEG patternsUros Bizjak
2020-05-03i386: Use plus_constant instead of gen_rtx_PLUSUros Bizjak
2020-04-07i386: Fix V{64QI,32HI}mode constant permutations [PR94509]Jakub Jelinek
2020-04-07i386: Fix emit_reduc_half on V{64Q,32H}Imode [PR94500]Jakub Jelinek
2020-04-03i386: Fix up handling of OPTION_MASK_ISA_MMX builtins [PR94461]Jakub Jelinek
2020-01-03re PR target/93089 (Force mprefer-vector-width=512 in 'e' simd clones)Jakub Jelinek
2020-01-01Update copyright years.Jakub Jelinek
2019-12-11Fix unrecognizable insn of pr92865.Hongtao Liu
2019-12-09Enable mask movement for VCOND_EXPR under avx512f forHongtao Liu
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