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2017-09-14 gcc/linaro-local/snapshots/linaro-7.2-2017.09TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-09-14Make Linaro GCC Snapshot 7.2-2017.09.linaro-snapshot-7.2-2017.09TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-09-13Merge branches/gcc-7-branch rev 252337.Yvan Roux
Change-Id: Iea4913cc1bf65480f6d85f4cc97252e9e59c3631
2017-09-13 gcc/Yvan Roux
Backport from trunk r250672. 2017-07-28 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_simd_container_mode): Add prototype. (aarch64_expand_mov_immediate): Add HI support. (aarch64_reinterpret_float_as_int, aarch64_float_const_rtx_p: New. (aarch64_can_const_movi_rtx_p): New. (aarch64_preferred_reload_class): Remove restrictions of using FP registers for certain SIMD operations. (aarch64_rtx_costs): Added new cost for CONST_DOUBLE moves. (aarch64_valid_floating_const): Add integer move validation. (aarch64_simd_imm_scalar_p): Remove. (aarch64_output_scalar_simd_mov_immediate): Generalize function. (aarch64_legitimate_constant_p): Expand list of supported cases. * config/aarch64/aarch64-protos.h (aarch64_float_const_rtx_p, aarch64_can_const_movi_rtx_p): New. (aarch64_reinterpret_float_as_int): New. (aarch64_simd_imm_scalar_p): Remove. * config/aarch64/constraints.md (Uvi): New. (Dd): Split into Ds and new Dd. * config/aarch64/aarch64.md (*movsi_aarch64): Add SIMD mov case. (*movdi_aarch64): Add SIMD mov case. gcc/ Backport from trunk r250673. 2017-07-28 Tamar Christina <tamar.christina@arm.com> Richard Sandiford <richard.sandiford@linaro.org> * config/aarch64/aarch64.md (mov<mode>): Generalize. (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64): Add integer and movi cases. (movi-split-hf-df-sf split, fp16): New. (enabled): Added TARGET_FP_F16INST. * config/aarch64/iterators.md (GPF_HF): New. * config/aarch64/predicates.md (aarch64_reg_or_fp_float): New. gcc/testsuite/ Backport from trunk r250674. 2017-07-28 Tamar Christina <tamar.christina@arm.com> Bilyan Borisov <bilyan.borisov@arm.com> * gcc.target/aarch64/dbl_mov_immediate_1.c: New. * gcc.target/aarch64/flt_mov_immediate_1.c: New. * gcc.target/aarch64/f16_mov_immediate_1.c: New. * gcc.target/aarch64/f16_mov_immediate_2.c: New. * gcc.target/aarch64/pr63304_1.c: Changed to double. gcc/ Backport from trunk r250680. 2017-07-28 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_internal_mov_immediate): Add new special pattern. * config/aarch64/aarch64.md (*movdi_aarch64): Add reg/32bit const mov case. gcc/testsuite/ Backport from trunk r250680. 2017-07-28 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/int_mov_immediate_1.c: New. gcc/ Backport from trunk r250766. 2017-08-01 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_can_const_movi_rtx_p): Move 0 check. gcc/ Backport from trunk r250818. 2017-08-02 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int): Correct endianness. gcc/ Backport from trunk r251051. 2017-08-11 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.md (mov<mode>): Change. (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64): aarch64_reg_or_fp_float into aarch64_reg_or_fp_zero. * config/aarch64/predicates.md (aarch64_reg_or_fp_float): Removed. gcc/testsuite/ Backport from trunk r251086. 2017-08-14 Szabolcs Nagy <szabolcs.nagy@arm.com> * gcc.target/aarch64/dbl_mov_immediate_1.c: Add -mno-pc-relative-literal-loads. Change-Id: Ie7203aca0b4c436af3d4625e79b296ab8212040c
2017-09-13 gcc/Yvan Roux
Backport from trunk r250475. 2017-07-24 Jackson Woodruff <jackson.woodruff@arm.com> * config/aarch64/aarch64-simd.md (aarch64_mla_elt_merge<mode>): New. (aarch64_mls_elt_merge<mode>): Likewise. gcc/testsuite/ Backport from trunk r250475. 2017-07-24 Jackson Woodruff <jackson.woodruff@arm.com> * gcc.target/aarch64/simd/vmla_elem_1.c: New. Change-Id: I575353ccc23877151d71cb971a4cc602af6b5c6d
2017-09-13 gcc/Yvan Roux
Backport from trunk r251663. 2017-09-04 Bernd Edlinger <bernd.edlinger@hotmail.de> PR target/77308 * config/arm/arm.md (*arm_adddi3, *arm_subdi3): Split early except for TARGET_NEON and TARGET_IWMMXT. (anddi3, iordi3, xordi3, one_cmpldi2): Split while expanding except for TARGET_NEON and TARGET_IWMMXT. (*one_cmpldi2_insn): Moved the body of one_cmpldi2 here. gcc/testsuite/ Backport from trunk r251663. 2017-09-04 Bernd Edlinger <bernd.edlinger@hotmail.de> PR target/77308 * gcc.target/arm/pr77308-1.c: New test. gcc/ Backport from trunk r251681. 2017-09-04 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/arm.c (arm_legitimate_index_p): Add comment. (thumb2_legitimate_index_p): Use correct range for DI/DF mode. gcc/ Backport from trunk r251752. 2017-09-06 Bernd Edlinger <bernd.edlinger@hotmail.de> PR target/77308 * config/arm/predicates.md (arm_general_adddi_operand): Create new non-vfp predicate. * config/arm/arm.md (*arm_adddi3, *arm_subdi3): Use new predicates. Change-Id: Ib303993655c3d1209567eb93bd2c4d157de44721
2017-09-13 gcc/Yvan Roux
Backport from trunk r250631. 2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com> Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64.md (define_split for and<mode>3nr_compare): Move non aarch64_logical_operand to a register. (define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non register immediate operand to a register. * config/aarch64/predicates.md (aarch64_mov_imm_operand): New. gcc/testsuite/ Backport from trunk r250631. 2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com> Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/tst_imm_split_1.c: New Test. Change-Id: I73eb5a81dc9587fcaf9e909594f3a3754e6cd4a6
2017-09-13 gcc/Yvan Roux
Backport from trunk r250597. 2017-07-26 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64.c (thunderx_vector_cost): Decrease cost of vec_unalign_load_cost and vec_unalign_store_cost. Change-Id: Ic98e4a29a964465b5950a4b498f8d3ce8a590f5c
2017-09-13 gcc/Yvan Roux
Backport from trunk r250592. 2017-07-26 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64.c (thunderx_vector_cost): Fix vec_fp_stmt_cost. Change-Id: I962630726547665e330a375304a941f0367f7964
2017-09-13 libstdc++-v3/Yvan Roux
Backport from trunk r250464. 2017-07-23 Michael Collison <michael.collison@arm.com> Add optimized implementation of mersenne twister for aarch64 * config/cpu/aarch64/opt/ext/opt_random.h: New file. (__arch64_recursion): New function. (__aarch64_lsr_128): New function. (__aarch64_lsl_128): New function. (operator==): New function. (simd_fast_mersenne_twister_engine): Implement method _M_gen_rand. * config/cpu/aarch64/opt/bits/opt_random.h: New file. * include/ext/random: (simd_fast_mersenne_twister_engine): add _M_state private array. Change-Id: Ia738a158ca1cb8a2520025097bae2c5ce3f58ee3
2017-09-13 gcc/Yvan Roux
Backport from trunk r250444. 2017-07-21 Jim Wilson <jim.wilson@linaro.org> * config/aarch64/aarch64-cores.def (falkor): Add AARCH64_FL_RDMA. (qdf24xx): Likewise. * config/aarch64/aarch64-options-extensions.def (rdma); New. * config/aarch64/aarch64.h (AARCH64_FL_RDMA): New. (AARCH64_FL_V8_1): Renumber. (AARCH64_FL_FOR_ARCH8_1): Add AARCH64_FL_RDMA. (AARCH64_ISA_RDMA): Use AARCH64_FL_RDMA. * config/aarch64/arm_neon.h: Use +rdma instead of arch=armv8.1-a. * doc/invoke.texi (AArch64 Options): Mention +rmda in -march docs. Add rdma to feature modifiers list. gcc/testsuite/ Backport from trunk r250444. 2017-07-21 Jim Wilson <jim.wilson@linaro.org> * lib/target-supports.exp (add_options_for_arm_v8_1a_neon): Delete redundant -march option. (check_effective_target_arm_v8_1a_neon_ok_nocache): Try armv8-a+rdma in addition to armv8.1-a. Change-Id: I57e5838b5507f3295ab8af86c43e1f3e9f51139a
2017-09-13 gcc/testsuite/Yvan Roux
Backport from trunk r250149. 2017-07-12 Christophe Lyon <christophe.lyon@linaro.org> * lib/target-supports.exp (check_stack_check_available): Make testcase name depend on stack_kind. Change-Id: Iceae67c61931f3ed4432cf38805edc55e6e2abcc
2017-09-13 gcc/Yvan Roux
Backport from trunk r249999. 2017-07-05 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/arm/neon.md (fma<VCVTF:mode>4): Remove %?. (fma<VH:mode>4_intrinsic): Likewise. (*fmsub<VCVTF:mode>4): Likewise. (*fmsub<VH:mode>4_intrinsic): Likewise. Change-Id: Ib66042393567fe05292471439615e0ec4783f328
2017-09-13 gcc/Yvan Roux
Backport from trunk r249832. 2017-06-30 Yvan Roux <yvan.roux@linaro.org> * doc/invoke.texi (AArch64): Add missing options and remove redundant ones. Change-Id: I92459730109d91f3eb08e4e3b26a9b09e5f02108
2017-09-13 gcc/Yvan Roux
Backport from trunk r249828. 2017-06-29 Julian Brown <julian@codesourcery.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> * config/aarch64/aarch64-fusion-pairs.def: Add ALU_BRANCH entry. * config/aarch64/aarch64.c (AARCH64_FUSE_ALU_BRANCH): New fusion type. (thunderx2t99_tunings): Set AARCH64_FUSE_ALU_BRANCH flag. (aarch_macro_fusion_pair_p): Add support for AARCH64_FUSE_ALU_BRANCH. Change-Id: Ib2125828f70dda5d8e65223bc01f7b71fa26901e
2017-09-13 gcc/Yvan Roux
Backport from trunk r249827. 2017-06-29 Naveen H.S <Naveen.Hurugalawadi@cavium.com> * config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Push the check for CC usage into AARCH64_FUSE_CMP_BRANCH. * config/i386/i386.c (ix86_macro_fusion_pair_p): Push the check for CC usage from generic code to here. * sched-deps.c (sched_macro_fuse_insns): Move the condition for CC usage into the target macros. Change-Id: I48d76adc14ad28357df70d26ec16fc5ebe56612d
2017-09-13 gcc/Yvan Roux
Backport from trunk r249805. 2017-06-29 Steve Ellcey <sellcey@cavium.com> * ccmp.c (ccmp_tree_comparison_p): New function. (ccmp_candidate_p): Update to use above function. (get_compare_parts): New function. (expand_ccmp_next): Update to use new functions. (expand_ccmp_expr_1): Take tree arg instead of gimple, update to use new functions. (expand_ccmp_expr): Pass tree instead of gimple to expand_ccmp_expr_1, take mode as argument. * ccmp.h (expand_ccmp_expr): Add mode as argument. * expr.c (expand_expr_real_1): Pass mode as argument. gcc/testsuite/ Backport from trunk r249806. 2017-06-29 Steve Ellcey <sellcey@cavium.com> * gcc.target/aarch64/ccmp_2.c: New test. Change-Id: If5103dee9e7db15290ee3e18cde0cf4184e77387
2017-09-13 gcc/Yvan Roux
Backport from trunk r249721. 2017-06-28 Michael Collison <michael.collison@arm.com> PR target/68535 * config/arm/arm.c (gen_ldm_seq): Remove last unnecessary set of base_reg (arm_gen_movmemqi): Removed unused variable 'i'. Convert 'for' loop into 'while' loop. (arm_expand_prologue): Remove last unnecessary set of insn. (thumb_pop): Remove unused variable 'pushed_words'. (thumb_exit): Remove last unnecessary set of regs_to_pop. Change-Id: Ie732ede1a522ab2a3d653343461541ac22765f74
2017-09-11 gcc/Yvan Roux
Backport from trunk r249639. 2017-06-26 Christophe Lyon <christophe.lyon@linaro.org> * doc/sourcebuild.texi (ARM-specific attributes): Document new arm_neon_ok_no_float_abi effective target. gcc/testsuite/ Backport from trunk r249639. 2017-06-26 Christophe Lyon <christophe.lyon@linaro.org> * lib/target-supports.exp (check_effective_target_arm_neon_ok_nocache): Add flags with -mfloat-abi=hard. Include arm_neon.h. (check_effective_target_arm_neon_ok_no_float_abi_nocache): New. (check_effective_target_arm_neon_ok_no_float_abi): New. * gcc.target/arm/lto/pr65837_0.c: Require arm_neon_ok_no_float_abi. Add -mfpu=neon to dg-lto-options. * gcc.target/arm/lto/pr65837-attr_0.c: Require arm_neon_ok_no_float_abi. Remove dg-suppress-ld-options. Change-Id: If06e216d53f2e09f93b28bd2b7b9e8388de49aaa
2017-08-18 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: I683ed7ec6927598bffbbca3b2f1b370d0a451d34
2017-08-18Make Linaro GCC Snapshot 7.2-2017.08.linaro-snapshot-7.2-2017.08TCWG Automation
gcc/ * LINARO-VERSION: Update. Change-Id: Ie51daea9ebaaf6a31239c4dc1333e2bdce6e3cf2
2017-08-17Merge branches/gcc-7-branch rev 251138.Yvan Roux
Change-Id: I97fe02630ee0e0dac705ef3ef3bf76ddafd5cab8
2017-08-17 gcc/Yvan Roux
Backport from trunk r249740. 2017-06-28 Wilco Dijkstra <wdijkstr@arm.com> PR target/79665 * config/arm/aarch-common.c (arm_no_early_alu_shift_dep): Remove redundant if. (aarch_forward_to_shift_is_not_shifted_reg): Remove. * config/arm/aarch-common-protos.h (aarch_forward_to_shift_is_not_shifted_re): Remove. * config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass. Change-Id: Icc60b1c713e894a01793c69f72b352295091fac0
2017-08-17 gcc/Yvan Roux
Backport from trunk r249764. 2017-06-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New. (DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT. (LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT. Change-Id: Id19e95ac8047f7d46190be6768a73cd072e40460
2017-08-16 gcc/Yvan Roux
Backport from trunk r249741. 2017-06-28 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64 (aarch64_expand_mov_immediate): Convert memory address to Pmode. (aarch64_print_operand): Assert MEM operands are always Pmode. Change-Id: I4bb5418d1f53d4a08fc3145f40a62458ee978122
2017-08-16 gcc/Yvan Roux
Backport from trunk r249502. 2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> * match.pd (A / (1 << B) -> A >> B): New. * generic-match-head.c: Include optabs-tree.h. * gimple-match-head.c: Likewise. * optabs-tree.h (target_supports_op_p): New. * optabs-tree.c (target_supports_op_p): New. gcc/testsuite/ Backport from trunk r249502. 2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> * gcc.dg/tree-ssa/forwprop-37.c: New. Change-Id: Ib5c0f8216011aba7d2339a7590df8d47fad6c24d
2017-08-16 gcc/Yvan Roux
Backport from trunk r249459. 2017-06-21 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs): Increment Arith_shift and Arith_shift_reg by 1. * config/aarch64/aarch64-tuning-flags.def (cheap_shift_extend): New tuning flag. * config/aarch64/aarch64.c (thunderx_tunings): Enable AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND. (aarch64_strip_extend): Add new argument and test for it. (aarch64_cheap_mult_shift_p): New function. (aarch64_rtx_mult_cost): Call aarch64_cheap_mult_shift_p and don't add a cost if it is true. Update calls to aarch64_strip_extend. (aarch64_rtx_costs): Update calls to aarch64_strip_extend. Change-Id: I3dcbaa421e754d2734f04517e3ae48f98a4358a6
2017-08-16 gcc/Yvan Roux
Backport from trunk r249410. 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-cores.def: Rearrange to sort by architecture, then by implementer ID. * config/aarch64/aarch64-tune.md: Regenerate. Change-Id: I812ffe43791e5cd26f1adb735d9a07aaab46345d
2017-08-16 gcc/lto/Yvan Roux
Backport from trunk r249224. 2017-06-15 Jan Hubicka <hubicka@ucw.cz> Thomas Preud'homme <thomas.preudhomme@arm.com> PR lto/69866 * lto-symtab.c (lto_symtab_merge_symbols): Drop useless definitions that resolved externally. gcc/testsuite/ Backport from trunk r249224. 2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> PR lto/69866 * gcc.dg/lto/pr69866_0.c: New test. * gcc.dg/lto/pr69866_1.c: Likewise. Change-Id: I9941d78f3e5d159cf0e93149515e606a004c402b
2017-08-16 gcc/Yvan Roux
Backport from trunk r249702. 2017-06-27 Michael Collison <michael.collison@arm.com> * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Directly call aarch64_split_simd_combine. * (aarch64_combine_internal<mode>): Delete pattern. * config/aarch64/aarch64.c (aarch64_split_simd_combine): Allow register and subreg operands. Change-Id: I086740de7c8439367d26e00844f1539b6d4cd1cf
2017-08-16 gcc/Yvan Roux
Backport from trunk r249458. 2017-06-21 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-cores.def (thunderxt88p1): Use thunderxt88 tunings. (thunderxt88): Likewise. * config/aarch64/aarch64.c (thunderxt88_prefetch_tune): New variable. (thunderx_prefetch_tune): New variable. (thunderx2t99_prefetch_tune): Update for the correct values. (thunderxt88_tunings): New variable. (thunderx_tunings): Use thunderx_prefetch_tune instead of generic_prefetch_tune. (thunderx2t99_tunings): Use AUTOPREFETCHER_WEAK. Change-Id: I3fbe505acb4e5feddf2bbe7cfb31540a6b63614c
2017-08-16 gcc/Yvan Roux
Backport from trunk r249457. 2017-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse, SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z. (aarch64_compare_and_swap<mode>_lse, GPI): Likewise. (aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2. (aarch64_atomic_cas<mode>, GPI): Likewise. Change-Id: Ifbe7f876c2a74f2ac7a7a16ec1ae793375cd8290
2017-08-16 gcc/Yvan Roux
Backport from trunk r249444. 2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.md (movti_aarch64): Emit mov rather than orr. (movtf_aarch64): Likewise. * config/aarch64/aarch64-simd.md (aarch64_simd_mov): Emit mov rather than orr. Change-Id: I229490d5297d77c1fac7a892042493c8b40288b9
2017-08-16 gcc/Yvan Roux
Backport from trunk r249443. 2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64-simd.md (aarch64_simd_dup): Swap alternatives, make integer dup more expensive. Change-Id: Ia9b1350d72359b195ffb7cb06c03101b8120a4a6
2017-08-16 gcc/Yvan Roux
Backport from trunk r249414. 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-option-extensions.def (rcpc): New. * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. gcc/ Backport from trunk r249923. 2017-07-03 James Greenhalgh <james.greenhalgh@arm.com> * doc/invoke.texi (rcpc architecture extension): Document it. Change-Id: Ie75a68d08d0a55deaabd2b8ce314a5b2f123a8ce
2017-08-16 gcc/Yvan Roux
Backport from trunk r249223. 2017-06-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * emit-rtl.h (is_leaf): Update comment about local register allocator. Change-Id: I59ff8f55c7c3e870ba71e6500abb7282525559f4
2017-08-16 gcc/testsuite/Yvan Roux
Backport from trunk r249215. 2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/its.c: Check that no IT blocks has more than 2 instructions in it rather than the number of IT blocks being 2. Transfer scan directive arm_thumb2 restriction to the whole testcase and restrict further to Thumb-only targets. Change-Id: I0ab4755509b3d662eb7599f9169048ec35b271e9
2017-08-16 gcc/Yvan Roux
Backport from trunk r249200. 2017-06-14 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/cortex-a53.md (cortex_a53_fpalu) Adjust latency. (cortex_a53_fconst): Likewise. (cortex_a53_fpmul): Likewise. (cortex_a53_f_load_64): Likewise. (cortex_a53_f_load_many): Likewise. (cortex_a53_advsimd_alu): Likewise. (cortex_a53_advsimd_alu_q): Likewise. (cortex_a53_advsimd_mul): Likewise. (cortex_a53_advsimd_mul_q): Likewise. (fpmac bypass): Add new bypass for fpmac-fpmac case. Add missing fmul, r2f_cvt and fconst cases. Change-Id: I258a4aa9e9f490f9cd0583624aee54d8143d8802
2017-08-16 gcc/testsuite/Yvan Roux
Backport from trunk r249122. gcc/testsuite/ 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Disable on softfloat. gcc/testsuite/ Backport from trunk r249125. 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Require arm_v8_vfp_ok. gcc/testsuite/ Backport from trunk r249148. 2017-06-13 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Require arm_arch_v8a_ok and add march option. gcc/testsuite/ Backport from trunk r249214. 2017-06-15 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Use dg-add-options. Change-Id: Ib87a32b829d97ad3e348e54fe3de734dbe75fff0
2017-08-16 gcc/Yvan Roux
Backport from trunk r249064. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): New. gcc/testsuite/ Backport from trunk r249064. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/lrint-matherr.h: New. * gcc.target/aarch64/inline-lrint_1.c: New. * gcc.target/aarch64/inline-lrint_2.c: New. * gcc.target/aarch64/no-inline-lrint_1.c: New. * gcc.target/aarch64/no-inline-lrint_2.c: New. gcc/testsuite/ Backport from trunk r249127. 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/inline-lrint_1.c: Broaden regexp. * gcc.target/aarch64/inline-lrint_2.c: Likewise. * gcc.target/aarch64/no-inline-lrint_1.c: Likewise. * gcc.target/aarch64/no-inline-lrint_2.c: Likewise. Change-Id: I5c26605abbf9a0e2e9c7e5d6969f289db7b03c52
2017-08-10 gcc/testsuite/Yvan Roux
Backport from trunk r249059. 2017-06-09 Thomas Preud'homme <thomas.preudhomme@arm.com> * lib/target-supports.exp (check_effective_target_arm_arch_FUNC_ok): Test for null definitions instead of them being undefined. Add entry for ARMv7VE. Reindent entry for ARMv8-M Baseline. Add comment warning about using the effective target for architecture extension. (check_effective_target_arm_arch_v7ve_ok): Remove. (add_options_for_arm_arch_v7ve): Likewise. Change-Id: Ib0d56ddaa32372dfbf12e1aa979aa6e15f51132a
2017-07-11 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-07-11Make Linaro GCC Snapshot 7.1-2017.07.linaro-snapshot-7.1-2017.07TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-07-07Merge branches/gcc-7-branch rev 250046.Yvan Roux
Change-Id: Iab4acacc1408cb2f8e03dd1d07ec9241c762f83a
2017-07-06 gcc/testsuite/Yvan Roux
Backport from trunk r249592. 2017-06-22 Jeff Law <law@redhat.com> * gcc.c-torture/compile/stack-check-1.c: Require "untyped_assembly". gcc/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * doc/sourcebuild.texi (Test Directives, Variants of dg-require-support): Add documentation for dg-require-stack-check. gcc/testsuite/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * lib/target-supports-dg.exp (dg-require-stack-check): New. * lib/target-supports.exp (check_stack_check_available): New. * g++.dg/other/i386-9.C: Add dg-require-stack-check. * gcc.c-torture/compile/stack-check-1.c: Likewise. * gcc.dg/graphite/run-id-pr47653.c: Likewise. * gcc.dg/pr47443.c: Likewise. * gcc.dg/pr48134.c: Likewise. * gcc.dg/pr70017.c: Likewise. * gcc.target/aarch64/stack-checking.c: Likewise. * gcc.target/arm/stack-checking.c: Likewise. * gcc.target/i386/pr48723.c: Likewise. * gcc.target/i386/pr55672.c: Likewise. * gcc.target/i386/pr67265-2.c: Likewise. * gcc.target/i386/pr67265.c: Likewise. * gnat.dg/opt49.adb: Likewise. * gnat.dg/stack_check1.adb: Likewise. * gnat.dg/stack_check2.adb: Likewise. * gnat.dg/stack_check3.adb: Likewise. Change-Id: Id58d7c3b5ed694745901b0057254635821dbfe3e
2017-07-06 gcc/Yvan Roux
Backport from trunk r248924. 2017-06-06 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * dbgcnt.def (prefetch): New debug counter. * tree-ssa-loop-prefetch.c (dbgcnt.h): New include. (schedule_prefetches): Stop issueing prefetches if debug counter tripped. gcc/ Backport from trunk r248925. 2017-06-06 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * tree-ssa-loop-prefetch.c (struct mem_ref_group, struct mem_ref): New "uid" fields to hold pretty-print IDs of group and ref. Memory references are now identified as <group_id>:<ref_id> instead of using [random] addresses. (dump_mem_details): Simplify, no functional change. (dump_mem_ref): Simplify and make output more concise. Replace couple of fprintf's throughout code with calls to dump_mem_ref. (find_or_create_group): Initialize group uid. (record_ref): Initialize ref uid. Improve debug output. (prune_group_by_reuse, should_issue_prefetch_p,) (should_issue_prefetch_p, schedule_prefetches, issue_prefetch_ref,) (mark_nontemporal_store, determine_loop_nest_reuse): Improve debug output. gcc/ Backport from trunk r249240. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): New tune structure. (struct tune_params): Use cpu_prefetch_tune instead of cache_line_size. [Unrelated to main purpose of the patch] Place the pointer field last to enable type checking errors when tune structure are wrongly merged. * config/aarch64/aarch64.c (generic_prefetch_tune,) (exynosm1_prefetch_tune, qdf24xx_prefetch_tune,) (thunderx2t99_prefetch_tune): New tune constants. (tune_params *_tunings): Update all tunings (no functional change). (aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES, PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE from tunings structures. gcc/ Backport from trunk r249241. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64.c (aarch64_override_options_internal): Set flag_prefetch_loop_arrays according to tuning data. gcc/ Backport from trunk r249242. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64.c (qdf24xx_prefetch_tune): Update prefetch settings, and enable prefetching by default at -O3. Change-Id: I573ac2d3e1bdb11088c050711dd18bf5119f4d6f
2017-07-05 gcc/Yvan Roux
Backport from trunk r249272. 2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> PR target/71778 * config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET if given a non-constant argument for an intrinsic which requires a constant. gcc/testsuite/ Backport from trunk r249272. 2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> PR target/71778 * gcc.target/arm/pr71778.c: New. Change-Id: If82ba60fc82a4fb3b758b831d43fb49d263548e5
2017-07-05 gcc/Yvan Roux
Backport from trunk r249187. 2017-06-14 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> PR target/71663 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Improve vector initialization code gen for only variable case. gcc/testsuite/ Backport from trunk r249187. 2017-06-14 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> PR target/71663 * gcc.target/aarch64/vect-init-1.c: Newtestcase. * gcc.target/aarch64/vect-init-2.c: Likewise. * gcc.target/aarch64/vect-init-3.c: Likewise. * gcc.target/aarch64/vect-init-4.c: Likewise. * gcc.target/aarch64/vect-init-5.c: Likewise. Change-Id: I01b2eba2e1be6cde59cad5a987978a412610a145
2017-07-05 gcc/Yvan Roux
Backport from trunk r248953. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_rtx_costs): Make sdiv more expensive than udiv. Remove floating point cases from mod. gcc/testsuite/ Backport from trunk r248953. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/sdiv_costs_1.c: New. gcc/ Backport from trunk r249062. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * config/arm/arm.c (arm_rtx_costs_internal): Make sdiv more expensive than udiv. gcc/testsuite/ Backport from trunk r249062. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: New. Change-Id: I503544ca95e8fc28ab9bb9b0060ea90fe557d2e6
2017-07-05 gcc/Yvan Roux
Backport from trunk r248870. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.md (sub<mode>3_compare1_imm): New define_insn. (peephole2): New peephole2 to emit the above. * config/aarch64/predicates.md (aarch64_sub_immediate): New predicate. gcc/testsuite/ Backport from trunk r248870. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/subs_compare_2.c: New test. Change-Id: I2c563b493aaba9a179d7048427ba5fcb444ec89b
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