aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-11-15 gcc/linaro-local/snapshots/linaro-6.4-2018.11TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2018-11-15Make Linaro GCC Snapshot 6.4-2018.11.TCWG Automation
gcc/ * LINARO-VERSION: Update.
2018-06-27Merge branches/gcc-6-branch rev 262168.Maxim Kuvyrkov
Change-Id: I642e7e2d6536ee11310370f18677c6251d9d3c61
2018-05-22Merge branches/gcc-6-branch rev 260494.Maxim Kuvyrkov
Change-Id: I054e5c094c65c23dc1fcdbb427301c04ab2bef63
2018-04-27 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2018-04-27Make Linaro GCC Snapshot 6.4-2018.04.linaro-snapshot-6.4-2018.04TCWG Automation
gcc/ * LINARO-VERSION: Update.
2018-04-25Merge branches/gcc-6-branch rev 259634.Maxim Kuvyrkov
Change-Id: I7b52b8f2a04e93123094009da7895d55238b03ef
2018-03-14 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2018-03-14Make Linaro GCC Snapshot 6.4-2018.03.linaro-snapshot-6.4-2018.03TCWG Automation
gcc/ * LINARO-VERSION: Update.
2018-03-08Merge branches/gcc-6-branch rev 258335 .Maxim Kuvyrkov
Change-Id: I03b5446106d0313b01799c902a8f52f92c908045
2018-01-24 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2018-01-24Make Linaro GCC Snapshot 6.4-2018.01.linaro-snapshot-6.4-2018.01TCWG Automation
gcc/ * LINARO-VERSION: Update.
2018-01-15Merge branches/gcc-6-branch rev 256699.Maxim Kuvyrkov
Change-Id: Ib35a6e2c663e57fd6c857b54fd4287bef5bddfa8
2017-11-29 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-11-29Make Linaro GCC Snapshot 6.4-2017.11.linaro-snapshot-6.4-2017.11TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-11-16Merge branches/gcc-6-branch rev 254791.Maxim Kuvyrkov
Change-Id: I6ea00b447fd24d0638f1fc025020ce898294a7ec
2017-10-13 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-10-13Make Linaro GCC Snapshot 6.4-2017.10.linaro-snapshot-6.4-2017.10TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-10-12Merge branches/gcc-6-branch rev 253668Mark Murray
Change-Id: I02945f1bb64c8600fc82e0ddc3230ebcad1354eb
2017-09-14 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-09-14Make Linaro GCC Snapshot 6.4-2017.09.linaro-snapshot-6.4-2017.09TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-09-13Merge branches/gcc-6-branch rev 252072.Yvan Roux
Change-Id: I908207c4677e5668ac12c22208ad3df3f5275e31
2017-08-18 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: I299d0e38db6d4b6310502bb60b05ba7c78fa3a2b
2017-08-18Make Linaro GCC Snapshot 6.4-2017.08.linaro-snapshot-6.4-2017.08TCWG Automation
gcc/ * LINARO-VERSION: Update. Change-Id: I8ed9e7c3a35d9e043c174c64953714106ef29050
2017-08-16Merge branches/gcc-6-branch rev 251111.Yvan Roux
Change-Id: I53b64fff4b70d6e8910ec081aab6060963fc16a0
2017-07-11 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-07-11Make Linaro GCC Snapshot 6.4-2017.07.linaro-snapshot-6.4-2017.07TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-07-07Merge branches/gcc-6-branch rev 250045.Yvan Roux
Change-Id: Ib476af153a46d43eb0d966f8cee4eeaacce673b6
2017-07-07 gcc/testsuite/Yvan Roux
Backport from trunk r249592. 2017-06-22 Jeff Law <law@redhat.com> * gcc.c-torture/compile/stack-check-1.c: Require "untyped_assembly". gcc/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * doc/sourcebuild.texi (Test Directives, Variants of dg-require-support): Add documentation for dg-require-stack-check. gcc/testsuite/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * lib/target-supports-dg.exp (dg-require-stack-check): New. * lib/target-supports.exp (check_stack_check_available): New. * g++.dg/other/i386-9.C: Add dg-require-stack-check. * gcc.c-torture/compile/stack-check-1.c: Likewise. * gcc.dg/graphite/run-id-pr47653.c: Likewise. * gcc.dg/pr47443.c: Likewise. * gcc.dg/pr48134.c: Likewise. * gcc.dg/pr70017.c: Likewise. * gcc.target/aarch64/stack-checking.c: Likewise. * gcc.target/arm/stack-checking.c: Likewise. * gcc.target/i386/pr48723.c: Likewise. * gcc.target/i386/pr55672.c: Likewise. * gcc.target/i386/pr67265-2.c: Likewise. * gcc.target/i386/pr67265.c: Likewise. * gnat.dg/opt49.adb: Likewise. * gnat.dg/stack_check1.adb: Likewise. * gnat.dg/stack_check2.adb: Likewise. * gnat.dg/stack_check3.adb: Likewise. Change-Id: I54050dc35d7cafe752ecacb7eebed34e8f4f3dda
2017-07-03 gcc/Yvan Roux
Backport from trunk r249566. 2017-06-22 Jeff Law <law@redhat.com> * config/aarch64/aarch64.c (aarch64_emit_probe_stack_range): Handle frame sizes that do not satisfy aarch64_uimm12_shift. gcc/testsuite/ Backport from trunk r249566. 2017-06-22 Jeff Law <law@redhat.com> * gcc.c-torture/compile/stack-check-1.c: New test. Change-Id: I79d213022ffbb6dde640e7ed82bec64f06a6cbe8
2017-06-29 intl/Christophe Lyon
Backport from trunk r242433. 2016-11-15 Matthias Klose <doko@ubuntu.com> * configure: Regenerate. Change-Id: I9d17698bd8d64e70d89b0e0426ca01ad85491067
2017-06-15 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-06-15Make Linaro GCC Snapshot 6.3-2017.06.linaro-snapshot-6.3-2017.06TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-06-13Merge branches/gcc-6-branch rev 249140.Yvan Roux
Change-Id: I6b73a3960133b7cfc1a59998d7411d8a247b84e0
2017-05-17 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-05-17Make Linaro GCC Snapshot 6.3-2017.05.linaro-snapshot-6.3-2017.05TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-05-12Merge branches/gcc-6-branch rev 247789.Yvan Roux
Change-Id: Ib5fcddc79d6b7cab079df944d9b5317f37821ad9
2017-05-09 gcc/Yvan Roux
Backport from trunk r247640. 2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com> Prakhar Bahuguna <prakhar.bahuguna@arm.com> PR target/71607 * config/arm/arm.md (use_literal_pool): Remove. (64-bit immediate split): No longer takes cost into consideration if arm_disable_literal_pool is enabled. * config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is used when arm_disable_literal_pool is enabled. (arm_max_const_double_inline_cost): Remove use of arm_disable_literal_pool. (push_minipool_fix): Add assert. (arm_reorg): Add return if arm_disable_literal_pool is enabled. * config/arm/vfp.md (no_literal_pool_df_immediate): New. (no_literal_pool_sf_immediate): New. gcc/testsuite/ Backport from trunk r247640. 2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> Prakhar Bahuguna <prakhar.bahuguna@arm.com> PR target/71607 * gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ... * gcc.target/arm/thumb2-slow-flash-data-1.c: ... this. * gcc.target/arm/thumb2-slow-flash-data-2.c: New. * gcc.target/arm/thumb2-slow-flash-data-3.c: New. * gcc.target/arm/thumb2-slow-flash-data-4.c: New. * gcc.target/arm/thumb2-slow-flash-data-5.c: New. * gcc.target/arm/tls-disable-literal-pool.c: New. Change-Id: I96bba6b7bafac0ee0098ea51f6613d63ecaf87ef
2017-05-09 gcc/Yvan Roux
Backport from trunk r240379. 2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com> Terry Guo <terry.guo@arm.com> * target.def (elf_flags_numeric): New target hook. * targhooks.h (default_asm_elf_flags_numeric): New. * varasm.c (default_asm_elf_flags_numeric): New. (default_elf_asm_named_section): Use new target hook. * config/arm/arm.opt (mpure-code): New. * config/arm/arm.h (SECTION_ARM_PURECODE): New. * config/arm/arm.c (arm_asm_init_sections): Add section attribute to default text section if -mpure-code. (arm_option_check_internal): Diagnose use of option with non supported targets and/or options. (arm_asm_elf_flags_numeric): New. (arm_function_section): New. (arm_elf_section_type_flags): New. * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Disable for -mpure-code. * gcc/doc/texi (TARGET_ASM_ELF_FLAGS_NUMERIC): New. * gcc/doc/texi.in (TARGET_ASM_ELF_FLAGS_NUMERIC): Likewise. gcc/testsuite/ Backport from trunk r240379, r240746. 2016-09-22 Andre Vieira <andre.simoesdiasvieira@arm.com> Terry Guo <terry.guo@arm.com> * gcc.target/arm/pure-code/ffunction-sections.c: New. * gcc.target/arm/pure-code/no-literal-pool.c: New. * gcc.target/arm/pure-code/pure-code.exp: New. gcc/ Backport from trunk r240389. 2016-09-23 Richard Biener <rguenther@suse.de> * hooks.h (hook_uint_uintp_false): Declare. gcc/ Backport from trunk r240417. 2016-09-23 Uros Bizjak <ubizjak@gmail.com> Jakub Jelinek <jakub@redhat.com> * hooks.h (hook_uint_uintp_false): Rename to... (hook_bool_uint_uintp_false): ... this. * hooks.c (hook_uint_uintp_false): Rename to... (hook_bool_uint_uintp_false): ... this. * target.def (elf_flags_numeric): Use hook_bool_uint_uintp_false instead of hook_uint_uintp_false. gcc/ Backport from trunk r240490. 2016-09-26 Andre Vieira <andre.simoesdiasvieira@arm.com> * target.def(elf_flags_numeric): Change documentation to present tense. * doc/tm.texi: Regenerate. gcc/testsuite/ Backport from trunk r241396. 2016-10-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/pure-code/pure-code.exp: Require arm_cortex_m effective target. gcc/testsuite/ Backport from trunk r241466. 2016-10-24 Andre Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/pure-code/pure-code.exp: Restore saved globals. gcc/ Backport from trunk r243240. 2016-12-025 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/arm/arm.c (TARGET_ASM_INIT_SECTIONS): Fix wrong undef location. gcc/ Backport from trunk r247585. 2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com> Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com> * config/arm/arm.md (movsi): Change TARGET_32BIT to TARGET_HAVE_MOVT. (movt splitter): Likewise. * config/arm/arm.c (arm_option_check_internal): Change arm_arch_thumb2 to TARGET_HAVE_MOVT, and merge with -mslow-flash-data check. (const_ok_for_arm): Change else to else if (TARGET_THUMB2) and add else block for Thumb-1 with MOVT. (thumb2_legitimate_address_p): Move code block ... (can_avoid_literal_pool_for_label_p): ... into this new function. (thumb1_legitimate_address_p): Add check for TARGET_HAVE_MOVT and literal pool. (thumb_legitimate_constant_p): Add conditional on TARGET_HAVE_MOVT * doc/invoke.texi (-mpure-code): Change "ARMv7-M targets" for "M-profile targets with the MOVT instruction". gcc/testsuite/ Backport from trunk r247585. 2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com> Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/pure-code/pure-code.exp: Add conditional for check_effective_target_arm_thumb1_movt_ok. Change-Id: I1ccf796809007db36bb46bd2c35f973d7766e49b
2017-05-09 gcc/Yvan Roux
Backport from trunk r247631. 2017-05-05 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/aarch-common.c (arm_early_load_addr_dep_ptr): New function. (arm_early_store_addr_dep_ptr): Likewise. * config/arm/aarch-common-protos.h (arm_early_load_addr_dep_ptr): Add prototype. (arm_early_store_addr_dep_ptr): Likewise. * config/arm/cortex-a53.md: Add new bypasses. Change-Id: Iaf607618ff36270a65498ed15f5954a1e82952a0
2017-05-09 gcc/Yvan Roux
Backport from trunk r247122. 2017-04-25 Julian Brown <julian@codesourcery.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Fix type for 1-element load. Change-Id: I3974d27987433b0126b318f60860a1139095d6f5
2017-04-21 gcc/Christophe Lyon
Backport from trunk r247015. 2017-04-20 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_elf_asm_cdtor): Create non-default priority .init_array and .fini_array section with SECTION_NOTYPE flag. Change-Id: I062ecc76d23032179ea4163fe7bd7f68c421b65a
2017-04-12 gcc/Yvan Roux
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: I38f16269aa094ad6eccbcec7331ab7c8d0f1d1e6
2017-04-12Make Linaro GCC Snapshot 6.3-2017.04.linaro-snapshot-6.3-2017.04Yvan Roux
gcc/ * LINARO-VERSION: Update. Change-Id: Ie7b5231e142364ed0b1678b148f2c2987bcf26a9
2017-04-11 gcc/Christophe Lyon
Backport from trunk r246760. 2017-04-07 Martin Liska <mliska@suse.cz> PR target/79889 * config/aarch64/aarch64.c (aarch64_process_target_attr): Show error message instead of an ICE. gcc/testsuite/ Backport from trunk r246760. 2017-04-07 Martin Liska <mliska@suse.cz> PR target/79889 * g++.dg/ext/mv8.C: Add aarch64* targets. Change-Id: I916f151b8a955c39d56b34a71605a2e6aef8861d
2017-04-07 gcc/Christophe Lyon
Backport from trunk r246682. 2017-04-04 Thomas Preud'homme <thomas.preudhomme@arm.com> PR target/80307 * config/arm/arm.c (thumb1_rtx_costs): Give a cost of 32 instructions for small multiply cores. gcc/testsuite/ Backport from trunk r246682. 2017-04-04 Thomas Preud'homme <thomas.preudhomme@arm.com> PR target/80307 * gcc.target/arm/small-multiply-m0-1.c: Do not skip test if not targeting any CPU or architecture. * gcc.target/arm/small-multiply-m0-2.c: Likewise. * gcc.target/arm/small-multiply-m0-3.c: Likewise. * gcc.target/arm/small-multiply-m0plus-1.c: Likewise. * gcc.target/arm/small-multiply-m0plus-2.c: Likewise. * gcc.target/arm/small-multiply-m0plus-3.c: Likewise. * gcc.target/arm/small-multiply-m1-1.c: Likewise. * gcc.target/arm/small-multiply-m1-2.c: Likewise. * gcc.target/arm/small-multiply-m1-3.c: Likewise. Change-Id: I6916d48a0f747ff2efe0b907a966e5b7638c1c85
2017-04-04Merge branches/gcc-6-branch rev 246668.Yvan Roux
Change-Id: If1d4497c52a1bdde1390c2377e3f2c16ac2e73b4
2017-04-04 gcc/Yvan Roux
Backport from trunk r245999. 2017-03-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/79913 * config/aarch64/iterators.md (VALL_F16_NO_V2Q): New mode iterator. (VALL_NO_V2Q): Likewise. (VDQF_DF): Delete. * config/aarch64/aarch64-simd.md (aarch64_dup_lane_<vswap_width_name><mode>): Use VALL_F16_NO_V2Q iterator. (*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Use VALL_NO_V2Q mode iterator. (*aarch64_vgetfmulx<mode>): Use VDQF iterator. Change-Id: I12c0bae589b5d9e280e3e86f2b07bb5cf146220c
2017-04-04 gcc/Christophe Lyon
Backport from trunk r246189. 2017-03-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/iterators.md (h_con): Return "x" for V4HF and V8HF. * config/aarch64/aarch64-simd.md (*aarch64_fma4_elt_from_dup<mode>): Use h_con constraint for operand 1. (*aarch64_fnma4_elt_from_dup<mode>): Likewise. (*aarch64_mulx_elt_from_dup<mode>): Likewise for operand 2. Change-Id: Iaa454b2f6b56fea65515242a8546e639d6ea8021
2017-04-04 gcc/Yvan Roux
Backport from trunk r246084. 2017-03-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/79911 * config/arm/neon.md (vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_ssum_lo<mode><V_half>3): ... This. Avoid mismatch between vec_select and vector argument. (vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_ssum_hi<mode><V_half>3): ... This. Likewise. (vec_sel_widen_usum_lo<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_usum_lo<mode><V_half>3): ... This. (vec_sel_widen_usum_hi<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_usum_hi<mode><V_half>3): ... This. Change-Id: Idaaaf2fd6b511795ef6081f65777638115fc6eea
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-01 07:18:45 +0000