aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-04-12Handle default return value in ${tool}_loadlinaro-local/fix-gcc-dgChristophe Lyon
Change-Id: Ic2928ec96253deebc1bd40bca133ebeb4eb76bf6
2016-03-17 gcc/Yvan Roux
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: Iaac5f09c105c182c16810e3bf350b57038470ef5
2016-03-17Make Linaro GCC Snapshot 5.3-2016.03.linaro-snapshot-5.3-2016.03Yvan Roux
gcc/ * LINARO-VERSION: Update. Change-Id: I72fc7e2ad6e61ca7ab45c806db68d4e7cdf6d4ca
2016-03-15Merge branches/gcc-5-branch rev 234210.Yvan Roux
Change-Id: I0e363c6a60a92a1290e80dc309e5293b8b99c324
2016-03-15 gcc/Christophe Lyon
Backport from trunk r234108. 2016-03-10 Christophe Lyon <christophe.lyon@linaro.org> PR target/70113. * config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_843419_DEFAULT): Always define to 0 or 1. (TARGET_FIX_ERR_A53_843419): New macro. * config/aarch64/aarch64-elf-raw.h (TARGET_FIX_ERR_A53_843419_DEFAULT): Update for above changes. * config/aarch64/aarch64-linux.h: Likewise. * config/aarch64/aarch64.c (aarch64_override_options_after_change_1): Do not default aarch64_nopcrelative_literal_loads to true if Cortex-A53 erratum 843419 is on. (aarch64_attributes): Handle fix-cortex-a53-843419. (aarch64_can_inline_p): Likewise. * config/aarch64/aarch64.opt (aarch64_fix_a53_err843419): Save. Change-Id: I989fb10b3b7cc2653f2157932085b8ffa193370e
2016-03-15 gcc/Christophe Lyon
Backport from trunk r233611. 2016-02-22 Jakub Jelinek <jakub@redhat.com> PR target/69894 PR target/69895 * config/m68k/t-opts (OPTIONS_H_EXTRA): Add m68k-microarchs.def and m68k-devices.def. * config/c6x/t-c6x (OPTIONS_H_EXTRA): Add c6x-isas.def. * config/aarch64/t-aarch64 (OPTIONS_H_EXTRA): Add aarch64-arches.def. gcc/ Backport from trunk r234105. 2016-03-10 Christophe Lyon <christophe.lyon@linaro.org> * config/aarch64/t-aarch64 (OPTIONS_H_EXTRA): Add aarch64-fusion-pairs.def and aarch64-tuning-flags.def Change-Id: Ie9853af2ee30b70c2611aa66f493162a37303876
2016-03-15 gcc/testsuite/Christophe Lyon
Backport from trunk r233899. 2016-03-02 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * c-c++-common/asan/swapcontext-test-1.c, * c-c++-common/tsan/thread_leak.c, * g++.dg/tsan/aligned_vs_unaligned_race.C, * g++.dg/tsan/benign_race.C, * g++.dg/tsan/fd_close_norace.C, * g++.dg/tsan/fd_close_norace2.C: Print markers to stderr to avoid races with sanitizer output Change-Id: I97c88dc99ac148ccc06c3f43b7071f31286ab860
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233266. 2016-02-10 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/arm.c (arm_cortex_a53_tune): Enable AES fusion. (arm_cortex_a57_tune): Likewise. (aarch_macro_fusion_pair_p): Add support for AES fusion. * config/arm/arm-protos.h (fuse_ops): Add FUSE_AES_AESMC. Change-Id: I7e1499693e973ecfebe4998efb042bb561a23618
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233518. 2016-02-18 Nick Clifton <nickc@redhat.com> PR target/62254 PR target/69610 * config/arm/arm.c (arm_option_override_internal): Disable interworking if the target does not support thumb instructions. (arm_reload_in_hi): Handle the case where a register to register move needs reloading because there is no simple pattern to handle it. (arm_reload_out_hi): Likewise. gcc/testsuite/ Backport from trunk r233518. 2016-02-18 Nick Clifton <nickc@redhat.com> PR target/62254 PR target/69610 * gcc.target/arm/pr62554.c: New test. * gcc.target/arm/pr69610-1.c: New test. * gcc.target/arm/pr69610-2.c: New test. Change-Id: Ie85ad94742a222e98f84ad14e17d24c5490f875e
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233495. 2016-02-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/69161 * config/arm/predicates.md (arm_comparison_operator_mode): New predicate. * config/arm/arm.md (*mov_scc): Use arm_comparison_operator_mode instead of arm_comparison_operator. (*mov_negscc): Likewise. (*mov_notscc): Likewise. * config/arm/thumb2.md (*thumb2_mov_scc): Likewise. (*thumb2_mov_negscc): Likewise. (*thumb2_mov_negscc_strict_it): Likewise. (*thumb2_mov_notscc): Likewise. (*thumb2_mov_notscc_strict_it): Likewise. Change-Id: Ie197c7cad638a10b1007e1e10443fe8795e2037a
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233490. 2016-02-17 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.c (aarch64_internal_mov_immediate): Add missing return. Change-Id: I30c8cc1893730aaf728da1ef6a3de19f80f2b23d
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233461. Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/aarch64/aarch64.c (aarch64_expand_vector_init): Refactor, always use lane loads to construct non-constant vectors. 2016-02-16 James Greenhalgh <james.greenhalgh@arm.com> gcc/testsuite/ Backport from trunk r233461. 2016-02-16 James Greenhalgh <james.greenhalgh@arm.com> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * gcc.target/aarch64/vector_initialization_nostack.c: New. Change-Id: I7de97dc15b350ea0e46d23adc7eafbbd65648bb8
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233460. 2016-02-16 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64.md (arch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Fix register constraints for operand 3. (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Likewise. Change-Id: I06d45c5302a927088a5e68bbbf317f73fb69f785
2016-03-14 gcc/testsuite/Christophe Lyon
Backport from trunk r233426. 2016-02-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> * lib/target-supports.exp (check_effective_target_section_anchors): Add check for aarch64*-*-*. Change-Id: I6bafa27d91f464d51851414452ddf3aebafe5a85
2016-03-14 gcc/Christophe Lyon
Backport from trunk r233268. 2016-02-10 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.c (cortexa53_tunings): Enable AES fusion. (cortexa57_tunings): Likewise. (cortexa72_tunings): Likewise. (arch_macro_fusion_pair_p): Add support for AES fusion. * config/aarch64/aarch64-fusion-pairs.def: Add AES_AESMC entry. * config/arm/aarch-common.c (aarch_crypto_can_dual_issue): Allow virtual registers before reload so early scheduling works. * config/arm/cortex-a57.md (cortex_a57_crypto_simple): Use correct latency and pipeline. (cortex_a57_crypto_complex): Likewise. (cortex_a57_crypto_xor): Likewise. (define_bypass): Add AES bypass. Change-Id: Idc69fb303db87c5ea7e5e359fd1eef0447f3124d
2016-02-17 gcc/Christophe Lyon
Backport from trunk r232818. 2016-01-26 Roger Ferrer Ibáñez <rofirrim@gmail.com> PR target/67896 * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtin_types): Do not set structural equality to __Poly{8,16,64,128}_t types. gcc/testsuite/ Backport from trunk r232818. 2016-01-26 Roger Ferrer Ibáñez <rofirrim@gmail.com> PR target/67896 * gcc.target/aarch64/simd/pr67896.C: New. Change-Id: I09d061bfb8f0951c21a2ab60cebfe2a8942afb46
2016-02-11 gcc/linaro-local/maxim.kuvyrkov/testlinaro-local/maxim.kuvyrkov-testYvan Roux
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: Icf07bd41c7879ff4042c436c89da110643f57eca
2016-02-11Make Linaro GCC Snapshot 5.3-2016.02.linaro-snapshot-5.3-2016.02Yvan Roux
gcc/ * LINARO-VERSION: Update. Change-Id: Ibd812d80340e28a628762c74f8b749c88a5a0921
2016-02-09Merge branches/gcc-5-branch rev 233233.Yvan Roux
Change-Id: If2cd17ed92b705b4b6468ed3da7c1bdc102a2368
2016-02-09 gcc/Auto Backport Engine
Backport from trunk r233146. 2016-02-04 David Malcolm <dmalcolm@redhat.com> * config/aarch64/cortex-a57-fma-steering.c (aarch64_register_fma_steering): Remove "static" from arguments to register_pass. Change-Id: I923ce95ceffa8bc3540f472bdcfe311d8adf60ef
2016-02-09 gcc/Auto Backport Engine
Backport from trunk r233142. 2016-02-04 Alan Lawrence <alan.lawrence@arm.com> * config/arm/arm-protos.h (neon_reinterpret): Remove. * config/arm/arm.c (neon_reinterpret): Remove. * config/arm/arm_neon_builtins.def (vreinterpretv8qi, vreinterpretv4hi, vreinterpretv2si, vreinterpretv2sf, vreinterpretdi, vreinterpretv16qi, vreinterpretv8hi, vreinterpretv4si, vreinterpretv4sf, vreinterpretv2di, vreinterpretti): Remove. * config/arm/neon.md (neon_vreinterpretv8qi<mode>, neon_vreinterpretv4hi<mode>, neon_vreinterpretv2si<mode>, neon_vreinterpretv2sf<mode>, neon_vreinterpretdi<mode>, neon_vreinterpretti<mode>, neon_vreinterpretv16qi<mode>, neon_vreinterpretv8hi<mode>, neon_vreinterpretv4si<mode>, neon_vreinterpretv4sf<mode>, neon_vreinterpretv2di<mode>): Remove. * config/arm/arm_neon.h (vreinterpret_p8_p16, vreinterpret_p8_f32, vreinterpret_p8_p64, vreinterpret_p8_s64, vreinterpret_p8_u64, vreinterpret_p8_s8, vreinterpret_p8_s16, vreinterpret_p8_s32, vreinterpret_p8_u8, vreinterpret_p8_u16, vreinterpret_p8_u32, vreinterpret_p16_p8, vreinterpret_p16_f32, vreinterpret_p16_p64, vreinterpret_p16_s64, vreinterpret_p16_u64, vreinterpret_p16_s8, vreinterpret_p16_s16, vreinterpret_p16_s32, vreinterpret_p16_u8, vreinterpret_p16_u16, vreinterpret_p16_u32, vreinterpret_f32_p8, vreinterpret_f32_p16, vreinterpret_f32_p64, vreinterpret_f32_s64, vreinterpret_f32_u64, vreinterpret_f32_s8, vreinterpret_f32_s16, vreinterpret_f32_s32, vreinterpret_f32_u8, vreinterpret_f32_u16, vreinterpret_f32_u32, vreinterpret_p64_p8, vreinterpret_p64_p16, vreinterpret_p64_f32, vreinterpret_p64_s64, vreinterpret_p64_u64, vreinterpret_p64_s8, vreinterpret_p64_s16, vreinterpret_p64_s32, vreinterpret_p64_u8, vreinterpret_p64_u16, vreinterpret_p64_u32, vreinterpret_s64_p8, vreinterpret_s64_p16, vreinterpret_s64_f32, vreinterpret_s64_p64, vreinterpret_s64_u64, vreinterpret_s64_s8, vreinterpret_s64_s16, vreinterpret_s64_s32, vreinterpret_s64_u8, vreinterpret_s64_u16, vreinterpret_s64_u32, vreinterpret_u64_p8, vreinterpret_u64_p16, vreinterpret_u64_f32, vreinterpret_u64_p64, vreinterpret_u64_s64, vreinterpret_u64_s8, vreinterpret_u64_s16, vreinterpret_u64_s32, vreinterpret_u64_u8, vreinterpret_u64_u16, vreinterpret_u64_u32, vreinterpret_s8_p8, vreinterpret_s8_p16, vreinterpret_s8_f32, vreinterpret_s8_p64, vreinterpret_s8_s64, vreinterpret_s8_u64, vreinterpret_s8_s16, vreinterpret_s8_s32, vreinterpret_s8_u8, vreinterpret_s8_u16, vreinterpret_s8_u32, vreinterpret_s16_p8, vreinterpret_s16_p16, vreinterpret_s16_f32, vreinterpret_s16_p64, vreinterpret_s16_s64, vreinterpret_s16_u64, vreinterpret_s16_s8, vreinterpret_s16_s32, vreinterpret_s16_u8, vreinterpret_s16_u16, vreinterpret_s16_u32, vreinterpret_s32_p8, vreinterpret_s32_p16, vreinterpret_s32_f32, vreinterpret_s32_p64, vreinterpret_s32_s64, vreinterpret_s32_u64, vreinterpret_s32_s8, vreinterpret_s32_s16, vreinterpret_s32_u8, vreinterpret_s32_u16, vreinterpret_s32_u32, vreinterpret_u8_p8, vreinterpret_u8_p16, vreinterpret_u8_f32, vreinterpret_u8_p64, vreinterpret_u8_s64, vreinterpret_u8_u64, vreinterpret_u8_s8, vreinterpret_u8_s16, vreinterpret_u8_s32, vreinterpret_u8_u16, vreinterpret_u8_u32, vreinterpret_u16_p8, vreinterpret_u16_p16, vreinterpret_u16_f32, vreinterpret_u16_p64, vreinterpret_u16_s64, vreinterpret_u16_u64, vreinterpret_u16_s8, vreinterpret_u16_s16, vreinterpret_u16_s32, vreinterpret_u16_u8, vreinterpret_u16_u32, vreinterpret_u32_p8, vreinterpret_u32_p16, vreinterpret_u32_f32, vreinterpret_u32_p64, vreinterpret_u32_s64, vreinterpret_u32_u64, vreinterpret_u32_s8, vreinterpret_u32_s16, vreinterpret_u32_s32, vreinterpret_u32_u8, vreinterpret_u32_u16, vreinterpretq_p8_p16, vreinterpretq_p8_f32, vreinterpretq_p8_p64, vreinterpretq_p8_p128, vreinterpretq_p8_s64, vreinterpretq_p8_u64, vreinterpretq_p8_s8, vreinterpretq_p8_s16, vreinterpretq_p8_s32, vreinterpretq_p8_u8, vreinterpretq_p8_u16, vreinterpretq_p8_u32, vreinterpretq_p16_p8, vreinterpretq_p16_f32, vreinterpretq_p16_p64, vreinterpretq_p16_p128, vreinterpretq_p16_s64, vreinterpretq_p16_u64, vreinterpretq_p16_s8, vreinterpretq_p16_s16, vreinterpretq_p16_s32, vreinterpretq_p16_u8, vreinterpretq_p16_u16, vreinterpretq_p16_u32, vreinterpretq_f32_p8, vreinterpretq_f32_p16, vreinterpretq_f32_p64, vreinterpretq_f32_p128, vreinterpretq_f32_s64, vreinterpretq_f32_u64, vreinterpretq_f32_s8, vreinterpretq_f32_s16, vreinterpretq_f32_s32, vreinterpretq_f32_u8, vreinterpretq_f32_u16, vreinterpretq_f32_u32, vreinterpretq_p64_p8, vreinterpretq_p64_p16, vreinterpretq_p64_f32, vreinterpretq_p64_p128, vreinterpretq_p64_s64, vreinterpretq_p64_u64, vreinterpretq_p64_s8, vreinterpretq_p64_s16, vreinterpretq_p64_s32, vreinterpretq_p64_u8, vreinterpretq_p64_u16, vreinterpretq_p64_u32, vreinterpretq_p128_p8, vreinterpretq_p128_p16, vreinterpretq_p128_f32, vreinterpretq_p128_p64, vreinterpretq_p128_s64, vreinterpretq_p128_u64, vreinterpretq_p128_s8, vreinterpretq_p128_s16, vreinterpretq_p128_s32, vreinterpretq_p128_u8, vreinterpretq_p128_u16, vreinterpretq_p128_u32, vreinterpretq_s64_p8, vreinterpretq_s64_p16, vreinterpretq_s64_f32, vreinterpretq_s64_p64, vreinterpretq_s64_p128, vreinterpretq_s64_u64, vreinterpretq_s64_s8, vreinterpretq_s64_s16, vreinterpretq_s64_s32, vreinterpretq_s64_u8, vreinterpretq_s64_u16, vreinterpretq_s64_u32, vreinterpretq_u64_p8, vreinterpretq_u64_p16, vreinterpretq_u64_f32, vreinterpretq_u64_p64, vreinterpretq_u64_p128, vreinterpretq_u64_s64, vreinterpretq_u64_s8, vreinterpretq_u64_s16, vreinterpretq_u64_s32, vreinterpretq_u64_u8, vreinterpretq_u64_u16, vreinterpretq_u64_u32, vreinterpretq_s8_p8, vreinterpretq_s8_p16, vreinterpretq_s8_f32, vreinterpretq_s8_p64, vreinterpretq_s8_p128, vreinterpretq_s8_s64, vreinterpretq_s8_u64, vreinterpretq_s8_s16, vreinterpretq_s8_s32, vreinterpretq_s8_u8, vreinterpretq_s8_u16, vreinterpretq_s8_u32, vreinterpretq_s16_p8, vreinterpretq_s16_p16, vreinterpretq_s16_f32, vreinterpretq_s16_p64, vreinterpretq_s16_p128, vreinterpretq_s16_s64, vreinterpretq_s16_u64, vreinterpretq_s16_s8, vreinterpretq_s16_s32, vreinterpretq_s16_u8, vreinterpretq_s16_u16, vreinterpretq_s16_u32, vreinterpretq_s32_p8, vreinterpretq_s32_p16, vreinterpretq_s32_f16, vreinterpretq_s32_f32, vreinterpretq_s32_p64, vreinterpretq_s32_p128, vreinterpretq_s32_s64, vreinterpretq_s32_u64, vreinterpretq_s32_s8, vreinterpretq_s32_s16, vreinterpretq_s32_u8, vreinterpretq_s32_u16, vreinterpretq_s32_u32, vreinterpretq_u8_p8, vreinterpretq_u8_p16, vreinterpretq_u8_f32, vreinterpretq_u8_p64, vreinterpretq_u8_p128, vreinterpretq_u8_s64, vreinterpretq_u8_u64, vreinterpretq_u8_s8, vreinterpretq_u8_s16, vreinterpretq_u8_s32, vreinterpretq_u8_u16, vreinterpretq_u8_u32, vreinterpretq_u16_p8, vreinterpretq_u16_p16, vreinterpretq_u16_f32, vreinterpretq_u16_p64, vreinterpretq_u16_p128, vreinterpretq_u16_s64, vreinterpretq_u16_u64, vreinterpretq_u16_s8, vreinterpretq_u16_s16, vreinterpretq_u16_s32, vreinterpretq_u16_u8, vreinterpretq_u16_u32, vreinterpretq_u32_p8, vreinterpretq_u32_p16, vreinterpretq_u32_f32, vreinterpretq_u32_p64, vreinterpretq_u32_p128, vreinterpretq_u32_s64, vreinterpretq_u32_u64, vreinterpretq_u32_s8, vreinterpretq_u32_s16, vreinterpretq_u32_s32, vreinterpretq_u32_u8, vreinterpretq_u32_u16): Rewrite using casts. Change-Id: Ia2ab52f5f57e370c88bcc5e41020e9c6e89365c2
2016-02-05 gcc/Prathamesh Kulkarni
Backport from trunk r232668. 2016-01-21 Stefan Sørensen <stefan.sorensen@spectralink.com> Jakub Jelinek <jakub@redhat.com> PR target/69187 PR target/65624 * config/arm/arm-builtins.c (arm_expand_neon_builtin): Increase args array size by one to avoid buffer overflow. gcc/testsuite/ Backport from trunk r232668. PR target/69187 PR target/65624 * gcc.target/arm/pr69187.c: New test. Change-Id: Iff2377c7356b5167553afda438e1b41e802bddf0
2016-02-04 gcc/Charles Baylis
Backport from trunk r232154. 2016-01-08 Thomas Preud'homme <thomas.preudhomme@arm.com> PR tree-optimization/67781 * tree-ssa-math-opts.c (find_bswap_or_nop): Zero out bytes in cmpxchg and cmpnop in two steps: first the ones not accessed in original gimple expression in a endian independent way and then the ones not accessed in the final result in an endian-specific way. gcc/testsuite/ Backport from trunk r232154. 2016-01-08 Thomas Preud'homme <thomas.preudhomme@arm.com> PR tree-optimization/67781 * gcc.c-torture/execute/pr67781.c: New file. Change-Id: I342f01fc0148d2209d46476301674d8be7ab5fad
2016-02-04 gcc/testsuite/Backport Tool
Backport from trunk r232913. 2016-01-28 Thomas Preud'homme <thomas.preudhomme@arm.com> * g++.dg/pr67989.C: Remove ARM-specific option. * gcc.target/arm/pr67989.C: New file. Change-Id: I90d900e7a798c7f8eb8a9b752a523a7448fab376
2016-02-04 gcc/Backport Tool
Backport from trunk r232921. 2016-01-28 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.md (ccmp<mode>): Disassemble immediate as %1. (add<mode>3_compare0): Likewise. (addsi3_compare0_uxtw): Likewise. (add<mode>3nr_compare0): Likewise. (compare_neg<mode>): Likewise. (<optab><mode>3): Likewise. Change-Id: Ife9f84d09d1d04b486408a290c4bb067c0cf42af
2016-02-04 gcc/kugan.vivekanandarajah
Backport from trunk r232566. 2016-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/69135 * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): Set "conds" attribute to unconditional. Remove %? from output template. gcc/testsuite/ Backport from trunk r232566. 2016-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/69135 * gcc.target/arm/pr69135_1.c: New test. Change-Id: I8a920fdf3188fd5ab911cdba6371ed3dcd8d8cbb
2016-02-04 gcc/kugan.vivekanandarajah
Backport from trunk r232587. 2016-01-20 Kugan Vivekanandarajah <kuganv@linaro.org> * doc/lto.texi: Remove text that says only Gold has linker plugin support. Change-Id: Ia4a771ce24aa4620e476ca80fbfa4763666ee053
2016-02-04 gcc/Charles Baylis
Backport from trunk r231887. 2015-12-21 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-option-extensions.def (LSE): Change FEAT_STRING to "atomics". Change-Id: I4ce2d801e5a8387c2365ed7cf10d2bf5e3fd526d
2016-02-03 gcc/Michael Collison
Backport from trunk r232727. 2016-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/69403 * config/arm/thumb2.md (*thumb2_ior_scc_strict_it): Convert to define_insn_and_split. Ensure operands[1] and operands[0] do not get assigned the same register. gcc/testsuite/ Backport from trunk r232727. 2016-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/69403 * gcc.c-torture/execute/pr69403.c: New test. Change-Id: Ic3e745971e981355228624c8b9ca5c5ebecb8939
2016-02-03 gcc/Michael Collison
Backport from trunk r232493. 2016-01-18 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (thumb1_reorg): Check that the comparison is against the constant 0. Change-Id: I5ddfc6a2dde54d15ee29f39705ca36358a724285
2016-01-28 gcc/Michael Collison
Backport from trunk r232414. 2016-01-15 Sebastian Huber <sebastian.huber@embedded-brains.de> * config/arm/t-rtems: Add cortex-m7/fpv5-d16 multilib. Change-Id: Ie147d26a571fb1524f825bbbe02300204082eda9
2016-01-27 gcc/Charles Baylis
Backport from trunk r232228. 2016-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR rtl-optimization/68796 * config/aarch64/aarch64.md (*and<mode>_compare0): New pattern. * config/aarch64/aarch64.c (aarch64_select_cc_mode): Handle HImode and QImode comparisons against zero with CC_NZmode. * config/aarch64/iterators.md (short_mask): New mode_attr. gcc/testsuite/ Backport from trunk r232228. 2016-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR rtl-optimization/68796 * gcc.target/aarch64/tst_5.c: New test. * gcc.target/aarch64/tst_6.c: Likewise. Change-Id: I73b87eed67ebe43415aaa287368f6784d4cbc1d3
2016-01-27 gcc/Christophe Lyon
Backport from trunk r232441. 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case): Handle COMPARE of ZERO_EXTRACT against zero form of TST-immediate. Change-Id: I6c022007b3c58ad0126c59edde3409beb057735e
2016-01-27 gcc/Prathamesh Kulkarni
Backport from trunk r232444. 2016-01-15 Jiong Wang <jiong.wang@arm.com> * config/aarch64/aarch64-builtins.c (aarch64_types_unopus_qualifiers): New. (TYPES_UNOPUS): Likewise. * config/aarch64/aarch64-simd-builtins.def (lbtruncuv2sf): Correct builtin type, from UNOP to UNOPUS. (lbtruncuv4sf): Likewise. (lbtruncuv2df): Likewise. (lrounduv2sf): Likewise. (lrounduv4sf): Likewise. (lrounduv2df): Likewise. (lroundusf): Likewise. (lroundusf): Likewise. (lceiluv2sf): Likewise. (lceiluv4sf): Likewise. (lceiluv2df): Likewise. (lceilusf): Likewise. (lceiludf): Likewise. (lflooruv2sf): Likewise. (lflooruv4sf): Likewise. (lflooruv2df): Likewise. (lfloorusf): Likewise. (lfloorudf): Likewise. (lfrintnuv2sf): Likewise. (lfrintnuv4sf): Likewise. (lfrintnuv2df): Likewise. (lfrintnusf): Likewise. (lfrintnudf): Likewise. * config/aarch64/arm_neon.h (vcvt_u32_f32): Remove unncessary type conversion. (vcvtq_u32_f32): Likewise. (vcvtq_u64_f64): Likewise. (vcvta_u32_f32): Likewise. (vcvtaq_u32_f32): Likewise. (vcvtaq_u64_f64): Likewise. (vcvtm_u32_f32): Likewise. (vcvtmq_u32_f32): Likewise. (vcvtmq_u64_f64): Likewise. (vcvtn_u32_f32): Likwise. (vcvtnq_u32_f32): Likewise. (vcvtnq_u64_f64): Likewise. (vcvtp_u32_f32): Likewise. (vcvtpq_u32_f32): Likewise. (vcvtpq_u64_f64): Likewise. (vcvtmd_u64_f64): Likewise. (vcvtms_u32_f32): Likewise. (vcvtad_u64_f64): Likewise. (vcvtas_u32_f32): Likewise. (vcvtnd_u64_f64): Likewise. (vcvtns_u32_f32): Likewise. (vcvtpd_u64_f64): Likewise. (vcvtps_u32_f32): Likewise. Change-Id: If2bc669d3cf923890357ea4dafc7ab1870b245a5
2016-01-27 gcc/Prathamesh Kulkarni
Backport from trunk r232442. 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle CSEL of zero_extended registers. Change-Id: I472f2a333da81964734c544d61de1c9908a31acb
2016-01-27 gcc/Prathamesh Kulkarni
Backport from trunk r232440. 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_process_one_target_attr): Return false when argument string is not found in the attributes table at all. gcc/testsuite/ Backport from trunk r232440. 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/target_attr_17.c: New test. Change-Id: I7b29bbe09b39f05e721e555999dc70b3df340ecf
2016-01-26 gcc/Kugan Vivekanandarajah
Backport from trunk r232267. 2016-01-12 Jakub Jelinek <jakub@redhat.com> PR target/69175 * ifcvt.c (cond_exec_process_if_block): When removing the last insn from then_bb, remove also any possible barriers that follow it. gcc/testsuite/ Backport from trunk r232267. 2016-01-12 Jakub Jelinek <jakub@redhat.com> PR target/69175 * g++.dg/opt/pr69175.C: New test. Change-Id: Ic10619f909083a91034fe6933def72f4b3fefb26
2016-01-22 gcc/Charles Baylis
Backport from trunk r231304. 2015-12-04 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64.md (add<mode>3_pluslong): Add register constraints. gcc/testsuite/ Backport from trunk r231304. 2015-12-04 James Greenhalgh <james.greenhalgh@arm.com> * gcc.c-torture/compile/20151204.c: New. gcc/ Backport from trunk r232540. 2016-01-18 Richard Henderson <rth@redhat.com> PR target/69176 * config/aarch64/aarch64.md (add<GPI>3): Move long immediate operands to pseudo only if CSE is expected. Split long immediate operands only after reload, and for the stack pointer. (*add<GPI>3_pluslong): Remove. (*addsi3_aarch64, *adddi3_aarch64): Merge into... (*add<GPI>3_aarch64): ... here. Add r/rk/Upl alternative. (*addsi3_aarch64_uxtw): Add r/rk/Upl alternative. (*add<GPI>3 peepholes): New. (*add<GPI>3 splitters): New. * config/aarch64/constraints.md (Upl): New. * config/aarch64/predicates.md (aarch64_pluslong_strict_immedate): New. Change-Id: Id8d5f626e6819a2a469ab97bd5e730b4fbef02c4
2016-01-14 gcc/Yvan Roux
* LINARO-VERSION: Bump version number, post snapshot. Change-Id: Iaf6ca6470aa97acd3cc4f81e8303a9b4e9eb6ce0
2016-01-14Make Linaro GCC Snapshot 5.3-2016.01.linaro-snapshot-5.3-2016.01Yvan Roux
gcc/ * LINARO-VERSION: Update. Change-Id: Id461755f76d8982407ce17a983c167c1ecf2d5c7
2016-01-13 gcc/Yvan Roux
Backport from trunk r232325. 2016-01-13 Yvan Roux <yvan.roux@linaro.org> * config/arm/arm-arches.def: Remove spurious whitespace in "armv8.1-a" and "armv8.1-a+crc" entries. Change-Id: I8d6875ee23c32eecf60fe2a9c7d5a6416d693e01
2016-01-13 gcc/Yvan Roux
Backport from trunk r231678. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/arm-arches.def: Add "armv8.1-a" and "armv8.1-a+crc". * config/arm/arm-protos.h (FL2_ARCH8_1): New. (FL2_FOR_ARCH8_1A): New. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm.c (arm_arch8_1): New. (arm_option_override): Set arm_arch8_1. * config/arm/arm.h (TARGET_NEON_RDMA): New. (arm_arch8_1): Declare. * doc/invoke.texi (ARM Options, -march): Add "armv8.1-a" and "armv8.1-a+crc". (ARM Options, -mfpu): Fix a typo. gcc/ Backport from trunk r231680. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/t-aprofile: Make "armv8.1-a" and "armv8.1-a+crc" matches for "armv8-a". gcc/ Backport from trunk r231681. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/iterators.md (VQRDMLH_AS): New. (neon_rdma_as): New. * config/arm/neon.md (neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>): New. (neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>): New. * config/arm/unspecs.md (UNSPEC_VQRDMLAH): New. (UNSPEC_VQRDMLSH): New. gcc/ Backport from trunk r231682. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_QRDMX. Clean up some trailing whitespace. gcc/ Backport from trunk r231683. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * doc/sourcebuild.texi (ARM-specific attributes): Add "arm_v8_1a_neon_ok" and "arm_v8_1a_neon_hw". gcc/testsuite/ Backport from trunk r231683. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * lib/target-supports.exp (add_options_for_arm_v8_1a_neon): Update comment. Use check_effective_target_arm_v8_1a_neon_ok to select the command line options. (check_effective_target_arm_v8_1a_neon_ok_nocache): Update initial test to allow ARM targets. Select and record a working set of command line options. (check_effective_target_arm_v8_1a_neon_hw): Add tests for ARM targets. gcc/ Backport from trunk r231685. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New. (vqrdmlahq_s16, vqrdmlahq_s32): New. (vqrdmlsh_s16, vqrdmlsh_s32): New. (vqrdmlahq_s16, vqrdmlshq_s32): New. * config/arm/arm_neon_builtins.def: Add "vqrdmlah" and "vqrdmlsh". gcc/ Backport from trunk r231686. 2015-12-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/arm_neon.h (vqrdmlahq_lane_s16): New. (vqrdmlahq_lane_s32): New. (vqrdmlah_lane_s16): New. (vqrdmlah_lane_s32): New. (vqrdmlshq_lane_s16): New. (vqrdmlshq_lane_s32): New. (vqrdmlsh_lane_s16): New. (vqrdmlsh_lane_s32): New. * config/arm/arm_neon_builtins.def: Add "vqrdmlah_lane" and "vqrdmlsh_lane". Change-Id: Ie3e2a64a5efbb99cd38fa38373f907c7bdd54c21
2016-01-13Merge branches/gcc-5-branch rev 232321.Yvan Roux
Change-Id: I69778250351f56596e2aa93cbd9fe5ee12b54548
2016-01-13 gcc/Yvan Roux
Backport from trunk r230786. 2015-11-24 Segher Boessenkool <segher@kernel.crashing.org> PR rtl-optimization/68381 * combine.c (is_parallel_of_n_reg_sets): Return false if the pattern is poisoned. gcc/testsuite/ Backport from trunk r230809. 2015-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR rtl-optimization/68381 * gcc.c-torture/execute/pr68381.c: New test. gcc/ Backport from trunk r230946. 2015-11-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * combine.c (subst): Do not return clobber of zero in widening mult case. Just return x unchanged if it is a no-op substitution. Change-Id: I3a644b62bce1ddd7d24ebd3b2c604076e040d755
2016-01-12 gcc/Yvan Roux
Backport from trunk r230853. 2015-11-24 Michael Collison <michael.collison@linaro.org> * config/aarch64/aarch64-simd.md (widen_ssum, widen_usum) (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>_internal): New patterns * config/aarch64/iterators.md (Vhalf, VDBLW): New mode attributes. gcc/testsuite/ Backport from trunk r230853. 2015-11-24 Michael Collison <michael.collison@linaro.org> * gcc.target/aarch64/saddw-1.c: New test. * gcc.target/aarch64/saddw-2.c: New test. * gcc.target/aarch64/uaddw-1.c: New test. * gcc.target/aarch64/uaddw-2.c: New test. * gcc.target/aarch64/uaddw-3.c: New test. * lib/target-support.exp (check_effective_target_vect_widen_sum_hi_to_si_pattern): Add aarch64 to list of support targets. Change-Id: I47025838808fe537cfd2b01b11facdff53663da9
2016-01-12 gcc/Yvan Roux
Backport from trunk r231864. 2015-12-20 Andrew Pinsi <apinski@cavium.com> * config/aarch64/atomics.md (aarch64_atomic_<atomic_optab>_fetch<mode>_lse): Add early clobber to the scratch register. Change-Id: I80908a754f5aedc1c249af95174ad4592c239ad6
2016-01-12 gcc/Yvan Roux
Backport from trunk r231810. 2015-12-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR rtl-optimization/68796 * config/aarch64/aarch64.md (*and<mode>3nr_compare0_zextract): New pattern. * config/aarch64/aarch64.c (aarch64_select_cc_mode): Handle ZERO_EXTRACT comparison with zero. (aarch64_mask_from_zextract_ops): New function. * config/aarch64/aarch64-protos.h (aarch64_mask_from_zextract_ops): New prototype. gcc/testsuite/ Backport from trunk r231810. 2015-12-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR rtl-optimization/68796 * gcc.target/aarch64/tst_3.c: New test. * gcc.target/aarch64/tst_4.c: Likewise. Change-Id: I360a9cf40791c17a98f198f36eae7bf05f98f315
2016-01-12 gcc/Yvan Roux
Backport from trunk r231758. 2015-12-17 Christian Bruel <christian.bruel@st.com> * tree.h (TYPE_MODE_RAW): New macro. * tree-streamer-out.c (pack_ts_type_common_value_fields): Replace TYPE_MODE by TYPE_MODE_RAW. Change-Id: Ie4f2e98e9c5c07ff40bd21e55db2f65565569cba
2016-01-12 gcc/Yvan Roux
Backport from trunk r231696. 2015-12-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/68696 * config/aarch64/aarch64-simd.md (*aarch64_simd_bsl<mode>_alt): New pattern. (aarch64_simd_bsl<mode>_internal): Update comment to reflect the above. Change-Id: I90ba28be8c1fcdf20d127dd1874effba90130221
2016-01-12 gcc/testsuite/Yvan Roux
Backport from trunk r231413. 2015-12-08 Jiong Wang <jiong.wang@arm.com> * gcc.target/aarch64/got_mem_hoist_1.c (dg-skip-if): Match big-endian as well. Change-Id: Id97baeb778cc22bf04a93655d20946f7da369e7b