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2017-08-18Make Linaro GCC Snapshot 7.2-2017.08.linaro-snapshot-7.2-2017.08TCWG Automation
gcc/ * LINARO-VERSION: Update. Change-Id: Ie51daea9ebaaf6a31239c4dc1333e2bdce6e3cf2
2017-08-17Merge branches/gcc-7-branch rev 251138.Yvan Roux
Change-Id: I97fe02630ee0e0dac705ef3ef3bf76ddafd5cab8
2017-08-17 gcc/Yvan Roux
Backport from trunk r249740. 2017-06-28 Wilco Dijkstra <wdijkstr@arm.com> PR target/79665 * config/arm/aarch-common.c (arm_no_early_alu_shift_dep): Remove redundant if. (aarch_forward_to_shift_is_not_shifted_reg): Remove. * config/arm/aarch-common-protos.h (aarch_forward_to_shift_is_not_shifted_re): Remove. * config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass. Change-Id: Icc60b1c713e894a01793c69f72b352295091fac0
2017-08-17 gcc/Yvan Roux
Backport from trunk r249764. 2017-06-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New. (DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT. (LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT. Change-Id: Id19e95ac8047f7d46190be6768a73cd072e40460
2017-08-16 gcc/Yvan Roux
Backport from trunk r249741. 2017-06-28 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64 (aarch64_expand_mov_immediate): Convert memory address to Pmode. (aarch64_print_operand): Assert MEM operands are always Pmode. Change-Id: I4bb5418d1f53d4a08fc3145f40a62458ee978122
2017-08-16 gcc/Yvan Roux
Backport from trunk r249502. 2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> * match.pd (A / (1 << B) -> A >> B): New. * generic-match-head.c: Include optabs-tree.h. * gimple-match-head.c: Likewise. * optabs-tree.h (target_supports_op_p): New. * optabs-tree.c (target_supports_op_p): New. gcc/testsuite/ Backport from trunk r249502. 2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> * gcc.dg/tree-ssa/forwprop-37.c: New. Change-Id: Ib5c0f8216011aba7d2339a7590df8d47fad6c24d
2017-08-16 gcc/Yvan Roux
Backport from trunk r249459. 2017-06-21 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs): Increment Arith_shift and Arith_shift_reg by 1. * config/aarch64/aarch64-tuning-flags.def (cheap_shift_extend): New tuning flag. * config/aarch64/aarch64.c (thunderx_tunings): Enable AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND. (aarch64_strip_extend): Add new argument and test for it. (aarch64_cheap_mult_shift_p): New function. (aarch64_rtx_mult_cost): Call aarch64_cheap_mult_shift_p and don't add a cost if it is true. Update calls to aarch64_strip_extend. (aarch64_rtx_costs): Update calls to aarch64_strip_extend. Change-Id: I3dcbaa421e754d2734f04517e3ae48f98a4358a6
2017-08-16 gcc/Yvan Roux
Backport from trunk r249410. 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-cores.def: Rearrange to sort by architecture, then by implementer ID. * config/aarch64/aarch64-tune.md: Regenerate. Change-Id: I812ffe43791e5cd26f1adb735d9a07aaab46345d
2017-08-16 gcc/lto/Yvan Roux
Backport from trunk r249224. 2017-06-15 Jan Hubicka <hubicka@ucw.cz> Thomas Preud'homme <thomas.preudhomme@arm.com> PR lto/69866 * lto-symtab.c (lto_symtab_merge_symbols): Drop useless definitions that resolved externally. gcc/testsuite/ Backport from trunk r249224. 2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> PR lto/69866 * gcc.dg/lto/pr69866_0.c: New test. * gcc.dg/lto/pr69866_1.c: Likewise. Change-Id: I9941d78f3e5d159cf0e93149515e606a004c402b
2017-08-16 gcc/Yvan Roux
Backport from trunk r249702. 2017-06-27 Michael Collison <michael.collison@arm.com> * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Directly call aarch64_split_simd_combine. * (aarch64_combine_internal<mode>): Delete pattern. * config/aarch64/aarch64.c (aarch64_split_simd_combine): Allow register and subreg operands. Change-Id: I086740de7c8439367d26e00844f1539b6d4cd1cf
2017-08-16 gcc/Yvan Roux
Backport from trunk r249458. 2017-06-21 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-cores.def (thunderxt88p1): Use thunderxt88 tunings. (thunderxt88): Likewise. * config/aarch64/aarch64.c (thunderxt88_prefetch_tune): New variable. (thunderx_prefetch_tune): New variable. (thunderx2t99_prefetch_tune): Update for the correct values. (thunderxt88_tunings): New variable. (thunderx_tunings): Use thunderx_prefetch_tune instead of generic_prefetch_tune. (thunderx2t99_tunings): Use AUTOPREFETCHER_WEAK. Change-Id: I3fbe505acb4e5feddf2bbe7cfb31540a6b63614c
2017-08-16 gcc/Yvan Roux
Backport from trunk r249457. 2017-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse, SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z. (aarch64_compare_and_swap<mode>_lse, GPI): Likewise. (aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2. (aarch64_atomic_cas<mode>, GPI): Likewise. Change-Id: Ifbe7f876c2a74f2ac7a7a16ec1ae793375cd8290
2017-08-16 gcc/Yvan Roux
Backport from trunk r249444. 2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.md (movti_aarch64): Emit mov rather than orr. (movtf_aarch64): Likewise. * config/aarch64/aarch64-simd.md (aarch64_simd_mov): Emit mov rather than orr. Change-Id: I229490d5297d77c1fac7a892042493c8b40288b9
2017-08-16 gcc/Yvan Roux
Backport from trunk r249443. 2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64-simd.md (aarch64_simd_dup): Swap alternatives, make integer dup more expensive. Change-Id: Ia9b1350d72359b195ffb7cb06c03101b8120a4a6
2017-08-16 gcc/Yvan Roux
Backport from trunk r249414. 2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-option-extensions.def (rcpc): New. * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. gcc/ Backport from trunk r249923. 2017-07-03 James Greenhalgh <james.greenhalgh@arm.com> * doc/invoke.texi (rcpc architecture extension): Document it. Change-Id: Ie75a68d08d0a55deaabd2b8ce314a5b2f123a8ce
2017-08-16 gcc/Yvan Roux
Backport from trunk r249223. 2017-06-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * emit-rtl.h (is_leaf): Update comment about local register allocator. Change-Id: I59ff8f55c7c3e870ba71e6500abb7282525559f4
2017-08-16 gcc/testsuite/Yvan Roux
Backport from trunk r249215. 2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/its.c: Check that no IT blocks has more than 2 instructions in it rather than the number of IT blocks being 2. Transfer scan directive arm_thumb2 restriction to the whole testcase and restrict further to Thumb-only targets. Change-Id: I0ab4755509b3d662eb7599f9169048ec35b271e9
2017-08-16 gcc/Yvan Roux
Backport from trunk r249200. 2017-06-14 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/cortex-a53.md (cortex_a53_fpalu) Adjust latency. (cortex_a53_fconst): Likewise. (cortex_a53_fpmul): Likewise. (cortex_a53_f_load_64): Likewise. (cortex_a53_f_load_many): Likewise. (cortex_a53_advsimd_alu): Likewise. (cortex_a53_advsimd_alu_q): Likewise. (cortex_a53_advsimd_mul): Likewise. (cortex_a53_advsimd_mul_q): Likewise. (fpmac bypass): Add new bypass for fpmac-fpmac case. Add missing fmul, r2f_cvt and fconst cases. Change-Id: I258a4aa9e9f490f9cd0583624aee54d8143d8802
2017-08-16 gcc/testsuite/Yvan Roux
Backport from trunk r249122. gcc/testsuite/ 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Disable on softfloat. gcc/testsuite/ Backport from trunk r249125. 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Require arm_v8_vfp_ok. gcc/testsuite/ Backport from trunk r249148. 2017-06-13 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Require arm_arch_v8a_ok and add march option. gcc/testsuite/ Backport from trunk r249214. 2017-06-15 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: Use dg-add-options. Change-Id: Ib87a32b829d97ad3e348e54fe3de734dbe75fff0
2017-08-16 gcc/Yvan Roux
Backport from trunk r249064. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): New. gcc/testsuite/ Backport from trunk r249064. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/lrint-matherr.h: New. * gcc.target/aarch64/inline-lrint_1.c: New. * gcc.target/aarch64/inline-lrint_2.c: New. * gcc.target/aarch64/no-inline-lrint_1.c: New. * gcc.target/aarch64/no-inline-lrint_2.c: New. gcc/testsuite/ Backport from trunk r249127. 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/inline-lrint_1.c: Broaden regexp. * gcc.target/aarch64/inline-lrint_2.c: Likewise. * gcc.target/aarch64/no-inline-lrint_1.c: Likewise. * gcc.target/aarch64/no-inline-lrint_2.c: Likewise. Change-Id: I5c26605abbf9a0e2e9c7e5d6969f289db7b03c52
2017-08-10 gcc/testsuite/Yvan Roux
Backport from trunk r249059. 2017-06-09 Thomas Preud'homme <thomas.preudhomme@arm.com> * lib/target-supports.exp (check_effective_target_arm_arch_FUNC_ok): Test for null definitions instead of them being undefined. Add entry for ARMv7VE. Reindent entry for ARMv8-M Baseline. Add comment warning about using the effective target for architecture extension. (check_effective_target_arm_arch_v7ve_ok): Remove. (add_options_for_arm_arch_v7ve): Likewise. Change-Id: Ib0d56ddaa32372dfbf12e1aa979aa6e15f51132a
2017-07-11 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-07-11Make Linaro GCC Snapshot 7.1-2017.07.linaro-snapshot-7.1-2017.07TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-07-07Merge branches/gcc-7-branch rev 250046.Yvan Roux
Change-Id: Iab4acacc1408cb2f8e03dd1d07ec9241c762f83a
2017-07-06 gcc/testsuite/Yvan Roux
Backport from trunk r249592. 2017-06-22 Jeff Law <law@redhat.com> * gcc.c-torture/compile/stack-check-1.c: Require "untyped_assembly". gcc/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * doc/sourcebuild.texi (Test Directives, Variants of dg-require-support): Add documentation for dg-require-stack-check. gcc/testsuite/ Backport from trunk r250013. 2017-07-06 Christophe Lyon <christophe.lyon@linaro.org> * lib/target-supports-dg.exp (dg-require-stack-check): New. * lib/target-supports.exp (check_stack_check_available): New. * g++.dg/other/i386-9.C: Add dg-require-stack-check. * gcc.c-torture/compile/stack-check-1.c: Likewise. * gcc.dg/graphite/run-id-pr47653.c: Likewise. * gcc.dg/pr47443.c: Likewise. * gcc.dg/pr48134.c: Likewise. * gcc.dg/pr70017.c: Likewise. * gcc.target/aarch64/stack-checking.c: Likewise. * gcc.target/arm/stack-checking.c: Likewise. * gcc.target/i386/pr48723.c: Likewise. * gcc.target/i386/pr55672.c: Likewise. * gcc.target/i386/pr67265-2.c: Likewise. * gcc.target/i386/pr67265.c: Likewise. * gnat.dg/opt49.adb: Likewise. * gnat.dg/stack_check1.adb: Likewise. * gnat.dg/stack_check2.adb: Likewise. * gnat.dg/stack_check3.adb: Likewise. Change-Id: Id58d7c3b5ed694745901b0057254635821dbfe3e
2017-07-06 gcc/Yvan Roux
Backport from trunk r248924. 2017-06-06 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * dbgcnt.def (prefetch): New debug counter. * tree-ssa-loop-prefetch.c (dbgcnt.h): New include. (schedule_prefetches): Stop issueing prefetches if debug counter tripped. gcc/ Backport from trunk r248925. 2017-06-06 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * tree-ssa-loop-prefetch.c (struct mem_ref_group, struct mem_ref): New "uid" fields to hold pretty-print IDs of group and ref. Memory references are now identified as <group_id>:<ref_id> instead of using [random] addresses. (dump_mem_details): Simplify, no functional change. (dump_mem_ref): Simplify and make output more concise. Replace couple of fprintf's throughout code with calls to dump_mem_ref. (find_or_create_group): Initialize group uid. (record_ref): Initialize ref uid. Improve debug output. (prune_group_by_reuse, should_issue_prefetch_p,) (should_issue_prefetch_p, schedule_prefetches, issue_prefetch_ref,) (mark_nontemporal_store, determine_loop_nest_reuse): Improve debug output. gcc/ Backport from trunk r249240. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): New tune structure. (struct tune_params): Use cpu_prefetch_tune instead of cache_line_size. [Unrelated to main purpose of the patch] Place the pointer field last to enable type checking errors when tune structure are wrongly merged. * config/aarch64/aarch64.c (generic_prefetch_tune,) (exynosm1_prefetch_tune, qdf24xx_prefetch_tune,) (thunderx2t99_prefetch_tune): New tune constants. (tune_params *_tunings): Update all tunings (no functional change). (aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES, PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE from tunings structures. gcc/ Backport from trunk r249241. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64.c (aarch64_override_options_internal): Set flag_prefetch_loop_arrays according to tuning data. gcc/ Backport from trunk r249242. 2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> * config/aarch64/aarch64.c (qdf24xx_prefetch_tune): Update prefetch settings, and enable prefetching by default at -O3. Change-Id: I573ac2d3e1bdb11088c050711dd18bf5119f4d6f
2017-07-05 gcc/Yvan Roux
Backport from trunk r249272. 2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> PR target/71778 * config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET if given a non-constant argument for an intrinsic which requires a constant. gcc/testsuite/ Backport from trunk r249272. 2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> PR target/71778 * gcc.target/arm/pr71778.c: New. Change-Id: If82ba60fc82a4fb3b758b831d43fb49d263548e5
2017-07-05 gcc/Yvan Roux
Backport from trunk r249187. 2017-06-14 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> PR target/71663 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Improve vector initialization code gen for only variable case. gcc/testsuite/ Backport from trunk r249187. 2017-06-14 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> PR target/71663 * gcc.target/aarch64/vect-init-1.c: Newtestcase. * gcc.target/aarch64/vect-init-2.c: Likewise. * gcc.target/aarch64/vect-init-3.c: Likewise. * gcc.target/aarch64/vect-init-4.c: Likewise. * gcc.target/aarch64/vect-init-5.c: Likewise. Change-Id: I01b2eba2e1be6cde59cad5a987978a412610a145
2017-07-05 gcc/Yvan Roux
Backport from trunk r248953. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.c (aarch64_rtx_costs): Make sdiv more expensive than udiv. Remove floating point cases from mod. gcc/testsuite/ Backport from trunk r248953. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/sdiv_costs_1.c: New. gcc/ Backport from trunk r249062. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * config/arm/arm.c (arm_rtx_costs_internal): Make sdiv more expensive than udiv. gcc/testsuite/ Backport from trunk r249062. 2017-06-09 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/sdiv_costs_1.c: New. Change-Id: I503544ca95e8fc28ab9bb9b0060ea90fe557d2e6
2017-07-05 gcc/Yvan Roux
Backport from trunk r248870. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.md (sub<mode>3_compare1_imm): New define_insn. (peephole2): New peephole2 to emit the above. * config/aarch64/predicates.md (aarch64_sub_immediate): New predicate. gcc/testsuite/ Backport from trunk r248870. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/subs_compare_2.c: New test. Change-Id: I2c563b493aaba9a179d7048427ba5fcb444ec89b
2017-07-05 gcc/Yvan Roux
Backport from trunk r248951. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * config/arm/aarch-cost-tables.h (cortexa53_extra_cost): Increase idiv cost. Change-Id: If6a941740325228fc83b1a19ad1aa3f4e4e410cb
2017-07-05 gcc/Yvan Roux
Backport from trunk r248949. 2017-06-07 Tamar Christina <tamar.christina@arm.com> * config/aarch64/aarch64.md (copysignsf3): Fix mask generation. Change-Id: Idcb0fb6c0d588373bd3aaf71e172524e27023d94
2017-07-05 gcc/Yvan Roux
Backport from trunk r248921. 2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/atomics.md (atomic_compare_and_swap<mode> expander): Use aarch64_reg_or_zero predicate for operand 4. (aarch64_compare_and_swap<mode> define_insn_and_split): Use aarch64_reg_or_zero predicate for operand 3. Add 'Z' constraint. (aarch64_store_exclusive<mode>): Likewise for operand 2. gcc/testsuite/ Backport from trunk r248921. 2017-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/atomic_cmp_exchange_zero_reg_1.c: New test. Change-Id: Ic89ac52659f74e8583e5c2b82854fe31025d8d4c
2017-07-05 gcc/Yvan Roux
Backport from trunk r248880. 2017-06-05 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.h: explain F symbol found in description of ARM register allocation in its legend. Change-Id: I44c0d01dd561a86af5e0f3103f157e11bf55cd83
2017-07-05 gcc/Yvan Roux
Backport from trunk r248871. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64-simd.md (aarch64_store_lane0<mode>): New pattern. gcc/testsuite/ Backport from trunk r248871. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/store_lane0_str_1.c: New test. Change-Id: I58233d4c8c860ac0b22ecf0dbb5eac879fed4ec7
2017-07-05 gcc/Yvan Roux
Backport from trunk r248869. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (define_peephole2 above *sub_<shift>_<mode>): New peephole. gcc/testsuite/ Backport from trunk r248869. 2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/subs_compare_1.c: New test. Change-Id: Ia337ef4b86f37b2c9b22fa412b5298f9961d502d
2017-07-04 gcc/Yvan Roux
Backport from trunk r248836. 2017-06-02 Sudakshina Das <sudi.das@arm.com> * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for comparision with zero. gcc/testsuite/ Backport from trunk r248836. 2017-06-02 Sudakshina Das <sudi.das@arm.com> * gcc.target/aarch64/cmp_shifted_reg_1.c: New. Change-Id: I12a9b3a5a33d0fced8fccf00f8d038fadcdad317
2017-07-04 gcc/Yvan Roux
Backport from trunk r248835. 2017-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64-simd.md (*aarch64_simd_vec_copy_lane<mode>): Use VALL_F16 iterator rather than VALL. gcc/testsuite/ Backport from trunk r248835. 2017-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/hfmode_ins_1.c: New test. Change-Id: I26adf1e6306569075d6130792b76881a538943aa
2017-07-04 gcc/Yvan Roux
Backport from trunk r248056. 2017-05-15 Renlin Li <renlin.li@arm.com> * config/aarch64/aarch64-protos.h (aarch64_expand_call): Declare. * config/aarch64/aarch64.c (aarch64_expand_call): Define. * config/aarch64/constraints.md (Usf): Add long call check. * config/aarch64/aarch64.md (call): Use aarch64_expand_call. (call_value): Likewise. (sibcall): Likewise. (sibcall_value): Likewise. (call_insn): New. (call_value_insn): New. (sibcall_insn): Update rtx pattern. (sibcall_value_insn): Likewise. (call_internal): Remove. (call_value_internal): Likewise. (sibcall_internal): Likewise. (sibcall_value_internal): Likewise. (call_reg): Likewise. (call_symbol): Likewise. (call_value_reg): Likewise. (call_value_symbol): Likewise. Change-Id: Ib1ed477ff34808d3299f29c1cc3fc950116fd7cc
2017-07-04 gcc/Yvan Roux
Backport from trunk r248090. 2017-05-16 Matthew Wahab <matthew.wahab@arm.com> * config/arm/arm_neon.h (vadd_f16): Use standard arithmetic operations in fast-math mode. (vaddq_f16): Likewise. (vmul_f16): Likewise. (vmulq_f16): Likewise. (vsub_f16): Likewise. (vsubq_f16): Likewise. * config/arm/neon.md (add<mode>3): New. (sub<mode>3): New. (fma:<VH:mode>3): New. Also remove outdated comment. (mul<mode>3): New. gcc/testsuite/ Backport from trunk r248090. 2016-05-16 Matthew Wahab <matthew.wahab@arm.com> * gcc.target/arm/armv8_2-fp16-arith-1.c: Expand comment. Update expected output of vadd, vsub and vmul instructions. * gcc.target/arm/armv8_2-fp16-arith-2.c: New. * gcc.target/arm/armv8_2-fp16-neon-2.c: New. * gcc.target/arm/armv8_2-fp16-neon-3.c: New. gcc/testsuite/ Backport from trunk r248117. 2017-05-16 Tamar Christina <tamar.christina@arm.com> * gcc.target/arm/armv8_2-fp16-neon-1.c (vceqz): Fix regex. * gcc.target/arm/armv8_2-fp16-neon-2.c (vceqz): Fix regex. Change-Id: I1fae8f0e438aa39f7e9f08d3470a7c60e13c3661
2017-07-04 gcc/Yvan Roux
Backport from trunk r248832. 2017-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_split_compare_and_swap): Emit CBNZ inside loop when doing a strong exchange and comparing against zero. Generate the CC flags after the loop. gcc/testsuite/ Backport from trunk r248832. 2017-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/atomic_cmp_exchange_zero_strong_1.c: New test. Change-Id: Ic9e9a50e6b512b3f6d95d679498a3207fcf98e90
2017-07-04 gcc/Yvan Roux
Backport from trunk r248686. 2017-05-30 Wilco Dijkstra <wdijkstr@arm.com> * config/arm/arm-builtins.c (arm_expand_builtin): Remove const. Change-Id: I7bc4c56616142b63f297585c0cbe18e2eeae6cc2
2017-07-04 gcc/Yvan Roux
Backport from trunk r248419. 2017-05-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_expand_prologue): Fix typo in comment. Change-Id: Ic138100f04b52a7e987271725b395203cac78ddc
2017-07-04 gcc/testsuite/Yvan Roux
Backport from trunk r248326. 2017-05-22 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/movsi_movt.c: New test. * gcc.target/arm/movdi_movt.c: New test. Change-Id: I57d45e31f2d9ddd202a89b19914c12e722514bc5
2017-07-03 gcc/Yvan Roux
Backport from trunk r248142. 2017-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (cmse_nonsecure_call_clear_caller_saved): Refer readers to __gnu_cmse_nonsecure_call libcall for saving, clearing and restoring of callee-saved registers. Change-Id: I58198345770e4f505b5040886d1a19df315a3c5d
2017-06-23 gcc/Yvan Roux
Backport from trunk r249566. 2017-06-22 Jeff Law <law@redhat.com> * config/aarch64/aarch64.c (aarch64_emit_probe_stack_range): Handle frame sizes that do not satisfy aarch64_uimm12_shift. gcc/testsuite/ Backport from trunk r249566. 2017-06-22 Jeff Law <law@redhat.com> * gcc.c-torture/compile/stack-check-1.c: New test. Change-Id: Iaa6512d9df10be7e5bca657e6713b5450b9755f6
2017-06-15 gcc/TCWG Automation
* LINARO-VERSION: Bump version number, post snapshot.
2017-06-15Make Linaro GCC Snapshot 7.1-2017.06.linaro-snapshot-7.1-2017.06TCWG Automation
gcc/ * LINARO-VERSION: Update.
2017-06-14Merge branches/gcc-7-branch rev 249190.Yvan Roux
Change-Id: I29353b553aba293581d8240e44db829cdc51b308
2017-06-14 gcc/Yvan Roux
Backport from trunk r247640. 2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com> Prakhar Bahuguna <prakhar.bahuguna@arm.com> PR target/71607 * config/arm/arm.md (use_literal_pool): Remove. (64-bit immediate split): No longer takes cost into consideration if arm_disable_literal_pool is enabled. * config/arm/arm.c (arm_tls_referenced_p): Add diagnostic if TLS is used when arm_disable_literal_pool is enabled. (arm_max_const_double_inline_cost): Remove use of arm_disable_literal_pool. (push_minipool_fix): Add assert. (arm_reorg): Add return if arm_disable_literal_pool is enabled. * config/arm/vfp.md (no_literal_pool_df_immediate): New. (no_literal_pool_sf_immediate): New. gcc/testsuite/ Backport from trunk r247640. 2017-05-05 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> Prakhar Bahuguna <prakhar.bahuguna@arm.com> PR target/71607 * gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ... * gcc.target/arm/thumb2-slow-flash-data-1.c: ... this. * gcc.target/arm/thumb2-slow-flash-data-2.c: New. * gcc.target/arm/thumb2-slow-flash-data-3.c: New. * gcc.target/arm/thumb2-slow-flash-data-4.c: New. * gcc.target/arm/thumb2-slow-flash-data-5.c: New. * gcc.target/arm/tls-disable-literal-pool.c: New. gcc/testsuite/ Backport from trunk r248270. 2017-05-19 Prakhar Bahuguna <prakhar.bahuguna@arm.com> * gcc.target/arm/tls-disable-literal-pool.c: Change require-effective-target to tls_native. Move dg-error to return statement line and change to dg-message. Change-Id: Iaf511ad6cc8bf110c76f41831aaf14558792dca9
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