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-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c10
-rw-r--r--gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c10
132 files changed, 1320 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c
new file mode 100644
index 00000000000..a61813bb45a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x2x2_t
+f_vld2_lane_f32 (float32_t * p, float32x2x2_t v)
+{
+ float32x2x2_t res;
+ res = vld2_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c
new file mode 100644
index 00000000000..4938fd3c04e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x1x2_t
+f_vld2_lane_f64 (float64_t * p, float64x1x2_t v)
+{
+ float64x1x2_t res;
+ res = vld2_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c
new file mode 100644
index 00000000000..496602fb2de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x8x2_t
+f_vld2_lane_p8 (poly8_t * p, poly8x8x2_t v)
+{
+ poly8x8x2_t res;
+ res = vld2_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c
new file mode 100644
index 00000000000..435714df612
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x4x2_t
+f_vld2_lane_s16 (int16_t * p, int16x4x2_t v)
+{
+ int16x4x2_t res;
+ res = vld2_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c
new file mode 100644
index 00000000000..8711af2b1a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x2x2_t
+f_vld2_lane_s32 (int32_t * p, int32x2x2_t v)
+{
+ int32x2x2_t res;
+ res = vld2_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c
new file mode 100644
index 00000000000..36a9d9d40dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x1x2_t
+f_vld2_lane_s64 (int64_t * p, int64x1x2_t v)
+{
+ int64x1x2_t res;
+ res = vld2_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c
new file mode 100644
index 00000000000..8fe03220945
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x8x2_t
+f_vld2_lane_s8 (int8_t * p, int8x8x2_t v)
+{
+ int8x8x2_t res;
+ res = vld2_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c
new file mode 100644
index 00000000000..8747f813688
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x4x2_t
+f_vld2_lane_u16 (uint16_t * p, uint16x4x2_t v)
+{
+ uint16x4x2_t res;
+ res = vld2_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c
new file mode 100644
index 00000000000..db051192639
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x2x2_t
+f_vld2_lane_u32 (uint32_t * p, uint32x2x2_t v)
+{
+ uint32x2x2_t res;
+ res = vld2_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c
new file mode 100644
index 00000000000..e13ec86c95d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x1x2_t
+f_vld2_lane_u64 (uint64_t * p, uint64x1x2_t v)
+{
+ uint64x1x2_t res;
+ res = vld2_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld2_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c
new file mode 100644
index 00000000000..f565969a6ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x8x2_t
+f_vld2_lane_u8 (uint8_t * p, uint8x8x2_t v)
+{
+ uint8x8x2_t res;
+ res = vld2_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..1b145e3c8c6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x4x2_t
+f_vld2q_lane_f32 (float32_t * p, float32x4x2_t v)
+{
+ float32x4x2_t res;
+ res = vld2q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..f66a309c3c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x2x2_t
+f_vld2q_lane_f64 (float64_t * p, float64x2x2_t v)
+{
+ float64x2x2_t res;
+ res = vld2q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..5b3661d7a6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x16x2_t
+f_vld2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
+{
+ poly8x16x2_t res;
+ res = vld2q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..6dcd8aedcdd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x8x2_t
+f_vld2q_lane_s16 (int16_t * p, int16x8x2_t v)
+{
+ int16x8x2_t res;
+ res = vld2q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..373c2e31db8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x4x2_t
+f_vld2q_lane_s32 (int32_t * p, int32x4x2_t v)
+{
+ int32x4x2_t res;
+ res = vld2q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..4f6b3d329b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x2x2_t
+f_vld2q_lane_s64 (int64_t * p, int64x2x2_t v)
+{
+ int64x2x2_t res;
+ res = vld2q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..889435bffe0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x16x2_t
+f_vld2q_lane_s8 (int8_t * p, int8x16x2_t v)
+{
+ int8x16x2_t res;
+ res = vld2q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..cf5ff434918
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x8x2_t
+f_vld2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
+{
+ uint16x8x2_t res;
+ res = vld2q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..eab1cfb302f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x4x2_t
+f_vld2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
+{
+ uint32x4x2_t res;
+ res = vld2q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..f2db54ed515
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x2x2_t
+f_vld2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
+{
+ uint64x2x2_t res;
+ res = vld2q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..33a2ce36b98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld2q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x16x2_t
+f_vld2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
+{
+ uint8x16x2_t res;
+ res = vld2q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld2q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c
new file mode 100644
index 00000000000..88a4e7710a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x2x3_t
+f_vld3_lane_f32 (float32_t * p, float32x2x3_t v)
+{
+ float32x2x3_t res;
+ res = vld3_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c
new file mode 100644
index 00000000000..eabb865f655
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x1x3_t
+f_vld3_lane_f64 (float64_t * p, float64x1x3_t v)
+{
+ float64x1x3_t res;
+ res = vld3_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c
new file mode 100644
index 00000000000..e0e3350c222
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x8x3_t
+f_vld3_lane_p8 (poly8_t * p, poly8x8x3_t v)
+{
+ poly8x8x3_t res;
+ res = vld3_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c
new file mode 100644
index 00000000000..693c99b0853
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x4x3_t
+f_vld3_lane_s16 (int16_t * p, int16x4x3_t v)
+{
+ int16x4x3_t res;
+ res = vld3_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c
new file mode 100644
index 00000000000..44d0e337c88
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x2x3_t
+f_vld3_lane_s32 (int32_t * p, int32x2x3_t v)
+{
+ int32x2x3_t res;
+ res = vld3_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c
new file mode 100644
index 00000000000..eb2daf21c91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x1x3_t
+f_vld3_lane_s64 (int64_t * p, int64x1x3_t v)
+{
+ int64x1x3_t res;
+ res = vld3_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c
new file mode 100644
index 00000000000..3c2efe96072
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x8x3_t
+f_vld3_lane_s8 (int8_t * p, int8x8x3_t v)
+{
+ int8x8x3_t res;
+ res = vld3_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c
new file mode 100644
index 00000000000..eafeefe8a24
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x4x3_t
+f_vld3_lane_u16 (uint16_t * p, uint16x4x3_t v)
+{
+ uint16x4x3_t res;
+ res = vld3_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c
new file mode 100644
index 00000000000..2e5f029ac9c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x2x3_t
+f_vld3_lane_u32 (uint32_t * p, uint32x2x3_t v)
+{
+ uint32x2x3_t res;
+ res = vld3_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c
new file mode 100644
index 00000000000..8a164735053
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x1x3_t
+f_vld3_lane_u64 (uint64_t * p, uint64x1x3_t v)
+{
+ uint64x1x3_t res;
+ res = vld3_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld3_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c
new file mode 100644
index 00000000000..6cc821472fb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x8x3_t
+f_vld3_lane_u8 (uint8_t * p, uint8x8x3_t v)
+{
+ uint8x8x3_t res;
+ res = vld3_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..50c9f444bfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x4x3_t
+f_vld3q_lane_f32 (float32_t * p, float32x4x3_t v)
+{
+ float32x4x3_t res;
+ res = vld3q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..a516ce76c1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x2x3_t
+f_vld3q_lane_f64 (float64_t * p, float64x2x3_t v)
+{
+ float64x2x3_t res;
+ res = vld3q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..93aa7840091
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x16x3_t
+f_vld3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
+{
+ poly8x16x3_t res;
+ res = vld3q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..6e570ec6a48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x8x3_t
+f_vld3q_lane_s16 (int16_t * p, int16x8x3_t v)
+{
+ int16x8x3_t res;
+ res = vld3q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..f7e58da2949
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x4x3_t
+f_vld3q_lane_s32 (int32_t * p, int32x4x3_t v)
+{
+ int32x4x3_t res;
+ res = vld3q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..9d6bb50da76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x2x3_t
+f_vld3q_lane_s64 (int64_t * p, int64x2x3_t v)
+{
+ int64x2x3_t res;
+ res = vld3q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..a450c17debd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x16x3_t
+f_vld3q_lane_s8 (int8_t * p, int8x16x3_t v)
+{
+ int8x16x3_t res;
+ res = vld3q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..459a5175bbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x8x3_t
+f_vld3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
+{
+ uint16x8x3_t res;
+ res = vld3q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..2657553b42d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x4x3_t
+f_vld3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
+{
+ uint32x4x3_t res;
+ res = vld3q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..92e717b0a71
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x2x3_t
+f_vld3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
+{
+ uint64x2x3_t res;
+ res = vld3q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..273543c7daa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld3q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x16x3_t
+f_vld3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
+{
+ uint8x16x3_t res;
+ res = vld3q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld3q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c
new file mode 100644
index 00000000000..38a458f797e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x2x4_t
+f_vld4_lane_f32 (float32_t * p, float32x2x4_t v)
+{
+ float32x2x4_t res;
+ res = vld4_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c
new file mode 100644
index 00000000000..b0ca390fb00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x1x4_t
+f_vld4_lane_f64 (float64_t * p, float64x1x4_t v)
+{
+ float64x1x4_t res;
+ res = vld4_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c
new file mode 100644
index 00000000000..864598bbc6c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x8x4_t
+f_vld4_lane_p8 (poly8_t * p, poly8x8x4_t v)
+{
+ poly8x8x4_t res;
+ res = vld4_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c
new file mode 100644
index 00000000000..ef545fe269c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x4x4_t
+f_vld4_lane_s16 (int16_t * p, int16x4x4_t v)
+{
+ int16x4x4_t res;
+ res = vld4_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c
new file mode 100644
index 00000000000..60d8a623414
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x2x4_t
+f_vld4_lane_s32 (int32_t * p, int32x2x4_t v)
+{
+ int32x2x4_t res;
+ res = vld4_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c
new file mode 100644
index 00000000000..5f12dcd2055
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x1x4_t
+f_vld4_lane_s64 (int64_t * p, int64x1x4_t v)
+{
+ int64x1x4_t res;
+ res = vld4_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c
new file mode 100644
index 00000000000..39c8ec71fa6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x8x4_t
+f_vld4_lane_s8 (int8_t * p, int8x8x4_t v)
+{
+ int8x8x4_t res;
+ res = vld4_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c
new file mode 100644
index 00000000000..d1c2984f54e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x4x4_t
+f_vld4_lane_u16 (uint16_t * p, uint16x4x4_t v)
+{
+ uint16x4x4_t res;
+ res = vld4_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c
new file mode 100644
index 00000000000..55d002da6dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x2x4_t
+f_vld4_lane_u32 (uint32_t * p, uint32x2x4_t v)
+{
+ uint32x2x4_t res;
+ res = vld4_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c
new file mode 100644
index 00000000000..e5d05a6668b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x1x4_t
+f_vld4_lane_u64 (uint64_t * p, uint64x1x4_t v)
+{
+ uint64x1x4_t res;
+ res = vld4_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ res = vld4_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c
new file mode 100644
index 00000000000..76975e2da04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x8x4_t
+f_vld4_lane_u8 (uint8_t * p, uint8x8x4_t v)
+{
+ uint8x8x4_t res;
+ res = vld4_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..695f0c5ba7b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float32x4x4_t
+f_vld4q_lane_f32 (float32_t * p, float32x4x4_t v)
+{
+ float32x4x4_t res;
+ res = vld4q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..c92f99d55aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+float64x2x4_t
+f_vld4q_lane_f64 (float64_t * p, float64x2x4_t v)
+{
+ float64x2x4_t res;
+ res = vld4q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..10430be6ea9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+poly8x16x4_t
+f_vld4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
+{
+ poly8x16x4_t res;
+ res = vld4q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..a75e659d28f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int16x8x4_t
+f_vld4q_lane_s16 (int16_t * p, int16x8x4_t v)
+{
+ int16x8x4_t res;
+ res = vld4q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..90c92e69eaa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int32x4x4_t
+f_vld4q_lane_s32 (int32_t * p, int32x4x4_t v)
+{
+ int32x4x4_t res;
+ res = vld4q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..408829cde79
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int64x2x4_t
+f_vld4q_lane_s64 (int64_t * p, int64x2x4_t v)
+{
+ int64x2x4_t res;
+ res = vld4q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..6720becb02a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+int8x16x4_t
+f_vld4q_lane_s8 (int8_t * p, int8x16x4_t v)
+{
+ int8x16x4_t res;
+ res = vld4q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..a98c34787b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint16x8x4_t
+f_vld4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
+{
+ uint16x8x4_t res;
+ res = vld4q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..d006309c4f7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint32x4x4_t
+f_vld4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
+{
+ uint32x4x4_t res;
+ res = vld4q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..350225ebbdf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint64x2x4_t
+f_vld4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
+{
+ uint64x2x4_t res;
+ res = vld4q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..44637bf693f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+uint8x16x4_t
+f_vld4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
+{
+ uint8x16x4_t res;
+ res = vld4q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ res = vld4q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return res;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c
new file mode 100644
index 00000000000..7a8abb1e1fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_f32 (float32_t * p, float32x2x2_t v)
+{
+ vst2_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c
new file mode 100644
index 00000000000..a7edae2aeb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_f64 (float64_t * p, float64x1x2_t v)
+{
+ vst2_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c
new file mode 100644
index 00000000000..4e6af79b044
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_p8 (poly8_t * p, poly8x8x2_t v)
+{
+ vst2_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c
new file mode 100644
index 00000000000..e6b9be348ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_s16 (int16_t * p, int16x4x2_t v)
+{
+ vst2_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c
new file mode 100644
index 00000000000..03c4cb0813c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_s32 (int32_t * p, int32x2x2_t v)
+{
+ vst2_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c
new file mode 100644
index 00000000000..9f49ced2d2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_s64 (int64_t * p, int64x1x2_t v)
+{
+ vst2_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c
new file mode 100644
index 00000000000..74f7ce491be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_s8 (int8_t * p, int8x8x2_t v)
+{
+ vst2_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c
new file mode 100644
index 00000000000..0d1fd7c5f54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_u16 (uint16_t * p, uint16x4x2_t v)
+{
+ vst2_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c
new file mode 100644
index 00000000000..eb5482e0971
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_u32 (uint32_t * p, uint32x2x2_t v)
+{
+ vst2_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c
new file mode 100644
index 00000000000..36d37830d3a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_u64 (uint64_t * p, uint64x1x2_t v)
+{
+ vst2_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst2_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c
new file mode 100644
index 00000000000..1de064a5778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2_lane_u8 (uint8_t * p, uint8x8x2_t v)
+{
+ vst2_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..d0b25f19509
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_f32 (float32_t * p, float32x4x2_t v)
+{
+ vst2q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..af34ae7121e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_f64 (float64_t * p, float64x2x2_t v)
+{
+ vst2q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..89bd1b85b7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
+{
+ vst2q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..fe67496b695
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_s16 (int16_t * p, int16x8x2_t v)
+{
+ vst2q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..e60a4a8a0b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_s32 (int32_t * p, int32x4x2_t v)
+{
+ vst2q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..4bcdc8b6377
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_s64 (int64_t * p, int64x2x2_t v)
+{
+ vst2q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..78b5e69149e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_s8 (int8_t * p, int8x16x2_t v)
+{
+ vst2q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..025d83db5e9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
+{
+ vst2q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst2q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..54a0c108cca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
+{
+ vst2q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst2q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..2d2cb533ec2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
+{
+ vst2q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst2q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..9172e001803
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst2q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
+{
+ vst2q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst2q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c
new file mode 100644
index 00000000000..f5b016734a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_f32 (float32_t * p, float32x2x3_t v)
+{
+ vst3_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c
new file mode 100644
index 00000000000..e7607e7e310
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_f64 (float64_t * p, float64x1x3_t v)
+{
+ vst3_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c
new file mode 100644
index 00000000000..aebcc76ec58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_p8 (poly8_t * p, poly8x8x3_t v)
+{
+ vst3_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c
new file mode 100644
index 00000000000..abd2496e4a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_s16 (int16_t * p, int16x4x3_t v)
+{
+ vst3_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c
new file mode 100644
index 00000000000..5f810c39546
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_s32 (int32_t * p, int32x2x3_t v)
+{
+ vst3_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c
new file mode 100644
index 00000000000..c76ac6e558a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_s64 (int64_t * p, int64x1x3_t v)
+{
+ vst3_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c
new file mode 100644
index 00000000000..3e1d75705ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_s8 (int8_t * p, int8x8x3_t v)
+{
+ vst3_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c
new file mode 100644
index 00000000000..c58bd70a610
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_u16 (uint16_t * p, uint16x4x3_t v)
+{
+ vst3_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c
new file mode 100644
index 00000000000..9e53e204560
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_u32 (uint32_t * p, uint32x2x3_t v)
+{
+ vst3_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c
new file mode 100644
index 00000000000..c1c4aa19cf2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_u64 (uint64_t * p, uint64x1x3_t v)
+{
+ vst3_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst3_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c
new file mode 100644
index 00000000000..ff8af48e115
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3_lane_u8 (uint8_t * p, uint8x8x3_t v)
+{
+ vst3_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..a98a9a0c85f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_f32 (float32_t * p, float32x4x3_t v)
+{
+ vst3q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..0281c11771b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_f64 (float64_t * p, float64x2x3_t v)
+{
+ vst3q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..75d666cb646
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
+{
+ vst3q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..3c85372547c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_s16 (int16_t * p, int16x8x3_t v)
+{
+ vst3q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..9afdee63231
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_s32 (int32_t * p, int32x4x3_t v)
+{
+ vst3q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..e089afec5b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_s64 (int64_t * p, int64x2x3_t v)
+{
+ vst3q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..b6584ab432c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_s8 (int8_t * p, int8x16x3_t v)
+{
+ vst3q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..9985054606b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
+{
+ vst3q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst3q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..34f3b379264
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
+{
+ vst3q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst3q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..5428d3c19e8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
+{
+ vst3q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst3q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..f7fd73b1829
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst3q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
+{
+ vst3q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst3q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c
new file mode 100644
index 00000000000..29ca2a2dbbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_f32 (float32_t * p, float32x2x4_t v)
+{
+ vst4_lane_f32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c
new file mode 100644
index 00000000000..efe230d354e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_f64 (float64_t * p, float64x1x4_t v)
+{
+ vst4_lane_f64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c
new file mode 100644
index 00000000000..6a5474b5f73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_p8 (poly8_t * p, poly8x8x4_t v)
+{
+ vst4_lane_p8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c
new file mode 100644
index 00000000000..c20bcc9a2f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_s16 (int16_t * p, int16x4x4_t v)
+{
+ vst4_lane_s16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c
new file mode 100644
index 00000000000..9aafe70fe58
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_s32 (int32_t * p, int32x2x4_t v)
+{
+ vst4_lane_s32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c
new file mode 100644
index 00000000000..0db8285b12a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_s64 (int64_t * p, int64x1x4_t v)
+{
+ vst4_lane_s64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c
new file mode 100644
index 00000000000..5a70a208444
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_s8 (int8_t * p, int8x8x4_t v)
+{
+ vst4_lane_s8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c
new file mode 100644
index 00000000000..60114cb8e94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_u16 (uint16_t * p, uint16x4x4_t v)
+{
+ vst4_lane_u16 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c
new file mode 100644
index 00000000000..2e41441573b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_u32 (uint32_t * p, uint32x2x4_t v)
+{
+ vst4_lane_u32 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c
new file mode 100644
index 00000000000..d90844bb091
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_u64 (uint64_t * p, uint64x1x4_t v)
+{
+ vst4_lane_u64 (p, v, 1); /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ vst4_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c
new file mode 100644
index 00000000000..6d838668074
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4_lane_u8 (uint8_t * p, uint8x8x4_t v)
+{
+ vst4_lane_u8 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c
new file mode 100644
index 00000000000..35a10d6af14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_f32 (float32_t * p, float32x4x4_t v)
+{
+ vst4q_lane_f32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_f32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c
new file mode 100644
index 00000000000..6e202e16a1c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_f64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_f64 (float64_t * p, float64x2x4_t v)
+{
+ vst4q_lane_f64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_f64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c
new file mode 100644
index 00000000000..b4702749065
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_p8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
+{
+ vst4q_lane_p8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_p8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c
new file mode 100644
index 00000000000..bbece00caac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_s16 (int16_t * p, int16x8x4_t v)
+{
+ vst4q_lane_s16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_s16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c
new file mode 100644
index 00000000000..eaa3d0025f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_s32 (int32_t * p, int32x4x4_t v)
+{
+ vst4q_lane_s32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_s32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c
new file mode 100644
index 00000000000..0b122619d02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_s64 (int64_t * p, int64x2x4_t v)
+{
+ vst4q_lane_s64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_s64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c
new file mode 100644
index 00000000000..d3444222bcc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_s8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_s8 (int8_t * p, int8x16x4_t v)
+{
+ vst4q_lane_s8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_s8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c
new file mode 100644
index 00000000000..d74787f89d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u16_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
+{
+ vst4q_lane_u16 (p, v, 8); /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ vst4q_lane_u16 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c
new file mode 100644
index 00000000000..c85ce7ccd18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u32_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
+{
+ vst4q_lane_u32 (p, v, 4); /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
+ vst4q_lane_u32 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c
new file mode 100644
index 00000000000..84134af1ac9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u64_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
+{
+ vst4q_lane_u64 (p, v, 2); /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
+ vst4q_lane_u64 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
+ return;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c
new file mode 100644
index 00000000000..0ff9093cb63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vst4q_lane_u8_indices_1.c
@@ -0,0 +1,10 @@
+#include <arm_neon.h>
+
+
+void
+f_vst4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
+{
+ vst4q_lane_u8 (p, v, 16); /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
+ vst4q_lane_u8 (p, v, -1); /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
+ return;
+}