diff options
Diffstat (limited to 'gcc/testsuite/gcc.target')
57 files changed, 976 insertions, 51 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/pr68363_1.c b/gcc/testsuite/gcc.target/aarch64/pr68363_1.c new file mode 100644 index 00000000000..bb294b50dc0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr68363_1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-mfix-cortex-a53-835769" } */ + +int +foo (int i) +{ + switch (i) + { + case 0: + case 2: + case 5: + return 0; + case 7: + case 11: + case 13: + return 1; + } + return -1; +} diff --git a/gcc/testsuite/gcc.target/aarch64/pr70809_1.c b/gcc/testsuite/gcc.target/aarch64/pr70809_1.c new file mode 100644 index 00000000000..2e1bbf4b090 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr70809_1.c @@ -0,0 +1,18 @@ +/* PR target/70809. */ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -ffp-contract=off -mtune=generic" } */ + +/* Check that vector FMLS is not generated when contraction is disabled. */ + +void +foo (float *__restrict__ __attribute__ ((aligned (16))) a, + float *__restrict__ __attribute__ ((aligned (16))) x, + float *__restrict__ __attribute__ ((aligned (16))) y, + float *__restrict__ __attribute__ ((aligned (16))) z) +{ + unsigned i = 0; + for (i = 0; i < 256; i++) + a[i] = x[i] - (y[i] * z[i]); +} + +/* { dg-final { scan-assembler-not "fmls\tv.*" } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c new file mode 100644 index 00000000000..816d352bd6b --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7a_ok } */ +/* { dg-add-options arm_arch_v7a } */ + +#include "atomic_loaddi_acquire.x" + +/* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c new file mode 100644 index 00000000000..c54ac7743c9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } */ +/* { dg-add-options arm_arch_v7ve } */ + +#include "atomic_loaddi_acquire.x" + +/* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c new file mode 100644 index 00000000000..095c95889d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v8a_ok } */ +/* { dg-add-options arm_arch_v8a } */ + +#include "atomic_loaddi_acquire.x" + +/* { dg-final { scan-assembler-times "ldaexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "dmb\tsy" } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c new file mode 100644 index 00000000000..53667b4b665 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7a_ok } */ +/* { dg-add-options arm_arch_v7a } */ + +#include "atomic_loaddi_relaxed.x" + +/* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "dmb\tsy" } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c new file mode 100644 index 00000000000..2b9800bd281 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } */ +/* { dg-add-options arm_arch_v7ve } */ + +#include "atomic_loaddi_relaxed.x" + +/* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "dmb\tsy" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c new file mode 100644 index 00000000000..e37ca0b280c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v8a_ok } */ +/* { dg-add-options arm_arch_v8a } */ + +#include "atomic_loaddi_relaxed.x" + +/* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "dmb\tsy" } } */
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c new file mode 100644 index 00000000000..e6deb086d60 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7a_ok } */ +/* { dg-add-options arm_arch_v7a } */ + +#include "atomic_loaddi_seq_cst.x" + +/* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c new file mode 100644 index 00000000000..65530dd8b14 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v7ve_ok } */ +/* { dg-add-options arm_arch_v7ve } */ + +#include "atomic_loaddi_seq_cst.x" + +/* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c new file mode 100644 index 00000000000..3401a8eb686 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v8a_ok } */ +/* { dg-add-options arm_arch_v8a } */ + +#include "atomic_loaddi_seq_cst.x" + +/* { dg-final { scan-assembler-times "ldaexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */ +/* { dg-final { scan-assembler-not "dmb\tsy" } } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_acquire.x b/gcc/testsuite/gcc.target/arm/atomic_loaddi_acquire.x new file mode 100644 index 00000000000..28997ef565b --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_acquire.x @@ -0,0 +1,11 @@ +#include <stdatomic.h> + +atomic_ullong foo; +int glob; + +int +main (void) +{ + atomic_load_explicit (&foo, memory_order_acquire); + return glob; +} diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed.x b/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed.x new file mode 100644 index 00000000000..701b3c42c09 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed.x @@ -0,0 +1,11 @@ +#include <stdatomic.h> + +atomic_ullong foo; +int glob; + +int +main (void) +{ + atomic_load_explicit (&foo, memory_order_relaxed); + return glob; +} diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed_cond.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed_cond.c new file mode 100644 index 00000000000..d6977515081 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed_cond.c @@ -0,0 +1,20 @@ +/* { dg-do assemble } */ +/* { dg-options "-std=c11 -O" } */ +/* { dg-require-effective-target arm_arch_v8a_ok } */ +/* { dg-add-options arm_arch_v8a } */ + +/* Check that if we conditionalise the atomic load we put the condition + code in the right place to create valid assembly. */ + +#include <stdatomic.h> + +atomic_ullong foo; +int glob; + +int +main (int argc, char *argv[]) +{ + if (argc > 2) + atomic_load_explicit (&foo, memory_order_relaxed); + return glob; +} diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_seq_cst.x b/gcc/testsuite/gcc.target/arm/atomic_loaddi_seq_cst.x new file mode 100644 index 00000000000..32e78da67e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_seq_cst.x @@ -0,0 +1,11 @@ +#include <stdatomic.h> + +atomic_ullong foo; +int glob; + +int +main (void) +{ + atomic_load_explicit (&foo, memory_order_seq_cst); + return glob; +} diff --git a/gcc/testsuite/gcc.target/arm/pr67439_1.c b/gcc/testsuite/gcc.target/arm/pr67439_1.c new file mode 100644 index 00000000000..f7a6128758a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr67439_1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ +/* { dg-options "-O1 -mfp16-format=ieee -march=armv7-a -mfpu=neon -mthumb -mrestrict-it" } */ + +__fp16 h0 = -1.0; + +void +f (__fp16 *p) +{ + h0 = 1.0; +} diff --git a/gcc/testsuite/gcc.target/arm/pr67929_1.c b/gcc/testsuite/gcc.target/arm/pr67929_1.c deleted file mode 100644 index 14943b6b598..00000000000 --- a/gcc/testsuite/gcc.target/arm/pr67929_1.c +++ /dev/null @@ -1,21 +0,0 @@ -/* { dg-do run } */ -/* { dg-require-effective-target arm_vfp3_ok } */ -/* { dg-options "-O2 -fno-inline" } */ -/* { dg-add-options arm_vfp3 } */ -/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ - -int -foo (float a) -{ - return a * 4.9f; -} - - -int -main (void) -{ - if (foo (10.0f) != 49) - __builtin_abort (); - - return 0; -}
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/avr/pr71103.c b/gcc/testsuite/gcc.target/avr/pr71103.c new file mode 100644 index 00000000000..43244d15e97 --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/pr71103.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +struct ResponseStruct{ + unsigned char responseLength; + char *response; +}; + +static char response[5]; +struct ResponseStruct something(){ + struct ResponseStruct returnValue; + returnValue.responseLength = 5; + returnValue.response = response; + return returnValue; +} + diff --git a/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c new file mode 100644 index 00000000000..480ad05acab --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c @@ -0,0 +1,118 @@ +/* Use -g0 so that this test case doesn't just fail because + of PR52472. */ + +/* { dg-do compile } */ +/* { dg-options "-std=gnu99 -g0" } */ + +struct S12 +{ + char c; + const char *p; +}; + +struct S12f +{ + char c; + struct S12f (*f)(void); +}; + +struct S12labl +{ + char c; + void **labl; +}; + +struct S121 +{ + char c; + const char *p; + char d; +}; + +const char str[5] = "abcd"; + +struct S12 test_S12_0 (void) +{ + struct S12 s; + s.c = 'A'; + s.p = str; + return s; +} + +struct S12 test_S12_4 (void) +{ + struct S12 s; + s.c = 'A'; + s.p = str + 4; + return s; +} + +struct S12f test_S12f (void) +{ + struct S12f s; + s.c = 'A'; + s.f = test_S12f; + return s; +} + +struct S121 test_S121 (void) +{ + struct S121 s; + s.c = 'c'; + s.p = str + 4; + s.d = 'd'; + return s; +} + +extern void use_S12lab (struct S12labl*); + +struct S12labl test_S12lab (void) +{ + struct S12labl s; +labl:; + s.c = 'A'; + s.labl = &&labl; + return s; +} + +#ifdef __MEMX + +struct S13 +{ + char c; + const __memx char *p; +}; + +const __memx char str_x[] = "abcd"; + +struct S13 test_S13_0 (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_x; + return s; +} + +struct S13 test_S13_4a (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_x + 4; + return s; +} + +#ifdef __FLASH1 + +const __flash1 char str_1[] = "abcd"; + +struct S13 test_13_4b (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_1 + 4; + return s; +} + +#endif /* have __flash1 */ +#endif /* have __memx */ + diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr70059.c b/gcc/testsuite/gcc.target/i386/avx512f-pr70059.c new file mode 100644 index 00000000000..95c8915a93b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-pr70059.c @@ -0,0 +1,33 @@ +/* PR target/70059 */ +/* { dg-do run } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-options "-O2 -mavx512f" } */ + +#include "avx512f-check.h" + +__attribute__((noinline, noclone)) __m512i +foo (__m256i a, __m256i b) +{ + __m512i r = _mm512_undefined_si512 (); + r = _mm512_inserti64x4 (r, a, 0); + r = _mm512_inserti64x4 (r, b, 1); + return r; +} + +static void +avx512f_test (void) +{ + union256i_q a, b; + union512i_q r; + long long r_ref[8]; + int i; + for (i = 0; i < 4; i++) + { + a.a[i] = 0x0101010101010101ULL * i; + b.a[i] = 0x1010101010101010ULL * i; + r_ref[i] = a.a[i]; + r_ref[i + 4] = b.a[i]; + } + r.x = foo (a.x, b.x); + check_union512i_q (r, r_ref); +} diff --git a/gcc/testsuite/gcc.target/i386/pr67265-2.c b/gcc/testsuite/gcc.target/i386/pr67265-2.c new file mode 100644 index 00000000000..a9f2eb460ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67265-2.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fstack-check" } */ + +void foo (int n) +{ + volatile char arr[64 * 1024]; + + arr[n] = 1; +} diff --git a/gcc/testsuite/gcc.target/i386/pr67265.c b/gcc/testsuite/gcc.target/i386/pr67265.c new file mode 100644 index 00000000000..7827685fe5f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67265.c @@ -0,0 +1,12 @@ +/* PR target/67265 */ +/* Reduced testcase by Johannes Dewender <gnu@JonnyJD.net> */ + +/* { dg-do compile } */ +/* { dg-options "-O -fstack-check -fPIC" } */ + +int a, b, c, d, e; + +void foo (void) +{ + __asm__("" : "+r"(c), "+r"(e), "+r"(d), "+r"(a) : ""(b), "mg"(foo), "mm"(c)); +} diff --git a/gcc/testsuite/gcc.target/i386/pr67770.c b/gcc/testsuite/gcc.target/i386/pr67770.c new file mode 100644 index 00000000000..3826aff45b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67770.c @@ -0,0 +1,40 @@ +/* PR target/67770 */ +/* { dg-do run { target ia32 } } */ +/* { dg-require-effective-target trampolines } */ +/* { dg-options "-O2" } */ + +#ifndef NO_TRAMPOLINES +__attribute__ ((noinline)) void +foo (int i, void (* __attribute__ ((regparm (3))) bar) (int)) +{ + bar (i); +} +#endif + +int +main () +{ +#ifndef NO_TRAMPOLINES + int p = 0; + + __attribute__ ((regparm (3), noinline)) void + bar (int i) + { + if (__builtin_expect (i, 0)) + ++p; + } + + foo (0, bar); + bar (0); + + if (p != 0) + __builtin_abort (); + + foo (1, bar); + bar (1); + + if (p != 2) + __builtin_abort (); +#endif + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr68680.c b/gcc/testsuite/gcc.target/i386/pr68680.c new file mode 100644 index 00000000000..5524e156362 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr68680.c @@ -0,0 +1,15 @@ +/* PR tree-optimization/68680 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fstack-protector-strong" } */ + +int foo (char *); + +int +bar (unsigned long x) +{ + char a[x]; + return foo (a); +} + +/* Verify that this function is stack protected. */ +/* { dg-final { scan-assembler "stack_chk_fail" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr68701-1.c b/gcc/testsuite/gcc.target/i386/pr68701-1.c new file mode 100644 index 00000000000..008eb6bddd2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr68701-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O -ffixed-ebp -mno-accumulate-outgoing-args" } */ + +/* { dg-warning "fixed ebp register requires" "" { target *-*-* } 0 } */ + +void foo (void); + +int +main (int argc, char *argv[]) +{ + foo (); + return argc - 1; +} diff --git a/gcc/testsuite/gcc.target/i386/pr68701-2.c b/gcc/testsuite/gcc.target/i386/pr68701-2.c new file mode 100644 index 00000000000..bfe592ec8ec --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr68701-2.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O -ffixed-ebp -mno-accumulate-outgoing-args -mstackrealign -msse" } */ + +/* { dg-warning "fixed ebp register requires" "" { target *-*-* } 0 } */ + +typedef float V __attribute__((vector_size(16))); + +void bar (V a) +{ + volatile V b = a; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69459.c b/gcc/testsuite/gcc.target/i386/pr69459.c new file mode 100644 index 00000000000..2d0bbbcdbf1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69459.c @@ -0,0 +1,42 @@ +/* PR target/69549 */ +/* { dg-do run { target sse2_runtime } } */ +/* { dg-options "-O2 -msse2" } */ + +typedef unsigned char u8; +typedef unsigned short u16; +typedef unsigned int u32; +typedef unsigned long long u64; +typedef unsigned char v16u8 __attribute__ ((vector_size (16))); +typedef unsigned short v16u16 __attribute__ ((vector_size (16))); +typedef unsigned int v16u32 __attribute__ ((vector_size (16))); +typedef unsigned long long v16u64 __attribute__ ((vector_size (16))); + +u64 __attribute__((noinline, noclone)) +foo (u8 u8_0, u16 u16_3, v16u8 v16u8_0, v16u16 v16u16_0, v16u32 v16u32_0, v16u64 v16u64_0, v16u8 v16u8_1, v16u16 v16u16_1, v16u32 v16u32_1, v16u64 v16u64_1, v16u8 v16u8_2, v16u16 v16u16_2, v16u32 v16u32_2, v16u64 v16u64_2, v16u8 v16u8_3, v16u16 v16u16_3, v16u32 v16u32_3, v16u64 v16u64_3) +{ + v16u64_0 /= (v16u64){u16_3, ((0))} | 1; + v16u64_1 += (v16u64)~v16u32_0; + v16u16_1 /= (v16u16){-v16u64_3[1]} | 1; + v16u64_3[1] -= 0x1fffffff; + v16u32_2 /= (v16u32)-v16u64_0 | 1; + v16u32_1 += ~v16u32_1; + v16u16_3 %= (v16u16){0xfff, v16u32_2[3], v16u8_0[14]} | 1; + v16u64_3 -= (v16u64)v16u32_2; + if (v16u64_1[1] >= 1) { + v16u64_0 %= (v16u64){v16u32_0[1]} | 1; + v16u32_1[1] %= 0x5fb856; + v16u64_1 |= -v16u64_0; + } + v16u8_0 *= (v16u8)v16u32_1; + return u8_0 + v16u8_0 [12] + v16u8_0 [13] + v16u8_0 [14] + v16u8_0 [15] + v16u16_0 [0] + v16u16_0 [1] + v16u32_0 [0] + v16u32_0 [1] + v16u32_0 [2] + v16u32_0 [3] + v16u64_0 [0] + v16u64_0 [1] + v16u8_1 [9] + v16u8_1 [10] + v16u8_1 [11] + v16u8_1 [15] + v16u16_1 [0] + v16u16_1 [1] + v16u16_1 [3] + v16u64_1 [0] + v16u64_1 [1] + v16u8_2 [3] + v16u8_2 [4] + v16u8_2 [5] + v16u8_2 [0] + v16u32_2 [1] + v16u32_2 [2] + v16u32_2 [3] + v16u64_2 [0] + v16u64_2 [1] + v16u8_3 [0] + v16u16_3 [6] + v16u16_3[7] + v16u32_3[1] + v16u32_3[2] + v16u64_3[0] + v16u64_3[1]; +} + +int +main () +{ + u64 x = foo(1, 1, (v16u8){1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1, 1, 1, 1, 1}, (v16u16){1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1}, (v16u32){1}, (v16u64){1}); + + if (x != 0xffffffffe0000209) + __builtin_abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69551.c b/gcc/testsuite/gcc.target/i386/pr69551.c new file mode 100644 index 00000000000..1505fc21dbf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69551.c @@ -0,0 +1,23 @@ +/* PR target/69551 */ +/* { dg-do run { target sse_runtime } } */ +/* { dg-options "-O2 -mno-sse2 -msse" } */ + +typedef unsigned char v16qi __attribute__ ((vector_size (16))); +typedef unsigned int v4si __attribute__ ((vector_size (16))); + +char __attribute__ ((noinline, noclone)) +test (v4si vec) +{ + vec[1] = 0x5fb856; + return ((v16qi) vec)[0]; +} + +int +main () +{ + char z = test ((v4si) { -1, -1, -1, -1 }); + + if (z != -1) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69891.c b/gcc/testsuite/gcc.target/i386/pr69891.c new file mode 100644 index 00000000000..2c5e86372e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69891.c @@ -0,0 +1,30 @@ +/* PR rtl-optimization/69891 */ +/* { dg-do run } */ +/* { dg-options "-O -fno-tree-fre -mstringop-strategy=libcall -Wno-psabi" } */ +/* { dg-additional-options "-mno-sse" { target ia32 } } */ + +typedef unsigned short A; +typedef unsigned short B __attribute__ ((vector_size (32))); +typedef unsigned int C; +typedef unsigned int D __attribute__ ((vector_size (32))); +typedef unsigned long long E; +typedef unsigned long long F __attribute__ ((vector_size (32))); + +__attribute__((noinline, noclone)) unsigned +foo(D a, B b, D c, F d) +{ + b /= (B) {1, -c[0]} | 1; + c[0] |= 7; + a %= c | 1; + c ^= c; + return a[0] + b[15] + c[0] + d[3]; +} + +int +main () +{ + unsigned x = foo ((D) {}, (B) {}, (D) {}, (F) {}); + if (x != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr70007.c b/gcc/testsuite/gcc.target/i386/pr70007.c new file mode 100644 index 00000000000..ff58d176683 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70007.c @@ -0,0 +1,30 @@ +/* PR rtl-optimization/70007 */ +/* { dg-do run { target bmi2 } } */ +/* { dg-options "-O -fgcse -mbmi2 -Wno-psabi" } */ +/* { dg-require-effective-target int128 } */ + +#include "bmi2-check.h" + +typedef unsigned short v32u16 __attribute__ ((vector_size (32))); +typedef unsigned long long v32u64 __attribute__ ((vector_size (32))); +typedef unsigned __int128 u128; +typedef unsigned __int128 v32u128 __attribute__ ((vector_size (32))); + +u128 +foo (v32u16 v32u16_0, v32u64 v32u64_0, v32u64 v32u64_1) +{ + do { + v32u16_0[13] |= v32u64_1[3] = (v32u64_1[3] >> 19) | (v32u64_1[3] << 45); + v32u64_1 %= ~v32u64_1; + v32u64_0 *= (v32u64) v32u16_0; + } while (v32u64_0[0]); + return v32u64_1[3]; +} + +static void +bmi2_test () +{ + u128 x = foo((v32u16){(unsigned short) ~0xba31, 0x47c6}, (v32u64){64}, (v32u64){0, 0x8b217e2514d23242, 0xac569b6dff9f82, 0x9d4cffe03c139c}); + if (x != 0x3c74da5ca328d09) + __builtin_abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/pr70327.c b/gcc/testsuite/gcc.target/i386/pr70327.c new file mode 100644 index 00000000000..035bb68d458 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70327.c @@ -0,0 +1,12 @@ +/* PR target/70327 */ +/* { dg-do compile } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-mavx512f" } */ + +typedef unsigned __int128 v4ti __attribute__ ((vector_size (64))); + +void +foo (v4ti v) +{ + foo(v); +} diff --git a/gcc/testsuite/gcc.target/i386/pr70858.c b/gcc/testsuite/gcc.target/i386/pr70858.c new file mode 100644 index 00000000000..99d7877346c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70858.c @@ -0,0 +1,45 @@ +/* PR target/70858 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mlwp -mbmi -mtbm -mbmi2 -std=gnu11" } */ + +void +f1 (unsigned long long x, unsigned int y) +{ + __builtin_ia32_lwpval64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpval64." "" { target ia32 } } */ +} + +char +f2 (unsigned long long x, unsigned int y) +{ + return __builtin_ia32_lwpins64 (x, y, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_lwpins64." "" { target ia32 } } */ +} + +unsigned long long +f3 (unsigned long long x, unsigned long long y) +{ + return __builtin_ia32_bextr_u64 (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextr_u64." "" { target ia32 } } */ +} + +unsigned long long +f4 (unsigned long long x) +{ + return __builtin_ia32_bextri_u64 (x, 1); /* { dg-warning "implicit declaration of function .__builtin_ia32_bextri_u64." "" { target ia32 } } */ +} + +unsigned long long +f5 (unsigned long long x, unsigned long long y) +{ + return __builtin_ia32_bzhi_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_bzhi_di." "" { target ia32 } } */ +} + +unsigned long long +f6 (unsigned long long x, unsigned long long y) +{ + return __builtin_ia32_pdep_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pdep_di." "" { target ia32 } } */ +} + +unsigned long long +f7 (unsigned long long x, unsigned long long y) +{ + return __builtin_ia32_pext_di (x, y); /* { dg-warning "implicit declaration of function .__builtin_ia32_pext_di." "" { target ia32 } } */ +} diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-round.h b/gcc/testsuite/gcc.target/i386/sse4_1-round.h index 0210ac130b6..dfb0b778cdc 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-round.h +++ b/gcc/testsuite/gcc.target/i386/sse4_1-round.h @@ -28,7 +28,7 @@ init_round (FP_T *src) static FP_T do_round (FP_T f, int type) { - short saved_cw, new_cw, clr_mask; + unsigned short saved_cw, new_cw, clr_mask; FP_T ret; if ((type & 4)) @@ -42,16 +42,15 @@ do_round (FP_T f, int type) clr_mask = ~0x0C3F; } - __asm__ ("fld" ASM_SUFFIX " %0" : : "m" (*&f)); + __asm__ ("fnstcw %0" : "=m" (saved_cw)); - __asm__ ("fstcw %0" : "=m" (*&saved_cw)); new_cw = saved_cw & clr_mask; new_cw |= type; - __asm__ ("fldcw %0" : : "m" (*&new_cw)); - __asm__ ("frndint\n" - "fstp" ASM_SUFFIX " %0\n" : "=m" (*&ret)); - __asm__ ("fldcw %0" : : "m" (*&saved_cw)); + __asm__ ("fldcw %2\n\t" + "frndint\n\t" + "fldcw %3" : "=t" (ret) + : "0" (f), "m" (new_cw), "m" (saved_cw)); return ret; } diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-1.c index 71bc51be232..fab227869fc 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-1.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN(x, mode) _mm_ceil_ps(x) #define ROUND_MODE _MM_FROUND_CEIL diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-2.c index 672e92067c8..405c55d45a4 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-2.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN _mm_round_ps #define ROUND_MODE _MM_FROUND_NINT diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-3.c index 4bfc1cacc91..97485b95867 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundps-3.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundps-3.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN(x, mode) _mm_floor_ps(x) #define ROUND_MODE _MM_FROUND_FLOOR diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-1.c index ae8881cf0f8..e6cec0b9478 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-1.c @@ -7,7 +7,6 @@ #define VEC_T __m128d #define FP_T double -#define ASM_SUFFIX "l" #define ROUND_INTRIN(x, mode) _mm_ceil_sd(x, x) #define ROUND_MODE _MM_FROUND_CEIL diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-2.c index 70679bb07a0..54ca21f8f2c 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-2.c @@ -7,7 +7,6 @@ #define VEC_T __m128d #define FP_T double -#define ASM_SUFFIX "l" #define ROUND_INTRIN(x, mode) _mm_round_sd(x, x, mode) #define ROUND_MODE _MM_FROUND_NINT diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c index 81a3f760638..a59d6f86e5f 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-3.c @@ -7,7 +7,6 @@ #define VEC_T __m128d #define FP_T double -#define ASM_SUFFIX "l" #define ROUND_INTRIN(x, mode) _mm_floor_sd(x, x) #define ROUND_MODE _MM_FROUND_FLOOR diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c index 124f825021d..ff8b09eeba6 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundsd-4.c @@ -36,7 +36,7 @@ init_round (double *src) static double do_round (double f, int type) { - short saved_cw, new_cw, clr_mask; + unsigned short saved_cw, new_cw, clr_mask; double ret; if ((type & 4)) @@ -50,16 +50,15 @@ do_round (double f, int type) clr_mask = ~0x0C3F; } - __asm__ ("fldl %0" : : "m" (*&f)); + __asm__ ("fnstcw %0" : "=m" (saved_cw)); - __asm__ ("fstcw %0" : "=m" (*&saved_cw)); new_cw = saved_cw & clr_mask; new_cw |= type; - __asm__ ("fldcw %0" : : "m" (*&new_cw)); - __asm__ ("frndint\n" - "fstpl %0\n" : "=m" (*&ret)); - __asm__ ("fldcw %0" : : "m" (*&saved_cw)); + __asm__ ("fldcw %2\n\t" + "frndint\n\t" + "fldcw %3" : "=t" (ret) + : "0" (f), "m" (new_cw), "m" (saved_cw)); return ret; } diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-1.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-1.c index 96dd8a6a76f..9c20b90ad05 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-1.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-1.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN(x, mode) _mm_ceil_ss(x, x) #define ROUND_MODE _MM_FROUND_CEIL diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-2.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-2.c index f052c029f7a..072664e1573 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-2.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-2.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN(x, mode) _mm_round_ss(x, x, mode) #define ROUND_MODE _MM_FROUND_NINT diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-3.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-3.c index 0a696b1cfb7..97c69fdbcb2 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-3.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-3.c @@ -7,7 +7,6 @@ #define VEC_T __m128 #define FP_T float -#define ASM_SUFFIX "s" #define ROUND_INTRIN(x, mode) _mm_floor_ss(x, x) #define ROUND_MODE _MM_FROUND_FLOOR diff --git a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-4.c b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-4.c index 71042d1b777..95488908630 100644 --- a/gcc/testsuite/gcc.target/i386/sse4_1-roundss-4.c +++ b/gcc/testsuite/gcc.target/i386/sse4_1-roundss-4.c @@ -36,7 +36,7 @@ init_round (float *src) static float do_round (float f, int type) { - short saved_cw, new_cw, clr_mask; + unsigned short saved_cw, new_cw, clr_mask; float ret; if ((type & 4)) @@ -50,16 +50,15 @@ do_round (float f, int type) clr_mask = ~0x0C3F; } - __asm__ ("flds %0" : : "m" (*&f)); + __asm__ ("fnstcw %0" : "=m" (saved_cw)); - __asm__ ("fstcw %0" : "=m" (*&saved_cw)); new_cw = saved_cw & clr_mask; new_cw |= type; - __asm__ ("fldcw %0" : : "m" (*&new_cw)); - __asm__ ("frndint\n" - "fstps %0\n" : "=m" (*&ret)); - __asm__ ("fldcw %0" : : "m" (*&saved_cw)); + __asm__ ("fldcw %2\n\t" + "frndint\n\t" + "fldcw %3" : "=t" (ret) + : "0" (f), "m" (new_cw), "m" (saved_cw)); return ret; } diff --git a/gcc/testsuite/gcc.target/ia64/pr60465-gprel64-c37.c b/gcc/testsuite/gcc.target/ia64/pr60465-gprel64-c37.c new file mode 100644 index 00000000000..a7e6809eb6d --- /dev/null +++ b/gcc/testsuite/gcc.target/ia64/pr60465-gprel64-c37.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target ia64-*-* } } */ +/* { dg-options "-O2 -fpic" } */ +/* { dg-final { scan-assembler-not "@ltoffx" } } */ + +/* A bit of https://bugzilla.redhat.com/show_bug.cgi?id=33354 + where many stores to static variables overflow .sdata */ + +static const char *s90; +void f() { s90 = "string 90"; } +const char * g() { return s90; } diff --git a/gcc/testsuite/gcc.target/ia64/pr60465-gprel64.c b/gcc/testsuite/gcc.target/ia64/pr60465-gprel64.c new file mode 100644 index 00000000000..c00ecc947d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/ia64/pr60465-gprel64.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target ia64-*-* } } */ +/* { dg-options "-O2 -fpic" } */ +/* { dg-final { scan-assembler-not "@ltoffx" } } */ + +/* Test imitates early ld.so setup in glibc + where no dynamic relocations must be present. */ + +struct rtld_global +{ + long *p[77]; +}; + +struct rtld_global _rtld_local __attribute__ ((visibility ("hidden"), section (".sdata"))); + +static void __attribute__ ((unused, noinline)) +elf_get_dynamic_info (struct rtld_global * g, long * dyn) +{ + long **info = g->p; + + info[(0x6ffffeff - *dyn) + 66] = dyn; +} + +void __attribute__ ((unused, noinline)) +_dl_start (long * dyn) +{ + elf_get_dynamic_info(&_rtld_local, dyn); +} diff --git a/gcc/testsuite/gcc.target/m68k/pr63347.c b/gcc/testsuite/gcc.target/m68k/pr63347.c new file mode 100644 index 00000000000..1d23e9a827a --- /dev/null +++ b/gcc/testsuite/gcc.target/m68k/pr63347.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mcpu=5208" } */ + +#include <stdlib.h> + +void __attribute__ ((noinline)) +oof() +{ + asm volatile ("" ::: "memory"); +} +int print_info(unsigned int *ip_addr) +{ + int invalid = 0; + + if (ip_addr) { + unsigned int haddr = *ip_addr; + oof("stuff"); + if (0x0 == haddr) { + invalid = 1; + } + oof("stuff2"); + } else { + invalid = 1; + } + + return invalid; +} + +int main(int argc, char *argv[]) +{ + unsigned int myaddr; + int ret; + + myaddr = 0x0; + ret = print_info(&myaddr); + if (!ret) + abort (); + + myaddr = 0x01020304; + ret = print_info(&myaddr); + if (ret) + abort (); + exit (0); +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/pr68872.c b/gcc/testsuite/gcc.target/powerpc/pr68872.c new file mode 100644 index 00000000000..68f388efaa2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr68872.c @@ -0,0 +1,14 @@ +/* PR target/68872 */ +/* { dg-do assemble { target { powerpc64le-*-* } } } */ +/* { dg-options "-mcpu=powerpc64le" } */ + +/* Verify that -mcpu=powerpc64le passes -mpower8/-mpwr8 to the assembler. */ + +long +bar (unsigned char *ptr, unsigned char val) +{ + long ret; + asm volatile ("stbcx. %0,0,%1" :: "r" (val), "r" (ptr)); + asm volatile ("mfcr %0,8" : "=r" (ret) ::); + return ret; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr69548.c b/gcc/testsuite/gcc.target/powerpc/pr69548.c new file mode 100644 index 00000000000..439f588b874 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr69548.c @@ -0,0 +1,11 @@ +/* { dg-do assemble { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -Os -mbig" } */ + +__int128 +quad_exchange (__int128 *ptr, __int128 newval) +{ + return __atomic_exchange_n (ptr, newval, __ATOMIC_RELAXED); +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr70117.c b/gcc/testsuite/gcc.target/powerpc/pr70117.c new file mode 100644 index 00000000000..f1fdedb6c59 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr70117.c @@ -0,0 +1,92 @@ +/* { dg-do run { target { powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } } */ +/* { dg-options "-std=c99 -mlong-double-128 -O2" } */ + +#include <float.h> + +union gl_long_double_union +{ + struct { double hi; double lo; } dd; + long double ld; +}; + +/* This is gnulib's LDBL_MAX which, being 107 bits in precision, is + slightly larger than gcc's 106 bit precision LDBL_MAX. */ +volatile union gl_long_double_union gl_LDBL_MAX = + { { DBL_MAX, DBL_MAX / (double)134217728UL / (double)134217728UL } }; + +volatile double min_denorm = 0x1p-1074; +volatile double ld_low = 0x1p-969; +volatile double dinf = 1.0/0.0; +volatile double dnan = 0.0/0.0; + +int +main (void) +{ + long double ld; + + ld = gl_LDBL_MAX.ld; + if (__builtin_isinfl (ld)) + __builtin_abort (); + ld = -gl_LDBL_MAX.ld; + if (__builtin_isinfl (ld)) + __builtin_abort (); + + ld = gl_LDBL_MAX.ld; + if (!__builtin_isfinite (ld)) + __builtin_abort (); + ld = -gl_LDBL_MAX.ld; + if (!__builtin_isfinite (ld)) + __builtin_abort (); + + ld = ld_low; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + ld = -ld_low; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + + ld = -min_denorm; + ld += ld_low; + if (__builtin_isnormal (ld)) + __builtin_abort (); + ld = min_denorm; + ld -= ld_low; + if (__builtin_isnormal (ld)) + __builtin_abort (); + + ld = 0.0; + if (__builtin_isnormal (ld)) + __builtin_abort (); + ld = -0.0; + if (__builtin_isnormal (ld)) + __builtin_abort (); + + ld = LDBL_MAX; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + ld = -LDBL_MAX; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + + ld = gl_LDBL_MAX.ld; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + ld = -gl_LDBL_MAX.ld; + if (!__builtin_isnormal (ld)) + __builtin_abort (); + + ld = dinf; + if (__builtin_isnormal (ld)) + __builtin_abort (); + ld = -dinf; + if (__builtin_isnormal (ld)) + __builtin_abort (); + + ld = dnan; + if (__builtin_isnormal (ld)) + __builtin_abort (); + ld = -dnan; + if (__builtin_isnormal (ld)) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr70963.c b/gcc/testsuite/gcc.target/powerpc/pr70963.c new file mode 100644 index 00000000000..128ebd9f09f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr70963.c @@ -0,0 +1,44 @@ +/* { dg-do run { target powerpc64*-*-* } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <stdlib.h> +#include <stdio.h> +#include <altivec.h> + +static int failed; +static void test (void); + +static void check (int result, const char *name) +{ + if (!result) + { + failed++; + printf ("fail %s\n", name); + } +} + +int main (void) +{ + test (); + if (failed) + abort (); + return 0; +} + +vector double x = { 81.0, 76.0 }; +vector long long y = { 81, 76 }; + +static void test() +{ + vector long long a = vec_cts (x, 0); + vector double b = vec_ctf (a, 0); + vector long long c = __builtin_vsx_xvcvdpuxds_scale (x, 0); + vector double d = vec_ctf (c, 0); + check (vec_all_eq (a, y), "vec_cts"); + check (vec_all_eq (b, x), "vec_ctf"); + check (vec_all_eq (c, y), "xvcvdpuxds"); + check (vec_all_eq (d, x), "vec_ctf unsigned"); +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cg.c b/gcc/testsuite/gcc.target/powerpc/vec-cg.c new file mode 100644 index 00000000000..c31d217d880 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-cg.c @@ -0,0 +1,22 @@ +/* Test code generation of vector built-ins. We don't have this for + most of ours today. As new built-ins are added, please add to this + test case. Update as necessary to add VSX, P8-vector, P9-vector, + etc. */ + +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O0" } */ + +#include <altivec.h> + +static vector signed int i, *pi; +static int int1; + +void +b() +{ + i = __builtin_altivec_lvxl (int1, pi); + i = vec_lvxl (int1, pi); +} + +/* { dg-final { scan-assembler-times "lvxl" 2 } } */ diff --git a/gcc/testsuite/gcc.target/s390/gpr2fprsavecfi.c b/gcc/testsuite/gcc.target/s390/gpr2fprsavecfi.c new file mode 100644 index 00000000000..92a0d3ae29a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/gpr2fprsavecfi.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z10 -mzarch -fdwarf2-cfi-asm" } */ + +char *gl[100]; + +long +foo () +{ + long r = 0; + char bla[100]; + int i; + + __builtin_memcpy (bla, gl, 100); + + for (i = 0; i < 100; i++) + r += bla[i]; + + return r; +} + +/* { dg-final { scan-assembler-not "cfi_def_cfa_register" } } */ +/* { dg-final { scan-assembler "cfi_register" } } */ +/* { dg-final { scan-assembler "cfi_def_cfa_offset" } } */ diff --git a/gcc/testsuite/gcc.target/s390/pr70674.c b/gcc/testsuite/gcc.target/s390/pr70674.c new file mode 100644 index 00000000000..13bf271d95f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/pr70674.c @@ -0,0 +1,13 @@ +/* Test case for PR/70674. */ + +/* { dg-do compile { target s390x-*-* } } */ +/* { dg-options "-march=z10 -mtune=z196 -O2 -fno-omit-frame-pointer -fno-asynchronous-unwind-tables" } */ + +void +foo (void) +{ + volatile int a = 5; + (void) a; +} + +/* { dg-final { scan-assembler-not "^.*lgdr.*\n.*\\(%r11\\)" } } */ diff --git a/gcc/testsuite/gcc.target/sh/torture/pr67260.c b/gcc/testsuite/gcc.target/sh/torture/pr67260.c new file mode 100644 index 00000000000..a7b70f0c99d --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/torture/pr67260.c @@ -0,0 +1,12 @@ +/* { dg-additional-options "-std=gnu99 -fPIC" } */ +/* { dg-do compile } */ + +#pragma GCC visibility push(hidden) + +double _Complex foo (double _Complex arg); + +double _Complex +bar (double _Complex arg) +{ + return foo (arg); +} diff --git a/gcc/testsuite/gcc.target/sparc/sparc-ret.c b/gcc/testsuite/gcc.target/sparc/sparc-ret-1.c index f58b059e5aa..f58b059e5aa 100644 --- a/gcc/testsuite/gcc.target/sparc/sparc-ret.c +++ b/gcc/testsuite/gcc.target/sparc/sparc-ret-1.c diff --git a/gcc/testsuite/gcc.target/sparc/sparc-ret-2.c b/gcc/testsuite/gcc.target/sparc/sparc-ret-2.c new file mode 100644 index 00000000000..536b9b75a4c --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/sparc-ret-2.c @@ -0,0 +1,13 @@ +/* PR target/57845 */ + +/* { dg-do compile } */ +/* { dg-options "-freg-struct-return" } */ + +struct S { short int i; }; + +struct S foo (short int i) +{ + struct S s; + s.i = i; + return s; +} |