diff options
| -rw-r--r-- | gcc/config/arm/arm.md | 9 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr79145.c | 16 |
2 files changed, 24 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 498624468c1..5cc69974388 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3313,7 +3313,14 @@ (xor:DI (match_operand:DI 1 "s_register_operand" "") (match_operand:DI 2 "arm_xordi_operand" "")))] "TARGET_32BIT" - "" + { + /* The iWMMXt pattern for xordi3 accepts only register operands but we want + to reuse this expander for all TARGET_32BIT targets so just force the + constants into a register. Unlike for the anddi3 and iordi3 there are + no NEON instructions that take an immediate. */ + if (TARGET_IWMMXT && !REG_P (operands[2])) + operands[2] = force_reg (DImode, operands[2]); + } ) (define_insn_and_split "*xordi3_insn" diff --git a/gcc/testsuite/gcc.target/arm/pr79145.c b/gcc/testsuite/gcc.target/arm/pr79145.c new file mode 100644 index 00000000000..66782440039 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr79145.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */ +/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */ +/* { dg-require-effective-target arm32 } */ +/* { dg-require-effective-target arm_iwmmxt_ok } */ +/* { dg-options "-mcpu=iwmmxt" } */ + +int +main (void) +{ + volatile long long t1; + t1 ^= 0x55; + return 0; +} |