Merge branches/gcc-4_9-branch rev 220524

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220638 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 56 insertions, 31 deletions

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index d729ccbc761..1a02eb4322e 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,33 @@
+2015-02-01  H.J. Lu  <hongjiu.lu@intel.com>
+
+	Backported from mainline
+	2015-01-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/cpuinfo.c (processor_subtypes): Add
+	INTEL_COREI7_BROADWELL.
+	(get_intel_cpu): Support new Silvermont, Haswell and Broadwell
+	model numbers.
+
+2015-01-31  John David Anglin  <danglin@gcc.gnu.org>
+
+	* config/pa/linux-atomic.c (__kernel_cmpxchg2): Change declaration of
+	oldval and newval to const void *.  Fix typo.
+	(FETCH_AND_OP_2): Use __atomic_load_n to load value.
+	(FETCH_AND_OP_WORD): Likewise.
+	(OP_AND_FETCH_WORD): Likewise.
+	(COMPARE_AND_SWAP_2): Likewise.
+	(__sync_val_compare_and_swap_4): Likewise.
+	(__sync_lock_test_and_set_4): Likewise.
+	(SYNC_LOCK_RELEASE_2): Likewise.
+	Remove support for long long atomic operations.
+
+2015-01-20  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline
+	* config/nios2/linux-unwind.h (nios2_fallback_frame_state):
+	Update rt_sigframe format and address for current Nios II
+	Linux conventions.
+
 2014-12-09  John David Anglin  <danglin@gcc.gnu.org>
 
 	Backport from mainline
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 6ff7502bb9a..7972cedaa11 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -75,6 +75,7 @@ enum processor_subtypes
   AMDFAM15H_BDVER4,
   INTEL_COREI7_IVYBRIDGE,
   INTEL_COREI7_HASWELL,
+  INTEL_COREI7_BROADWELL,
   CPU_SUBTYPE_MAX
 };
 
@@ -184,7 +185,10 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
 	      __cpu_model.__cpu_type = INTEL_BONNELL;
 	      break;
 	    case 0x37:
+	    case 0x4a:
 	    case 0x4d:
+	    case 0x5a:
+	    case 0x5d:
 	      /* Silvermont.  */
 	      __cpu_model.__cpu_type = INTEL_SILVERMONT;
 	      break;
@@ -216,12 +220,20 @@ get_intel_cpu (unsigned int family, unsigned int model, unsigned int brand_id)
 	      __cpu_model.__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
 	      break;
 	    case 0x3c:
+	    case 0x3f:
 	    case 0x45:
 	    case 0x46:
 	      /* Haswell.  */
 	      __cpu_model.__cpu_type = INTEL_COREI7;
 	      __cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
 	      break;
+	    case 0x3d:
+	    case 0x4f:
+	    case 0x56:
+	      /* Broadwell.  */
+	      __cpu_model.__cpu_type = INTEL_COREI7;
+	      __cpu_model.__cpu_subtype = INTEL_COREI7_BROADWELL;
+	      break;
 	    case 0x17:
 	    case 0x1d:
 	      /* Penryn.  */
diff --git a/libgcc/config/nios2/linux-unwind.h b/libgcc/config/nios2/linux-unwind.h
index 92ff1f62982..ba4bd801dee 100644
--- a/libgcc/config/nios2/linux-unwind.h
+++ b/libgcc/config/nios2/linux-unwind.h
@@ -67,10 +67,9 @@ nios2_fallback_frame_state (struct _Unwind_Context *context,
   if (pc[0] == (0x00800004 | (__NR_rt_sigreturn << 6)))
     {
       struct rt_sigframe {
-	char retcode[12];
 	siginfo_t info;
 	struct nios2_ucontext uc;
-      } *rt_ = context->ra;
+      } *rt_ = context->cfa;
       struct nios2_mcontext *regs = &rt_->uc.uc_mcontext;
       int i;
 
diff --git a/libgcc/config/pa/linux-atomic.c b/libgcc/config/pa/linux-atomic.c
index 19e37b6f3c4..2554f4607eb 100644
--- a/libgcc/config/pa/linux-atomic.c
+++ b/libgcc/config/pa/linux-atomic.c
@@ -73,7 +73,8 @@ __kernel_cmpxchg (int oldval, int newval, int *mem)
 }
 
 static inline long
-__kernel_cmpxchg2 (void * oldval, void * newval, void *mem, int val_size)
+__kernel_cmpxchg2 (const void *oldval, const void *newval, void *mem,
+		   int val_size)
 {
   register unsigned long lws_mem asm("r26") = (unsigned long) (mem);
   register long lws_ret   asm("r28");
@@ -90,7 +91,7 @@ __kernel_cmpxchg2 (void * oldval, void * newval, void *mem, int val_size)
   if (__builtin_expect (lws_errno == -EFAULT || lws_errno == -ENOSYS, 0))
     __builtin_trap ();
 
-  /* If the kernel LWS call fails, retrun EBUSY */
+  /* If the kernel LWS call fails, return EBUSY */
   if (!lws_errno && lws_ret)
     lws_errno = -EBUSY;
 
@@ -113,7 +114,7 @@ __kernel_cmpxchg2 (void * oldval, void * newval, void *mem, int val_size)
     int failure;							\
 									\
     do {								\
-      tmp = *ptr;							\
+      tmp = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);			\
       newval = PFX_OP (tmp INF_OP val);					\
       failure = __kernel_cmpxchg2 (&tmp, &newval, ptr, INDEX);		\
     } while (failure != 0);						\
@@ -121,13 +122,6 @@ __kernel_cmpxchg2 (void * oldval, void * newval, void *mem, int val_size)
     return tmp;								\
   }
 
-FETCH_AND_OP_2 (add,   , +, long long, 8, 3)
-FETCH_AND_OP_2 (sub,   , -, long long, 8, 3)
-FETCH_AND_OP_2 (or,    , |, long long, 8, 3)
-FETCH_AND_OP_2 (and,   , &, long long, 8, 3)
-FETCH_AND_OP_2 (xor,   , ^, long long, 8, 3)
-FETCH_AND_OP_2 (nand, ~, &, long long, 8, 3)
-
 FETCH_AND_OP_2 (add,   , +, short, 2, 1)
 FETCH_AND_OP_2 (sub,   , -, short, 2, 1)
 FETCH_AND_OP_2 (or,    , |, short, 2, 1)
@@ -150,7 +144,7 @@ FETCH_AND_OP_2 (nand, ~, &, signed char, 1, 0)
     int failure;							\
 									\
     do {								\
-      tmp = *ptr;							\
+      tmp = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);			\
       newval = PFX_OP (tmp INF_OP val);					\
       failure = __kernel_cmpxchg2 (&tmp, &newval, ptr, INDEX);		\
     } while (failure != 0);						\
@@ -158,13 +152,6 @@ FETCH_AND_OP_2 (nand, ~, &, signed char, 1, 0)
     return PFX_OP (tmp INF_OP val);					\
   }
 
-OP_AND_FETCH_2 (add,   , +, long long, 8, 3)
-OP_AND_FETCH_2 (sub,   , -, long long, 8, 3)
-OP_AND_FETCH_2 (or,    , |, long long, 8, 3)
-OP_AND_FETCH_2 (and,   , &, long long, 8, 3)
-OP_AND_FETCH_2 (xor,   , ^, long long, 8, 3)
-OP_AND_FETCH_2 (nand, ~, &, long long, 8, 3)
-
 OP_AND_FETCH_2 (add,   , +, short, 2, 1)
 OP_AND_FETCH_2 (sub,   , -, short, 2, 1)
 OP_AND_FETCH_2 (or,    , |, short, 2, 1)
@@ -186,7 +173,7 @@ OP_AND_FETCH_2 (nand, ~, &, signed char, 1, 0)
     int failure, tmp;							\
 									\
     do {								\
-      tmp = *ptr;							\
+      tmp = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);			\
       failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
     } while (failure != 0);						\
 									\
@@ -207,7 +194,7 @@ FETCH_AND_OP_WORD (nand, ~, &)
     int tmp, failure;							\
 									\
     do {								\
-      tmp = *ptr;							\
+      tmp = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);			\
       failure = __kernel_cmpxchg (tmp, PFX_OP (tmp INF_OP val), ptr);	\
     } while (failure != 0);						\
 									\
@@ -233,7 +220,7 @@ typedef unsigned char bool;
 									\
     while (1)								\
       {									\
-	actual_oldval = *ptr;						\
+	actual_oldval = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);	\
 									\
 	if (__builtin_expect (oldval != actual_oldval, 0))		\
 	  return actual_oldval;						\
@@ -242,7 +229,7 @@ typedef unsigned char bool;
 									\
 	if (__builtin_expect (!fail, 1))				\
 	  return actual_oldval;						\
-    }									\
+      }									\
   }									\
 									\
   bool HIDDEN								\
@@ -253,7 +240,6 @@ typedef unsigned char bool;
     return (failure != 0);						\
   }
 
-COMPARE_AND_SWAP_2 (long long, 8, 3)
 COMPARE_AND_SWAP_2 (short, 2, 1)
 COMPARE_AND_SWAP_2 (char, 1, 0)
 
@@ -264,7 +250,7 @@ __sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
     
   while (1)
     {
-      actual_oldval = *ptr;
+      actual_oldval = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);
 
       if (__builtin_expect (oldval != actual_oldval, 0))
 	return actual_oldval;
@@ -291,14 +277,13 @@ TYPE HIDDEN								\
     int failure;							\
 									\
     do {								\
-      oldval = *ptr;							\
+      oldval = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);			\
       failure = __kernel_cmpxchg2 (&oldval, &val, ptr, INDEX);		\
     } while (failure != 0);						\
 									\
     return oldval;							\
   }
 
-SYNC_LOCK_TEST_AND_SET_2 (long long, 8, 3)
 SYNC_LOCK_TEST_AND_SET_2 (short, 2, 1)
 SYNC_LOCK_TEST_AND_SET_2 (signed char, 1, 0)
 
@@ -308,7 +293,7 @@ __sync_lock_test_and_set_4 (int *ptr, int val)
   int failure, oldval;
 
   do {
-    oldval = *ptr;
+    oldval = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);
     failure = __kernel_cmpxchg (oldval, val, ptr);
   } while (failure != 0);
 
@@ -322,12 +307,11 @@ __sync_lock_test_and_set_4 (int *ptr, int val)
     TYPE failure, oldval, zero = 0;				\
 								\
     do {							\
-      oldval = *ptr;						\
+      oldval = __atomic_load_n (ptr, __ATOMIC_SEQ_CST);		\
       failure = __kernel_cmpxchg2 (&oldval, &zero, ptr, INDEX);	\
     } while (failure != 0);					\
   }
 
-SYNC_LOCK_RELEASE_2 (long long, 8, 3)
 SYNC_LOCK_RELEASE_2 (short, 2, 1)
 SYNC_LOCK_RELEASE_2 (signed char, 1, 0)