diff options
| author | Yvan Roux <yvan.roux@linaro.org> | 2015-10-08 18:45:24 +0200 |
|---|---|---|
| committer | Linaro Code Review <review@review.linaro.org> | 2015-10-10 12:59:15 +0000 |
| commit | 2b4b1dba457ab72518cceb3a160744c650d03e2b (patch) | |
| tree | 8b06217859e2db12abd9e1ea170c2ef40677442a /gcc | |
| parent | 2eed2c2db5339354a66ffec3d2661a9566d1bdbe (diff) | |
gcc/
Backport from trunk r224317.
2015-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/sync.md (*memory_barrier): Use dmb ish instead of
dmb sy. Adjust tabs.
Change-Id: I4ab34ecf37759fd78b3085085ed9bbda47f091ed
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/sync.md | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/gcc/config/arm/sync.md b/gcc/config/arm/sync.md index 75dd52ea3aa..9ee715cd6de 100644 --- a/gcc/config/arm/sync.md +++ b/gcc/config/arm/sync.md @@ -50,14 +50,11 @@ { if (TARGET_HAVE_DMB) { - /* Note we issue a system level barrier. We should consider issuing - a inner shareabilty zone barrier here instead, ie. "DMB ISH". */ - /* ??? Differentiate based on SEQ_CST vs less strict? */ - return "dmb\tsy"; + return "dmb\\tish"; } if (TARGET_HAVE_DMB_MCR) - return "mcr\tp15, 0, r0, c7, c10, 5"; + return "mcr\\tp15, 0, r0, c7, c10, 5"; gcc_unreachable (); } |