diff options
| author | Claudiu Zissulescu <claziss@synopsys.com> | 2020-12-29 13:30:04 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@synopsys.com> | 2020-12-29 13:30:04 +0200 |
| commit | 052870c3d1c962a0875c4debc066ccc3d68e7029 (patch) | |
| tree | 93239e9af339c7721f9b078587266e390983c72c /gcc | |
| parent | d2754fbb65dd3b81487769317bae4e9a8cee01c9 (diff) | |
arc: Don't use predicated vadd2 instructions in mov patterns.
Update movdi, movdf and mov vectors not to use predicated vadd2
instructions. vadd2 is used as a "fast" move in these patterns. This
fixes a number of failures in dejagnu.
gcc/
2020-12-29 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (movdi_insn): Update pattern, no predicated
vadd2 usage.
(movdf_insn): Likewise.
* config/arc/simdext.md (movVEC_insn): Likewise.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arc/arc.md | 6 | ||||
| -rw-r--r-- | gcc/config/arc/simdext.md | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index ae08146bcaf..75c32f6d3e9 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1341,7 +1341,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" if (TARGET_PLUS_QMACW && even_register_operand (operands[0], DImode) && even_register_operand (operands[1], DImode)) - return \"vadd2\\t%0,%1,0\"; + return \"vadd2%?\\t%0,%1,0\"; return \"#\"; case 2: @@ -1421,7 +1421,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" if (TARGET_PLUS_QMACW && even_register_operand (operands[0], DFmode) && even_register_operand (operands[1], DFmode)) - return \"vadd2\\t%0,%1,0\"; + return \"vadd2%?\\t%0,%1,0\"; return \"#\"; case 4: @@ -1450,7 +1450,7 @@ core_3, archs4x, archs4xd, archs4xd_slow" DONE; } [(set_attr "type" "move,move,move,move,load,store") - (set_attr "predicable" "no,no,yes,yes,no,no") + (set_attr "predicable" "no,no,no,yes,no,no") ;; ??? The ld/st values could be 16 if it's [reg,bignum]. (set_attr "length" "4,16,8,16,16,16")]) diff --git a/gcc/config/arc/simdext.md b/gcc/config/arc/simdext.md index d2fc309ea87..58651b5fcac 100644 --- a/gcc/config/arc/simdext.md +++ b/gcc/config/arc/simdext.md @@ -1413,7 +1413,7 @@ if (TARGET_PLUS_QMACW && even_register_operand (operands[0], <MODE>mode) && even_register_operand (operands[1], <MODE>mode)) - return \"vadd2\\t%0,%1,0\"; + return \"vadd2%?\\t%0,%1,0\"; return \"#\"; case 2: @@ -1434,7 +1434,7 @@ DONE; } [(set_attr "type" "move,multi,load,store") - (set_attr "predicable" "yes,no,no,no") + (set_attr "predicable" "no,no,no,no") (set_attr "iscompact" "false,false,false,false") ]) |