diff options
| author | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-30 01:18:43 +0000 |
|---|---|---|
| committer | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-01-30 01:18:43 +0000 |
| commit | dc93691a28b5cb165f69f488f9ca8b2847def901 (patch) | |
| tree | 4976b89b932382ad39cdba9df33eb0733fe2a805 /gcc/testsuite | |
| parent | aa01d05f51415b6062f5acf3aa3813714ee121b7 (diff) | |
2016-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/65546
* gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c: Correct
condition being checked, and disable it when the target supports
misaligned loads and stores.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233006 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index aa3855f4177..8b92463c996 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2016-01-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR target/65546 + * gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c: Correct + condition being checked, and disable it when the target supports + misaligned loads and stores. + 2016-01-29 Jakub Jelinek <jakub@redhat.com> PR debug/69518 diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c index ff67ff28130..72b4930d9bb 100644 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c @@ -46,5 +46,5 @@ int main (void) return main1 (); } -/* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 1 "vect" { target { ! vect_hw_misalign } } } } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_hw_misalign } } } } */ |