diff options
| author | Alexander Monakov <amonakov@ispras.ru> | 2022-11-16 16:33:11 +0300 |
|---|---|---|
| committer | Alexander Monakov <amonakov@ispras.ru> | 2022-11-16 16:41:39 +0300 |
| commit | 85966f0d20baf50a767ac1110f537395441604a9 (patch) | |
| tree | bc1c746d488e098d4ad06373c958833c658e7309 /gcc/doc/invoke.texi | |
| parent | d4cc7a8c4a623b62dd0d486d7780d91b58eb6f1f (diff) | |
doc: fix description of -mrelax-cmpxchg-loop [PR 107676]
gcc/ChangeLog:
PR target/107676
* doc/invoke.texi (-mrelax-cmpxchg-loop): Reword description.
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index cbfe1102bd2..96f0b6d08bd 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -33561,10 +33561,11 @@ registers. @item -mrelax-cmpxchg-loop @opindex mrelax-cmpxchg-loop -Relax cmpxchg loop by emitting an early load and compare before cmpxchg, -execute pause if load value is not expected. This reduces excessive -cachline bouncing when and works for all atomic logic fetch builtins -that generates compare and swap loop. +When emitting a compare-and-swap loop for @ref{__sync Builtins} +and @ref{__atomic Builtins} lacking a native instruction, optimize +for the highly contended case by issuing an atomic load before the +@code{CMPXCHG} instruction, and using the @code{PAUSE} instruction +to save CPU power when restarting the loop. @item -mindirect-branch=@var{choice} @opindex mindirect-branch |