diff options
| author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-24 22:25:18 +0000 |
|---|---|---|
| committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-07-24 22:25:18 +0000 |
| commit | eb7cb9b6832bb9ed02489ae188967df6110700af (patch) | |
| tree | 234bcc9dca69c1a00033bcd6ee200229f06782e4 /gcc/config/v850 | |
| parent | ac990d9ac3ee3c291d3db797fd2cf42943d24744 (diff) | |
Purge FIXUNS_TRUNC_LIKE_FIX_TRUNC
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189826 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/v850')
| -rw-r--r-- | gcc/config/v850/v850.h | 4 | ||||
| -rw-r--r-- | gcc/config/v850/v850.md | 14 |
2 files changed, 12 insertions, 6 deletions
diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h index f5b64deab2b..10ddd7b13a6 100644 --- a/gcc/config/v850/v850.h +++ b/gcc/config/v850/v850.h @@ -812,10 +812,6 @@ typedef enum /* Byte and short loads sign extend the value to a word. */ #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND -/* This flag, if defined, says the same insns that convert to a signed fixnum - also convert validly to an unsigned one. */ -#define FIXUNS_TRUNC_LIKE_FIX_TRUNC - /* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */ #define MOVE_MAX 4 diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index 4ac565383cd..f479ff6322e 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -1938,7 +1938,7 @@ ;; float -> int (define_insn "fix_truncsfsi2" [(set (match_operand:SI 0 "register_operand" "=r") - (fix:SI (fix:SF (match_operand:SF 1 "register_operand" "r"))))] + (fix:SI (match_operand:SF 1 "register_operand" "r")))] "TARGET_V850E2V3" "trncf.sw %1,%0" [(set_attr "length" "4") @@ -1947,13 +1947,23 @@ (define_insn "fix_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "=r") - (fix:SI (fix:DF (match_operand:DF 1 "even_reg_operand" "r"))))] + (fix:SI (match_operand:DF 1 "even_reg_operand" "r")))] "TARGET_V850E2V3" "trncf.dw %1,%0" [(set_attr "length" "4") (set_attr "cc" "none_0hit") (set_attr "type" "fpu")]) +(define_expand "fixuns_truncsfsi2" + [(set (match_operand:SI 0 "register_operand" "=r") + (fix:SI (match_operand:SF 1 "register_operand" "r")))] + "TARGET_V850E2V3") + +(define_expand "fixuns_truncdfsi2" + [(set (match_operand:SI 0 "register_operand" "=r") + (fix:SI (match_operand:DF 1 "even_reg_operand" "r")))] + "TARGET_V850E2V3") + ;; int -> float (define_insn "floatsisf2" [(set (match_operand:SF 0 "register_operand" "=r") |